Abstract: Connector assemblies having an adjustable polarity are described. For example, at least two ferrules may be arranged in a housing of the connector assembly within independent frame plugs in a certain polarity. A top portion of the housing may be removed to allow access to the frame plugs. Accordingly, an installer may open the housing, switch the polarity of the ferrules, and then re-couple the top portion to the housing. In another example, the connector assembly may include a latch that may rotate about the connector assembly from a first polarity position to a second polarity position. The connector assembly may include a compression element that may facilitate the rotation of the latch when the compression element is compressed. In this manner, the latch may be rotated to a different polarity position to allow the connector assembly to be connected to an adapter using a different polarity.

Abstract: A processor applies a transfer policy to a portion of a cache based on access metrics for different test regions of the cache, wherein each test region applies a different transfer policy for data in cache entries that were stored in response to a prefetch requests but were not the subject of demand requests. One test region applies a transfer policy under which unused prefetches are transferred to a higher level cache in a cache hierarchy upon eviction from the test region of the cache. The other test region applies a transfer policy under which unused prefetches are replaced without being transferred to a higher level cache (or are transferred to the higher level cache but stored as invalid data) upon eviction from the test region of the cache.

Abstract: A semiconductor device includes a substrate, a seed layer, a first patterned metal layer, a dielectric layer and a second metal layer. The seed layer is disposed on a surface of the substrate. The first patterned metal layer is disposed on the seed layer and has a first thickness. The first patterned metal layer includes a first part and a second part. The dielectric layer is disposed on the first part of the first patterned metal layer. The second metal layer is disposed on the dielectric layer and has a second thickness, where the first thickness is greater than the second thickness. The first part of the first patterned metal layer, the dielectric layer and the second metal layer form a capacitor. The first part of the first patterned metal layer is a lower electrode of the capacitor, and the second part of the first patterned metal layer is an inductor.

Abstract: A semiconductor light emitting element with a design wavelength of ?, comprising a photonic crystal periodic structure having two structures with different refractive indices at each of one or more interfaces between layers that form the light emitting element. The period a and the radius R that are parameters of each of the one or more periodic structures and the design wavelength ? satisfy Bragg conditions. The ratio (R/a) between the period a and the radius R is a value determined so that a predetermined photonic band gap (PBG) for TE light becomes maximum for each periodic structure. The parameters of each periodic structure are determined so that light extraction efficiency of the entire semiconductor light emitting element with respect to light with the wavelength ? becomes maximum as a result of conducting a simulation analysis with a FDTD method using as variables the depth h of the periodic structure that is of greater than or equal to 0.

Abstract: A valve including: a chamber configured to extend at least partly into a tank and to be connected via an upper venting aperture to a venting circuit; and a shut-off point defining a single maximum filling level within the tank, located away from the chamber, the shut-off point being in fluid communication with the chamber via a conduit, wherein the conduit includes a venting tube.

Abstract: The present disclosure relates to a fluorescent powder and a light-emitting device including the same. The fluorescent powder includes an inorganic compound. The inorganic compound contains components including an element M, an element A, an element D, an element E, and an element R. The element M is selected from Eu, Ce, Mn, Tb, Dy, and Tm, the element A is selected from Mg, Ca, Sr, and Ba, the element D is selected from B, Al, Ga, In, La, Gd, Sc, Lu, and Y, the element E is selected from Si, Ge, Zr, and Hf, and the element R is at least two elements selected from N, O, F, and Cl. In a powder X-Ray Diffraction (XRD) spectrum with CoK? radiation, the inorganic compound at least has diffraction peaks within ranges of an Bragg angle (2?) from 27.3° to 28.3°, 29.7° to 30.7°, 41.9° to 42.9°, and 43.5° to 44.5°.

Abstract: A method for operating a memory device includes performing a single read operation that includes additional one or more combinations of read and/or write cycles, and performing a single write operation that includes additional one or more combinations of read and/or write cycles. For example, a method for auto-correcting errors in a memory device having plurality of memory cells includes performing a first read operation of the memory cell to obtain a first read data value, performing a first write operation to the memory cell to write a second data value, which is a complement of the first data value, into the memory cell, performing a second read operation of the memory cell to obtain a third data value, and performing a second write operation to the memory cell to write a fourth data value, which is a complement of the third data value, to the memory cell.

Abstract: A method and device for reducing oral discomfort in a mouth of a user using high frequency vibration (HFV) includes placing a proximal end of a mouthpiece intraorally into vibrational contact with a dentition of the user, activating a vibration unit so as to deliver vibration at a frequency higher than about 80 Hz to the dentition of the user, and removing the vibration unit after about 5 minutes, wherein oral discomfort is reduced compared to a time before activating the vibration unit.

Abstract: Embodiments of the present disclosure are directed to devices and methods for stimulating cell proliferation. In one implementation, a method for increasing cell proliferation is provided. The method includes providing a vibrational dental device configured to vibrate at a frequency higher than about 80 Hz. The method also includes mechanically stimulating, using the vibrational dental device, cells for less than about 20 minutes daily over a period of time. The number of the cells at the end of the period of time is increased. The cells may include one of human osteoblasts and fibroblasts.

Abstract: This invention provides a method, system, and computer program to visualize texture (crystal orientation distribution) heterogeneity in polycrystalline aggregate part in large length scale. This is a critical representation step for microstructure characterization, useful in effective behavior simulation, risk analysis and hotspot identification. In contrast to orientation image map where each color component represents a crystal orientation, each color in this macrotexture map represents a set of texture. Different color represent different texture and similar texture shall have similar color. This method will provide a critical tool in evaluating texture heterogeneity of components, leading to a first-hand understanding of property heterogeneity and anisotropy. For an experienced user, these maps serve the same purpose in identifying high risk locations in the investigated component as medical imaging maps do for diagnosis purpose.

Abstract: Techniques for selectively executing a lock instruction speculatively or non-speculatively based on lock address prediction and/or temporal lock prediction. including methods an devices for locking an entry in a memory device. In some techniques, a lock instruction executed by a thread for a particular memory entry of a memory device is detected. Whether contention occurred for the particular memory entry during an earlier speculative lock is detected on a condition that the lock instruction comprises a speculative lock instruction. The lock is executed non-speculatively if contention occurred for the particular memory entry during an earlier speculative lock. The lock is executed speculatively if contention did not occur for the particular memory entry during an earlier speculative lock.

Abstract: A method for coating a thin film in a rolling manner and a thin film coating apparatus are provided. The method includes: floating a thin film material on a liquefied material; rolling a cylindrical substrate after contacting the cylindrical substrate with the thin film material; and coating the thin film material on a surface of the cylindrical substrate by using an attraction force between the surface of the cylindrical substrate and the thin film material.

Abstract: A device for measuring a level of a liquid in a vehicle tank including at least one capacitive probe, the capacitive probe including a support structure supporting at least one plurality of capacitive elements arranged to form at least two rows of capacitive elements extending along a longitudinal axis, the rows of capacitive elements being spaced apart along an axis which is transverse to the longitudinal axis. The capacitive elements of the two rows of capacitive elements are offset along the longitudinal axis with respect to one another from one row to the next.

Abstract: A semiconductor package includes: (1) a package substrate including an upper surface; (2) a semiconductor device disposed adjacent to the upper surface of the package substrate, the semiconductor device including an inactive surface; and (3) an antenna substrate disposed on the inactive surface of the semiconductor device.

Abstract: A processing apparatus is provided that includes an encoder configured to encode current frames of video data using previously encoded reference frames and perform motion searches within a search window about each of a plurality of co-located portions of a reference frame. The processing apparatus also includes a processor configured to determine, prior to performing the motion searches, which locations of the reference frame to reload the search window according to a threshold number of search window reloads using predicted motions of portions of the reference frame corresponding to each of the locations. The processor is also configured to cause the encoder to reload the search window at the determined locations of the reference frame and, for each of the remaining locations of the reference frame, slide the search window in a first direction indicated by the location of the next co-located portion of the reference frame.

Abstract: Improvements in the graphics processing pipeline are disclosed. More specifically, a new primitive shader stage performs tasks of the vertex shader stage or a domain shader stage if tessellation is enabled, a geometry shader if enabled, and a fixed function primitive assembler. The primitive shader stage is compiled by a driver from user-provided vertex or domain shader code, geometry shader code, and from code that performs functions of the primitive assembler. Moving tasks of the fixed function primitive assembler to a primitive shader that executes in programmable hardware provides many benefits, such as removal of a fixed function crossbar, removal of dedicated parameter and position buffers that are unusable in general compute mode, and other benefits.

Abstract: Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.

Abstract: The techniques described herein improve cache traffic performance in the context of contended lock instructions. More specifically, each core maintains a lock address contention table that stores addresses corresponding to contended lock instructions. The lock address contention table also includes a state value that indicates progress through a series of states meant to track whether a load by the core in a spin-loop associated with semaphore acquisition has obtained the semaphore in an exclusive state. Upon detecting that a load in a spin-loop has obtained the semaphore in an exclusive state, the core responds to incoming requests for access to the semaphore with negative acknowledgments. This allows the core to maintain the semaphore cache line in an exclusive state, which allows it to acquire the semaphore faster and to avoid transmitting that cache line to other cores unnecessarily.

Abstract: An intumescent coating material, the material comprising first and second parts mixable together so that the material will cure by an addition reaction in the presence of a metallic catalyst. The first part including a polydiorganosiloxane polymer having at least two unsaturated groups per molecule. The first part also including the metallic catalyst and a reinforcing filler. The second part including an organohydrogensiloxane crosslinker described by formula R13Si(OSiR22)x(OSiMeH)yOSiR13, where each R2 is independently selected from saturated hydrocarbon radicals comprising from 1 to 10 carbon atoms or aromatic hydrocarbon radicals and each R1 is independently selected from hydrogen or R2, x is zero or an integer and y is an integer. The organohydrogensiloxane has at least three Si—H bonds per molecule.

Abstract: A system and method for managing data in a ring buffer is disclosed. The system includes a legacy ring buffer functioning as an on-chip ring buffer, a supplemental buffer for storing data in the ring buffer, a preload ring buffer that is on-chip and capable of receiving preload data from the supplemental buffer, a write controller that determines where to write data that is write requested by a write client of the ring buffer, and a read controller that controls a return of data to a read client pursuant to a read request to the ring buffer.