Patents Assigned to Advanpack Solutions PTE, Ltd.
  • Patent number: 6592019
    Abstract: A flip chip interconnect system comprises an elongated pillar comprising two elongated portions, a first portion including solder with or without lead and a second portion including copper or gold or other material having a higher reflow temperature than the first portion. The second portion is to be connected to the semiconductor chip and has a length preferably of more than 55 microns to reduce the effect of &agr; particles from the solder from affecting electronic devices on the chip. The total length of the pillar is preferably in the range of 80 to 120 microns.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: July 15, 2003
    Assignee: Advanpack Solutions Pte. Ltd
    Inventor: Francisca Tung
  • Patent number: 6578754
    Abstract: A flip chip interconnect system comprises and elongated pillar comprising two elongated portions, one portion including copper and another portion including solder. The portion including copper is in contact with the semiconductor chip and has a length preferably of more than 55 microns to reduce the effect of &agr; particles from the solder from affecting electronic devices on the chip. The total length of the pillar is preferably in the range of 80 to 120 microns.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: June 17, 2003
    Assignee: Advanpack Solutions Pte. Ltd.
    Inventor: Francisca Tung
  • Patent number: 6550666
    Abstract: A predetermined amount of solder (315) is deposited on the free ends of copper posts (310) extending from die pads of a semiconductor die (305). The solder (315) is coated with flux (320) and the semiconductor die (305) is placed on a leadframe (100) with the solder deposits (315) abutting interconnect locations (335) on inner lead portions (101). When reflowed, the solder deposits (315) melt and with the assistance of the flux (320) forms solder interconnects between the free ends of the copper posts (310) and the interconnect locations (335). Due to the predetermined amount of solder (315) deposited on the free ends of the copper posts (310), the molten solder (315) tends not to flow away from the interconnect location (335). Thus, advantageously allowing a substantial portion of the solder deposit (315) to remain at the interconnect locations (335) to form solder interconnects.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: April 22, 2003
    Assignee: Advanpack Solutions Pte LTD
    Inventors: Jimmy Hwee Seng Chew, Kim Hwee Tan
  • Patent number: 6510976
    Abstract: An oxidized (220) copper leadframe and a semiconductor die with copper posts extending from die pads, and with solder balls coated (225) with flux on the end of the copper posts, are provided. The semiconductor die is placed (230) on the oxidized copper leadframe, with the solder balls abutting portions of the layer of oxide, above and aligned with, interconnect locations on the leadframe. When reflowed (235), the flux on the abutting portions of the oxide layer selectively cleans these portions of the oxide layer, away from the interconnect locations. In addition, the solder balls change to molten state and adhere to the cleaned copper surfaces at the interconnect locations. Advantageously, the rest of the oxide layer that is not cleaned away provides a passivation layer that advantageously contains and prevents the molten solder from flowing away from the interconnect locations.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: January 28, 2003
    Assignee: Advanpack Solutions Pte. Ltd.
    Inventors: Tan Kim Hwee, Romeo Emmanuel P. Alvarez
  • Publication number: 20020179689
    Abstract: A flip chip interconnect system comprises and elongated pillar comprising two elongated portions, one portion including copper and another portion including solder. The portion including copper is in contact with the semiconductor chip and has a length preferably of more than 55 microns to reduce the effect of &agr; particles from the solder from affecting electronic devices on the chip. The total length of the pillar is preferably in the range of 80 to 120 microns.
    Type: Application
    Filed: June 12, 2002
    Publication date: December 5, 2002
    Applicant: Advanpack Solutions Pte. Ltd.
    Inventor: Francisca Tung
  • Patent number: 6467676
    Abstract: An improved underfill adhesive encapsulant with fluxing activities containing an epoxy resin or a mixture of epoxy resin. An anhydride is used as the curing agent to harden the epoxy resin. A hydroxyl-containing fluxing precursor compound is added to the encapsulant composition to react with the anhydride curing agent to produce an active fluxing agent under typical reflow conditions. The use of a fluxing precursor gives improved reliability compared to conventional fluxing agents used in existing no-flow underfill encapsulants. A suitable catalyst such as imidazole, imidazole derivative or metal acetylacetonate is provided in the present encapsulant at concentrations that give good curing kinetics. A thermoplastic is optionally included to allow the cured encapsulant to be reworked.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: October 22, 2002
    Assignee: Advanpack Solutions PTE Ltd.
    Inventor: Tie Wang
  • Patent number: 6365435
    Abstract: In a no-flow underfill process 400, a substrate 10 is heated to an elevated temperature prior to dispensing underfill 5 thereon. The underfill 5 flows more readily over mask portions 20 and conductors 25 on the substrate 10, filling in spaces between the conductors 25 and the masking portions 20, thereby preventing air from being trapped thereabout. In addition, when a bumped die 40 is heated during placement on the substrate 10 with the underfill 5 therebetween, the underfill 5 flows around bumps 45 more readily thereby preventing air from being trapped thereabout. The result is a flip chip semiconductor package having a lower void density.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: April 2, 2002
    Assignee: Advanpack Solutions PTE LTD
    Inventors: Tie Wang, Colin Chun Sing Lum