Patents Assigned to Advantest
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Patent number: 11994552Abstract: A burn-in board includes: a board; a socket mounted on the board; a connector attached to the board; a wiring system that is disposed in the board and that connects the socket and the connector; and a compensation circuit that connects to the wiring system and that compensates a frequency characteristic of a signal transmitted through the wiring system.Type: GrantFiled: March 25, 2022Date of Patent: May 28, 2024Assignee: ADVANTEST CorporationInventor: Hiroaki Takeuchi
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Patent number: 11982646Abstract: An optical ultrasonic wave measuring apparatus includes an ultrasonic pulse output section, a light pulse output section, a reflected wave measuring section, an optoacoustic wave measuring section, an exceeding time point acquiring section, and a measurement result shifting section. The reflected wave measuring section measures, in correspondence to time, a reflected wave as a result of reflection of the ultrasonic pulse at a measuring target, which may be a skin surface. The optoacoustic wave measuring section measures, in correspondence to time, an optoacoustic wave generated by the light pulse at the measuring target. The exceeding time point acquiring section acquires an exceeding time point at which a measurement result of the reflected wave exceeds a predetermined threshold value. The measurement result shifting section shifts a measurement result of the optoacoustic wave by a first shift time toward the time point of output of the light pulse.Type: GrantFiled: May 28, 2021Date of Patent: May 14, 2024Assignee: ADVANTEST CorporationInventors: Taiichiro Ida, Hideaki Iwazaki
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Publication number: 20240111003Abstract: A magnetic field measuring apparatus for measuring a to-be-measured magnetic field includes a magnetic impedance element with an impedance change rate that changes depending on the to-be-measured magnetic field, a drive signal providing section and a measurement range setting section. The drive signal providing section provides a drive signal to the magnetic impedance element. A measurement range setting section sets a measurement range in which the to-be-measured magnetic field can be measured. A relationship between the to-be-measured magnetic field and the impedance change rate is arranged to change depending on a frequency of the drive signal. The measurement range setting section is arranged to set the measurement range by setting the frequency.Type: ApplicationFiled: February 1, 2022Publication date: April 4, 2024Applicant: ADVANTEST CORPORATIONInventors: Yoshiyuki HATA, Hisao HORI, Bunichi KAKINUMA
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Patent number: 11940487Abstract: An apparatus for thermal control of a device under test (DUT) includes a cooling structure operable to provide cooling, the cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet cooling material via an outlet port thereof, a variable thermal conductance material (VTCM) layer disposed on a surface of the cooling structure, and a heater layer operable to generate heat based on an electronic control, and wherein the VTCM layer is operable to transfer cooling from the cooling structure to the heater layer. A thermal interface material layer is disposed on the heater layer. The thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to the DUT. The apparatus includes a compression mechanism for providing compression to the VTCM layer to vary a thermal conductance of the VTCM layer. The compression mechanism is also for decoupling the VTCM layer from the heater layer.Type: GrantFiled: January 9, 2023Date of Patent: March 26, 2024Assignee: Advantest Test Solutions, Inc.Inventors: Samer Kabbani, Kazuyuki Yamashita, Ikeda Hiroki, Ira Leventhal, Mohammad Ghazvini, Paul Ferrari, Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera
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Publication number: 20240094311Abstract: A signal vector derivation apparatus receives measurement results from a plurality of sensors that receive signals each represented by a vector having a predetermined direction and measure triaxial components orthogonal to each other and derives the direction of the vector. The measurement results from the sensors are each proportional to a sum of the triaxial components of the vector multiplied, respectively, by first coefficients. The signal vector derivation apparatus includes a spectrum deriving section and a direction deriving section. The spectrum deriving section derives a spectrum obtained based on the measurement results from the sensors and a sum of the first coefficients multiplied, respectively, by second coefficients, the spectrum having local maximum values within voxels in which signal sources that output the respective signals exist. The direction deriving section derives the direction of the vector based on the second coefficients used to obtain the spectrum.Type: ApplicationFiled: March 7, 2022Publication date: March 21, 2024Applicant: ADVANTEST CORPORATIONInventors: Yuji OGATA, Tomonori YANAGIDA
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Patent number: 11913990Abstract: An automated test equipment for testing one or more devices under test, comprises at least one port processing unit, comprising a high-speed-input-output interface, HSIO, for connecting with at least one of the devices under test, a memory for storing data received by the port processing unit from one or more connected devices under test, and a streaming error detection block, configured to detect a command error in the received data, wherein the port processing unit is configured to, in response to detection of the command error, limit the storing in the memory of data following, in the received data, after the command which is detected to be erroneous. A method and computer program for automated testing of one or more devices under test are also described.Type: GrantFiled: November 10, 2020Date of Patent: February 27, 2024Assignee: Advantest CorporationInventors: Olaf Pöppe, Klaus-Dieter Hilliges, Alan Krech
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Patent number: 11913987Abstract: An embodiment is an automated test equipment (ATE) for testing a device under test (DUT) which is connected to the ATE via a load board. The ATE comprises a stimulus module, a measurement module, a loopback, a first switch, a second switch, and a load board interface. The load board interface comprises a first radio frequency port and a second radio frequency port. The first and second radio frequency ports are configured to be coupled to the respective ports of the load board. The first switch is configured to couple the first radio frequency port to the stimulus module in a first switching state of the first switch and the second switch is configured to couple the second radio frequency port to the measurement module in a first switching state of the second switch.Type: GrantFiled: April 14, 2022Date of Patent: February 27, 2024Assignee: Advantest CorporationInventor: Andreas Hantsch
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Patent number: 11906548Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT; a lid member that covers the DUT and is attached to the carrier body; and an identifier for identifying an individual of the test carrier.Type: GrantFiled: September 24, 2021Date of Patent: February 20, 2024Assignee: ADVANTEST CorporationInventors: Toshiyuki Kiyokawa, Kazuya Ohtani
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Patent number: 11899550Abstract: Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. In one embodiment, an enhanced auxiliary interface test system comprises a load board, testing electronics, controller, and memory mapped interface. The load board is configured to couple with a plurality of devices under test (DUTs). The testing electronics is configured to test the plurality of DUTs, wherein the testing electronics are coupled to the load board. The controller is configured to direct testing of the DUTs, wherein the controller is coupled to the testing electronics. The memory mapped interface is configured to implement multiple paths to access a central processing unit (CPU) on the controller and enable testing of multiple DUTs in parallel.Type: GrantFiled: January 28, 2021Date of Patent: February 13, 2024Assignee: Advantest CorporationInventors: Chi Yuan, Srdjan Malisic
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Patent number: 11899058Abstract: An automated test equipment for testing one or more DUTs comprises a test head and a DUT interface. The DUT interface comprises a plurality of blocks of spring-loaded pins, for example groups or fields of spring-loaded pins. For example, the DUT interface is configured for establishing an electronic signal path between the test head and a DUT board or load board, which holds the DUT or which provides a connection to the DUT. The automated test equipment is configured to allow for a variation of a distance between at least two blocks of spring-loaded pins.Type: GrantFiled: November 14, 2022Date of Patent: February 13, 2024Assignee: Advantest CorporationInventor: Marc Mössinger
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Patent number: 11902813Abstract: A measurement result receiving apparatus receives measurement results transmitted from a plurality of measuring devices, the measurement results obtained by conducting a measurement at a predetermined sampling interval according to a reference clock of each measuring device. The measurement result receiving apparatus includes a receiving section that receives the measurement results from the plurality of measuring devices; and a sampling interval converting section that converts the measurement results into measurement values associated with a common sampling interval.Type: GrantFiled: August 7, 2019Date of Patent: February 13, 2024Assignee: ADVANTEST CORPORATIONInventors: Takashi Fujisaki, Kazuhiro Shibano, Kenji Nishikawa
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Patent number: 11899059Abstract: An automated test equipment for testing one or more DUTs comprises a test head and a DUT interface. The DUT interface comprises a plurality of blocks of spring-loaded pins, for example groups or fields of spring-loaded pins. For example, the DUT interface is configured for establishing an electronic signal path between the test head and a DUT board or load board, which holds the DUT or which provides a connection to the DUT. The automated test equipment is configured to allow for a variation of a distance between at least two blocks of spring-loaded pins.Type: GrantFiled: November 15, 2022Date of Patent: February 13, 2024Assignee: Advantest CorporationInventor: Marc Mössinger
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Publication number: 20240027519Abstract: An electronic component testing apparatus for testing a device under test (DUT) includes: a socket unit that is electrically connected to the DUT; a first wiring board that includes a board opening; and a tester that includes a test head in which the first wiring board is mounted. The socket unit includes a first socket that faces a first main surface of the DUT and is electrically connected to the DUT and the first wiring board. The second socket that is exposed from the first wiring board through the board opening, contacts a second main surface of the DUT on a side opposite to the first main surface, and includes: a base that contacts the second main surface; and a test antenna unit that is electrically connected to the tester and faces a device antenna unit of the DUT.Type: ApplicationFiled: October 5, 2023Publication date: January 25, 2024Applicant: ADVANTEST CorporationInventors: Natsuki Shiota, Hiroyuki Mineo
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Publication number: 20240019295Abstract: An ultrasonic measurement apparatus includes a lens, an ultrasonic measuring section, an ultrasonic determining section, and a lens moving section. The lens receives an ultrasonic wave output from a measuring target. The ultrasonic measuring section measures the ultrasonic wave received by the lens in relation to time. The ultrasonic determining section determines whether or not the ultrasonic wave is included in a result of measurement by the ultrasonic measuring section at an elapsed time point when the time required for the ultrasonic wave to travel a focal distance of the lens has elapsed after the ultrasonic wave is output from the measuring target. The lens moving section moves the lens such that it is determined that the ultrasonic wave is included in the result of measurement by the ultrasonic measuring section.Type: ApplicationFiled: April 11, 2023Publication date: January 18, 2024Applicant: ADVANTEST CORPORATIONInventor: Taiichiro IDA
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Patent number: 11867720Abstract: Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. In one embodiment, a test system configuration adapter includes a tester side socket, a break out pin, and a device under test (DUT) side slot. The tester side socket is configured to couple with a test equipment socket. The break out pin is configured to couple with the supplemental equipment. The DUT side slot is configured to couple with the tester side socket, the break out pin, and a DUT. The test system configuration adapter is configured to enable communication between test equipment coupled to the test equipment socket and supplemental equipment coupled to the breakout pin while the DUT remains coupled to the DUT side slot. The breakout pin and tester side socket can be selectively coupled to the DUT side slot.Type: GrantFiled: November 16, 2020Date of Patent: January 9, 2024Assignee: Advantest CorporationInventor: Eddy Wayne Chow
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Patent number: 11860229Abstract: An automated test equipment (ATE) apparatus comprising a tester processor operable to generate commands and data for coordinating testing of a plurality of devices under test (DUTs). The ATE further comprises a field programmable gate array (FPGA) communicatively coupled to the tester processor, wherein the FPGA comprises routing logic operable to route signals associated with the commands and data in the FPGA based on a type of the device under test (DUT). Further, the ATE comprises a connector module communicatively coupled to the FPGA comprising a socket to which the DUT connects and further comprising circuitry for routing the signals to a set of pins on the DUT, wherein the set of pins are associated with a first type of DUT. The circuitry can support multiple different DUT types having a common form factor but different pinout assignments.Type: GrantFiled: March 5, 2021Date of Patent: January 2, 2024Assignee: Advantest CorporationInventor: Mei-Mei Su
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Publication number: 20230417812Abstract: A signal/noise determination apparatus includes a plurality of sensors, a determination model recording section, and a signal/noise determining section. The plurality of sensors measure a signal and a noise. The determination model recording section records a determination model used to determine whether components of results of measurement by the sensors expected with hypothetical signal information and hypothetical noise information are from a signal source or a noise source. The determination model is generated by machine learning with the measurement results, the hypothetical signal information, and the hypothetical noise information as training data. The signal/noise determining section determines whether components of the measurement results are from the signal source or the noise source based on the measurement results and the determination model.Type: ApplicationFiled: March 17, 2023Publication date: December 28, 2023Applicant: ADVANTEST CORPORATIONInventors: Yuji OGATA, Tomonori YANAGIDA
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Publication number: 20230417826Abstract: An electronic component handling apparatus pressing the DUT against a socket electrically connected to a tester, includes: a first receiver that receives, from the tester, a first signal indicating a detection value of a temperature detection circuit; a calculator that calculates a temperature of the DUT based on the first signal; a calibrator that calibrates the calculated temperature; a second receiver that receives, from the tester, a second signal that causes the calibrator to start a first calibration; and a temperature adjuster that adjusts the temperature of the DUT. The second receiver receives the second signal before the tester turns on the DUT, once the second signal is received, the calibrator calculates a first calibrated temperature by executing the first calibration with respect to the calculated temperature, and the temperature adjuster adjusts the temperature of the DUT based on the first calibrated temperature.Type: ApplicationFiled: November 30, 2020Publication date: December 28, 2023Applicant: ADVANTEST CorporationInventors: Matthias Werner, Takashi Hashimoto
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Patent number: 11852678Abstract: Placing a first side of an active thermal interposer device of a thermal management head against a device under test (DUT). Disposing a cold plate against a second side of the active thermal interposer. The DUT includes a plurality of modules and the active thermal interposer device includes a plurality of zones, each zone of the plurality of zones corresponding to a respective module of the plurality of modules and operable to be selectively heated. Receiving a respective set of inputs corresponding to each zone of the plurality of zones. Performing thermal management of the plurality of modules of the DUT by separately controlling temperature of each zone of the plurality of zones by controlling a supply of coolant to the cold plate, and individually controlling heating of each zone of the plurality of zones.Type: GrantFiled: December 6, 2022Date of Patent: December 26, 2023Assignee: Advantest Test Solutions, Inc.Inventors: Karthik Ranganathan, Gregory Cruzan, Paul Ferrari, Samer Kabbani, Martin Fischer
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Patent number: 11848150Abstract: A transformer arrangement comprises a primary winding and a secondary winding, which are magnetically coupled. The transformer arrangement also comprises a compensating arrangement, which is circuited to provide a link between a terminal of the primary winding and a terminal of the secondary winding. The compensating arrangement is configured such that a change of a magnetic flux through the primary winding and the secondary winding induces a voltage in the compensating arrangement. The compensating arrangement comprises at least one coupling capacitor configured to block a DC current and to pass a current caused by the induced voltage. The compensating arrangement is configured to at least partially compensate a current that is caused by an inter-winding capacitance between the primary winding and the secondary winding using the current caused by the induced voltage.Type: GrantFiled: April 13, 2020Date of Patent: December 19, 2023Assignee: Advantest CorporationInventor: Anton Thoma