Abstract: Circuits and a corresponding method are used to eliminate or greatly reduce SET induced glitch propagation in a radiation hardened integrated circuit. A clock distribution circuit and an integrated circuit portioning can be radiation hardened using one or two latch circuits interspersed through the integrated circuit, each having two or four latch stages.

Abstract: An integrated circuit counter includes a segmented thermometer coding counter architecture that reaches the thermodynamic energy minimum for a forward/reverse counting operation, requiring only one write or one erase operation per count so that energy consumption can be minimized, and circuit endurance maximized.

Abstract: A break-before-make (BB4M) circuit topology is disclosed for use with a multiplexer that eliminates shoot-through current between analog inputs and also between an analog input and analog output. The BB4M circuit generates a pulse that disables an existing selected channel before enabling a newly selected channel or gate driver, and is suitable for use in high-radiation or outer space operating environments.

Abstract: A break-before-make (BB4M) circuit topology is disclosed for use with a multiplexer that eliminates shoot-through current between analog inputs and also between an analog input and analog output. The BB4M circuit generates a pulse that disables an existing selected channel before enabling a newly selected channel or gate driver, and is suitable for use in high-radiation or outer space operating environments.

Abstract: A regulator circuit includes a voltage regulator having a stability control input and an output for providing a regulated output voltage, an amplifier circuit having an input for receiving an error voltage of the voltage regulator, and an output, and a control circuit having an input coupled to the output of the amplifier and an output coupled to the stability control input of the voltage regulator, such that the regulator stability is maximized while the error voltage is minimized. The voltage regulator includes an LDO voltage regulator, the amplifier circuit includes an operational amplifier circuit, and the control circuit includes a load-sensing or load-replicating circuit.

Abstract: A radiation-hardened reference circuit includes a precision voltage reference circuit for generating a current-controlling voltage at first and second terminals, a driver circuit for receiving the current-controlling voltage at first and second terminals and for generating an output reference voltage, and a differential sampling circuit having first and second input terminals coupled to the first and second terminals of the voltage reference circuit, and first and second output terminals coupled to the first and second terminals of the driver circuit.

Abstract: A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

Abstract: A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

Abstract: A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

Abstract: A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

Abstract: A sample and hold amplifier includes an input node for receiving an input current signal, a non-linear sampling capacitor circuit having an input coupled to the input node, an operational amplifier having a negative input coupled to an output of the non-linear sampling capacitor circuit, a positive input coupled to ground, and an output for providing a sample and hold voltage signal, and a linear capacitor coupled between the negative input and the output of the operational amplifier. The non-linear sampling capacitor includes a non-linear capacitor coupled between an intermediate node and ground, a first switch coupled between the input and the intermediate node configured to switch according to a first phase signal, and a second switch coupled between the output and the intermediate node configured to switch according to a second phase signal.

Abstract: An integrated circuit shielding technique utilizing stacked die technology incorporating top and bottom nickel-iron alloy shields having a low coefficient of thermal expansion of especial utility in conjunction with magnetoresistive random access memory (MRAM) and other devices requiring magnetic shielding.

Abstract: A method of incorporating active error correction inside a memory device is used, whereby memory scrub cycles can be completely hidden from an end user. The method simplifies the design of the memory interface and simplifies the data integrity management unit for the end user. An arbitration unit is implemented to allow concurrent processing of primary (user) and secondary (scrub) requests. The arbitration unit is location aware in context to the primary interface and is responsible for eliminating overlapping memory requests.

Abstract: A baseline restore circuit includes a current input for receiving a current pulse having a DC current baseline; a charge amplifier having an input coupled to the current input, and an output referenced to a DC voltage baseline; a feedback baseline restore circuit comprised of a switched capacitor integration circuit having an input coupled to the output of the charge amplifier, and an output coupled to the current input; and a sample control circuit controlling the switched capacitor circuit input to the integrator so that only the reference voltage baseline is sampled. The inputs to the sample control circuit are a window comparator, and a high rate pulse detector, both with inputs from the charge amplifier output.

Abstract: A voltage regulator includes a reference current scaling circuit comprising an input reference current, a scaled output source current and a corresponding first bias voltage, and a scaled output sink current and a corresponding second bias voltage; and a decision making circuit having a first voltage input for receiving a first reference voltage, a second voltage input for receiving a second reference voltage, a third voltage input for receiving the first bias voltage, and a fourth voltage input for receiving the second bias voltage, and an output for providing a regulated voltage.

Abstract: A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

Abstract: A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

Abstract: A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

Abstract: A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

Abstract: A preamplifier includes a differential pair of transistors receiving a bias current having a differential input and a differential output, a first resistor coupled to a first differential output node, a first transistor having a current path coupled between the first resistor and a power supply, a second resistor coupled to the first differential output node, a second transistor having a current path coupled between the second resistor and the power supply, a third resistor coupled to a second differential output node, a third transistor having a current path coupled between the third resistor and the power supply, a fourth resistor coupled to the second differential output node, and a fourth transistor having a current path coupled between the fourth resistor and the power supply, wherein a source of the second and third transistors are coupled together.