Abstract: A packet network employs frame aggregation to reduce the number of physical-layer frames employed to transfer a given amount of user data. A packet network might employ physical (PHY) and medium access control (MAC) layers of a wireless local area network (WLAN) operating in accordance with one or more IEEE 802.11 standards. Frame aggregation combines several separate, higher-layer frames with user data into one PHY-layer frame, thus increasing the amount of user data per PHY-layer frame transmitted. Frame aggregation improves the efficiency by reducing both PHY-layer overhead and MAC-layer overhead.

Abstract: In one embodiment, a receiver for providing a virtual local channel in a broadcast radio system that transmits a plurality of sets of local content corresponding to a plurality of different geographic regions is disclosed. The receiver includes a detector (e.g., 432), adapted to determine a regional identifier for the receiver. The receiver also includes a channel selector (e.g., 412), adapted to obtain a selected set of local content from among the plurality of sets of local content, based on the determined regional identifier, for inclusion in the virtual local channel. The determined regional identifier identifies the geographic region associated with the selected set of local content.

Abstract: The present invention provides a solder bump structure. In one aspect, the solder bump structure is utilized in a semiconductor device, such as an integrated circuit. The semiconductor device comprises active devices located over a semiconductor substrate, interconnect layers comprising copper formed over the active devices, and an outermost metallization layer positioned over the interconnect layers. The outermost metallization layer comprises aluminum and includes at least one bond pad and at least one interconnect runner each electrically connected to an interconnect layer. An under bump metallization layer (UBM) is located over the bond pad, and a solder bump is located over the UBM.

Abstract: In one embodiment, the presence of double talk (DT) is detected in a telecommunications network having a near-end user and a far-end user. The energies of both (1) a signal received from the far-end user by the near-end user and (2) a signal to be communicated from the near-end user to the far-end user are computed. An echo return loss (ERL) estimate is calculated based on the energy calculations, and a preliminary decision is made as to whether DT is present based on the ERL estimate and the energy calculations. If DT is detected, then a counter is set to a hangover value. If DT is not detected, then the counter is reduced. This process is repeated, and, for each iteration, a final decision as to whether DT is present is made based on the counter value.

Abstract: The present invention provides a method for transmitting data and a transceiver. In one embodiment, the method includes: (1) generating data blocks of a data package in a first transceiver to transmit to a second transceiver, the first transceiver including a micro-controller coupled to a digital signal processor, (2) generating identification data in the first transceiver for the data blocks, wherein the identification data is an index of a list of the data blocks to be transmitted and each of the data blocks is transmitted with the index and (3) identifying the data blocks to be transmitted to the second transceiver based on the identification data, wherein the microcontroller employs the index to manage transmission of the data blocks.

Abstract: An improved multi-channel receiver for satellite broadcast applications or the like. In an exemplary embodiment, a primary AGC loop controls an analog sub-receiver adapted to simultaneously receive multiple signals. Multiple digital demodulators, coupled to the sub-receiver, demodulate the multiple received signals. Multiple secondary AGC loops, one for each received signal, compensate for variations in demodulated signal strengths caused by the primary AGC loop. A feed-forward AGC compensation technique generates scalar control values for scaling the demodulated signals before the demodulated signals are processed by the secondary AGC loops. This at least partially compensates for gain variations caused by the primary AGC, reducing received signal drop-outs before the secondary AGC loops can compensate for the gain variations.

Abstract: Disclosed is a system and method for improving the linearity of a clock and data recovery (CDR) circuit. In one embodiment, a data stream is received, and the phase of a clock signal is adjusted using two interpolators. The phase of the output signal of the second interpolator is adjusted simultaneously with, and complementary to, adjusting the phase of the first interpolator. The first interpolator's output signal is injected into a first delay cell in a delay loop having a plurality of delay cells, and the output of the second interpolator is inactivated. When the maximum phase of the first interpolator's output signal is reached, the second interpolator's output signal is injected into another one of the delay cells, and the first interpolator's output signal is inactivated. The data stream is then recovered using the output of the delay loop as a clock signal.

Abstract: A multi-stage scheduler that provides improved bandwidth utilization in the presence of processor intensive traffic is disclosed. Incoming traffic is separated into multiple traffic flows. Data blocks of the traffic flows are scheduled for access to a processor resource using a first scheduling algorithm, and processed by the processor resource as scheduled by the first scheduling algorithm. The processed data blocks of the traffic flows are scheduled for access to a bandwidth resource using a second scheduling algorithm, and provided to the bandwidth resource as scheduled by the second scheduling algorithm. The multi-stage scheduler in an illustrative embodiment may be implemented in a network processor integrated circuit or other processing device of a communication system.

Abstract: A method and apparatus are disclosed for detecting a pilot signal in a wireless receiver using coherent combining/noncoherent detection techniques. Coherent combining/noncoherent detection techniques are used to detect the pilot signal whenever the receiver is already frequency locked, or otherwise known to have a small frequency offset Conventional noncoherent combining/noncoherent detection techniques are utilized to initially acquire the timing of the forward channel. Once the receiver is frequency locked, coherent combining/noncoherent detection techniques may be used to continuously detect the pilot signals. After the receiver is frequency locked, the residue frequency error is small over several consecutive correlator outputs The correlator outputs can thus be combined coherently (since the frequency error is known to be small), and the phase dependency is then eliminated by noncoherent detection.

Abstract: This disclosure, in one aspect, provides a method of manufacturing a semiconductor device that includes forming a collector for a bipolar transistor within a semiconductor substrate, forming a base within the collector, forming a patterned isolation layer over the collector and base, forming an emitter layer over the patterned isolation layer, forming an isolation layer over the emitter layer, patterning the patterned isolation layer, the emitter layer and the isolation layer to form at least one emitter structure having an isolation region located on a sidewall thereof, and forming a buried contact in the collector to a depth sufficient to adequately contact the collector.

Abstract: A survivor path memory is provided for a Viterbi detector. The survivor path memory comprises a plurality of columns, each associated with a different time step, and an input processor. Each column comprises a flip flop for storing one bit or portion of a bit sequence associated with a Viterbi state; and a multiplexer for each state controlled by a case signal indicating a time step, the multiplexer selecting a state from a previous time step, wherein an output of the multiplexer of a given state is connected to at least one data input of a flip flop of the given state. The input processor generates a control signal that exchanges one or more pointers based on a trellis structure, wherein each of the pointers points to one of the flip flops.

Abstract: In one embodiment, an apparatus comprising a housing and a fastener, such as a clip (101, 201) for fastening the apparatus (100, 200) to an article of clothing. The housing (102, 202) has a recess (103, 203) formed therein, such that at least a portion of the fastener is adapted to fit within the recess. The fastener is adapted to travel slidably within the recess (103, 203) between a first position in which the fastener enables the apparatus (100, 200) to be fastened to an external object and a second position in which the fastener is stowed away.

Abstract: An improved speakerphone for a cellular telephone, portable telephone handset, or the like. In one embodiment, a receiver provides an audio signal, and a first phase-shifter phase-shifts the audio signal by a first phase-shift amount. A second phase-shifter phase-shifts the audio signal by a second phase-shift amount and drives a loudspeaker. A detector generates average and peak values of the first phase-shifted audio signal. A processor sets the first phase-shift amount to each one of a plurality of phase-shift amounts and calculates a corresponding average-to-peak ratio value from the peak and average values. The processor then selects one of the plurality of phase-shift amounts having a corresponding average-to-peak ratio value that meets at least one criteria (e.g., the largest one of the average-to-peak ratio values), and then sets the second phase-shift amount to be the same as the selected phase-shift amount. This enhances the perceived loudness of sound from loudspeaker.

Abstract: Methods and apparatus are provided for adapting one or more equalization parameters in a communications system by reducing group delay spread. According to one aspect of the invention, one or more equalization parameters in a communications system are adapted by detecting one or more predefined run length patterns in a received signal, such as a plurality of consecutive same-valued bits; evaluating a transition latch value for each of the detected predefined run length patterns, wherein the transition latch value provides an indication of whether the received signal is under-equalized or over-equalized; and adjusting the one or more equalization parameters of the communications system based on the evaluation of the transition latch value. The adjusted equalization parameters may be employed to equalize intersymbol interference. A data eye monitor can be employed to evaluate the transition latch value.

Abstract: A method is provided that includes forming a trench isolation structure in a dynamic random memory region (DRAM) of a substrate and patterning an etch mask over the trench structure to expose a portion of the trench structure. A portion of the exposed trench structure is removed to form a gate trench that includes a first corner formed by the substrate and a second corner formed by the trench structure. The etch mask is removed and the first corner of the gate trench is rounded to form a rounded corner. This is followed by the formation of an oxide layer over a sidewall of the gate trench, the first rounded corner, and the semiconductor substrate adjacent the gate trench. The trench is filled with a gate material.

Abstract: In one embodiment, a receiver is provided for use in a multiple-input system that includes a receiving antenna receiving a time-domain signal corresponding to a plurality of signals transmitted from a plurality of transmitting antennas. The receiver includes: (a) a transform unit adapted to transform the time-domain signal into a frequency-domain signal; (b) a channel estimation unit adapted to estimate, based on the frequency-domain signal and a frequency-domain pilot signal, a combined transfer function corresponding to a plurality of transfer functions of respective channels between the plurality of transmitting antennas and the receiving antenna; and (c) a channel separation unit including a plurality of frequency-domain convolution units that separate the combined transfer function into a plurality of estimated channel transfer functions.

Abstract: A memory device comprises a memory array and error correction circuitry coupled to the memory array. The error correction circuitry is configured to identify, in a data word retrieved from the memory array, at least one bit position corresponding to a predetermined defect location in the memory array, and to generate a corrected data word by automatically inverting a logic value at the identified bit position. This automatic logic inversion approach is particularly well suited for use in correcting output data errors associated with via defects and weak bit defects in high-density ROM devices.

Abstract: Most recently accessed frames are locked in a cache memory. The most recently accessed frames are likely to be accessed by a task again in the near future and may be locked at the beginning of a task switch or interrupt to improve cache performance. The list of most recently used frames is updated as a task executes and may be embodied as a list of frame addresses or a flag associated with each frame. The list of most recently used frames may be separately maintained for each task if multiple tasks may interrupt each other. An adaptive frame unlocking mechanism is also disclosed that automatically unlocks frames that may cause a significant performance degradation for a task. The adaptive frame unlocking mechanism monitors a number of times a task experiences a frame miss and unlocks a given frame if the number of frame misses exceeds a predefined threshold.

Abstract: In one embodiment, a method for processing data packets having a payload and a checksum, wherein the payload has a first portion of interest. If a received data packet fails a CRC check, then it is determined whether the first portion has a valid relationship with one or more previous first portions of one or more corresponding previous payloads of one or more corresponding previous data packets. If the relationship is valid, then the first portion is output. The method enables recovery of first portions of interest from corrupted data packets having transmission errors in other parts of the data packets, thereby potentially decreasing retransmissions and increasing throughput.

Abstract: Methods and apparatus are provided for blind transport format detection using Discontinuous Transmission (DTX) detection. According to one aspect of the invention, the transport format that was used to transmit information is determined by identifying a transition between a Discontinuous Transmission segment and a data segment included in the transmitted information; and determining the transport format based on a location of the transition of the Discontinuous Transmission segment. A cyclic redundancy check can optionally be performed for a plurality of possible transport formats, and then the step of identifying a transition can be limited to those transport formats having a valid cyclic redundancy check.