Abstract: A multiprocessor system having a total number of available CPUs partitioned into one or more smaller pools of CPUs called servers where the number of CPUs available to a server is reduced below the total number of available CPUs. Software licensing costs are thereby reduced because the number of CPUs available to run the operating system or ISV software has been reduced to the number of CPUs in the pool of the server rather than the total number of available CPUs in the multiprocessor system. In order to enforce the isolation of CPUs required by software licensing, separate identification codes, CPUIDs, that contain unique system serial numbers are assigned to each server in the multiprocessing system. The multiprocessor system has multiple CPUIDs, one for each server (each pool of CPUs that can execute operating systems and ISV software).

Abstract: The present invention is a mask ordering method and apparatus which controls the way keys are compared. In its general form, the mask ordering method operates to order (with a less than, greater than or equal to comparison) two N-byte (for example, N=16) keys (Key—1 and Key—2) using an N-bit ordering mask where the N bits in the ordering mask correspond one for one with the N bytes in the keys in the same compare direction (either left-to-right or right-to-left).

Abstract: A secure funds device for use with a computer system, such as a personal computer, for transferring funds, in response to a funds transfer request for amounts of funds from the computer system, to a funds receiver. One or more electronic cash devices store electronic funds and transfer funds in response to funds transfer request when authorized by an authorization signal. A processor is used for connecting the funds transfer request from the computer system to the electronic cash device and for transferring electronic funds from the electronic cash device to the computer system when the authorization signal is present. User control means, including for example a pushbutton switch and an LCD display, that is not accessible by the computer system is used for providing the authorization signal. The secure funds device has a secure interface that prevents the computer system from generating the authorization signal.

Abstract: A value data system for secure electronic storage, transfer and other processing of value data using repositories of security controlled devices. The value data system includes a repository container including one or more of the repositories and a container security unit providing security signals as a function of conditions detected in the repository container. The repositories transfer data from or to the security controlled devices in response to a client request from a client system. Each repository in the value data system includes a security enclosure containing the security controlled devices. Each security controlled device includes a deactivation unit for electronically deactivating the security controlled device. The repository includes a repository processor unit connecting a value data transfer request from the client system to the security controlled devices and for transferring value data from the security controlled devices.

Abstract: A system that employs virtual addressing for structures in a coupling facility. The system operates to share data among two or more processes that execute on central processing complexes. The central processing complexes each have an inter-system channel connected to a coupling facility. The coupling facilitcludes coupling facility receivers where each receiver connects to one of the inter-system channels for making transfers between the coupling facility and the central processing complexes. The coupling facility includes storage, connected to the coupling facility receivers, for storing control objects and data objects at real addresses in one or more structures, where the real address are translatable from corresponding virtual addresses. The coupling facility includes CPUs, connected to the coupling facility receivers and to the storage, for controlling the operation of the coupling facility.

Abstract: A computer system includes a transparent data migration facility (TDNff) to accomplish automated movement of data (migration) from one location to another in the system. A data migration program includes a main module to control the start of a migration session when said application programs are using data accessed to and from the source volume, to migrate data from the source volume to the target volume, and to end the migration session whereby the application programs are using data accessed to and from the target volume. The data migration program includes a volume module to control the volumes during the migration session. The data migration program includes a copy module to control the copying of data from the source module to the target module during the migration session. The data migration program includes a monitor module for monitoring I/O transfers to the data volumes during the migration sessions.

Abstract: A system for maintaining the integrity of data stored in a branch prediction mechanism such as a branch target buffer (BTB). Upon encountering a branch instruction, a stream of target instructions is prefetched from cache memory even though the target instruction stream is provided from the BTB. The target instruction stream prefetched from cache is then compared with the predicted target stream selected from the BTB. Upon encountering a mismatch, the predicted instruction stream is canceled and the instructions from cache are utilized. Additionally, predicted branch target addresses are stored in a BTB, similar to a branch history table, and circuitry is provided for comparing the predicted target address with an actual target address during processing of the branch instruction. Again upon encountering a mismatch, instruction from cache as addressed by the actual target address are utilized and predicted instructions are canceled.

Abstract: A system for program development and execution consisting of a high level programming language based on a four part rule organization, consisting of a rule definition, a list of conditions, a list of actions which are taken upon satisfaction of a corresponding condition, and a list of exception handlers. The high level language is translated into an internal representation which controls a virtual stack machine. The virtual stack machine performs dynamic binding of rules and data to the current rule. Data access events are supplied through a table access method which provides an interface to the variety of sources of data coupled to the system. These sources of data include screens, import/export mechanisms, a foreign database system, such as IMS, and a local database system known as the table data store. The table data store organizes data in an object oriented, relational system, where each table is ordered on a primary key.

Abstract: A channel time-out apparatus in a data processing system having a channel processor for controlling the allocation of a plurality of input/output channels. The channel time-out apparatus comprises a clock for generating time indications, an address generator for generating an address for each input/output channel of the plurality of input/output channels, a time-out generator for generating a time-out indicator for an input/output channel whenever that input/output channel processes an instruction, storage for storing the last time-out indicator generated by the time-out means for each input/output channel and a comparator for comparing the last time-out indicator stored in the storage for the input/output channel whose address is presently being generated by the address generator with a time indicator presently being generated by the clock for determining when a time-out event has occurred without requiring intervention by the processor.

Abstract: A multiprocessor (MP) computer sytem which allows target CPU(s) to continue processing instructions while other target CPU(s) are processing instructions of emulation code to reach their end of a Domain Unit of Operation before synchronization. A two-level MP sync is used since the target CPUs must be in between units of operation when the updates occur since a unit of operation can be one instruction or it can be many instructions that together emulate one instruction. Two level MP sync allows CPUs that are going to be serialized to continue to process single instructions (no emulation code) while other target CPUs are in emulation mode.

Abstract: A storage unit for a data processing system includes a cache data buffer, a cache tag, and a translation lookaside buffer (TLB). Storage keys are maintained in the TLB with a separate valid bit, which allows a valid translation to be stored upon completion of a translation, even though the key is not yet available. With a valid translation in the TLB entry available, the requesting port is then able to send off a move in request to mainstore right away in parallel with a key request from the translator to the mainstore key array. In the typical case, the key will be returned several cycles ahead of the data, allowing it to be written into the TLB entry and validated in time for the move in data to be successfully bypassed to the requestor as soon as it arrives.

Abstract: A programmable computer which operates by executing rules, each including a rule name, and optionally: input parameters, a set of conditions, a set of actions associated with each condition, and a set of exception handlers. A condition is a logical expression which evaluates to a true or false boolean value, while an action is an executable statement. An exception handler contains executable statements.The computer includes text entry and display means for programming of rules. A rule is displayed with each condition and each action having a row of text. The computer generates a yes/no quadrant into which a programmer may enter sequence numbers, to associate ordered sets of actions with individual conditions. Sequence numbers may be entered not associated with any condition, to define a set of default actions.Upon entering a rule, the computer sequentially evaluates the rule's conditions.

Abstract: An object access system for retrieving objects in response to requests identifying requested objects, the system comprising an access structure consisting of a plurality of tables where each table is identified by a unique table identifier and has a plurality of rows where each row has a plurality of fields and is identified by a unique primary key in one of the fields and where a field may also contain objects; a row index for each table, each row index having entries ordered on the primary key of the rows in the table where each entry points to a row of fields in the table; a table index ordered on the table identifier for the tables, the table index having an entry for each table which point to the row index for that table and access means, responsive to requests for an object having an associated table identifier and primary key, for searching the table index for the requested table identifier and for retrieving from the table index entry for the requested table identifier the pointer to the row index for

Abstract: In a system having a plurality of sources for generating tasks and a plurality of receivers for receiving said tasks wherein a plurality of said tasks for one or more said receivers may be generated at the same time by one or more of said sources, each said receiver having a unique address within said system, an apparatus comprising a storage means for storing said tasks generated by said sources; an address means for generating, in each system cycle, the address of one of said receivers; and priority means connected to said address means and said storage means for establishing priority among the tasks for the receiver whose address is being generated by said address means and for generating a signal indicating which said task has priority, where said priority is established as a function of said selected tasks location in said storage means and the sequence that said selected tasks were stored in said storage means.

Abstract: A computer which executes rules which are defined according to a language having a valid grammar.

Abstract: A method for manipulating a database of data and rules stored in a computer system where the computer operates in accordance with object-coded rules defined by a specified object code grammar. The computer including storage means for storing data and object-coded rules in tables in conformance with a storage architecture, control means for storing, retrieving and deleting data and object-coded rules from the tables, translator means for translating source-coded rules into object-coded rules, detranslator means for translating object-coded rules into source-coded rules and scanner means for determining lexical validity of an object-coded rule according to the grammar.

Abstract: A computer method for executing a GET instruction for retrieving the first record stored in a data base that meets the stated criteria and for issuing an exception when no such record is found.

Abstract: An apparatus and method for processing channel time-out for input/output channels in a data processing system. A counting device is provided which cycles through a count indicative, in a first part, of each of a plurality of channels in the data processing system and, in a second part, a sequence of time indications. A time indication is saved for a particular channel upon the execution of an instruction for that channel and subsequent comparisons are made of the stored time indication and the present time indication to determine if a difference in these two time indications is sufficient to constitute a time-out.

Abstract: An access control apparatus in a computer system for controlling access to an ALB. A host ALBID register and a guest ALBID register is provided for storing a host and a guest ALB identifier (ALBID) and a host and a guest ALBID validity indicator. Control State Software generates and stores the host and guest ALBIDs in the host and guest ALBID registers and marks valid the host and guest ALBID validity indicator whenever a host or guest mode is initiated or a logical purge is requested by a logical processor and for storing the host or guest ALBID stored in the host and guest ALBID registers when an ALB entry is made in the ALB by a logical processor.