Abstract: A method and apparatus for protecting hypersensitive microcircuits on the face of a semiconductor wafer from contamination and mechanical damage during die sawing and subsequent die handling operations include the provision of a plastic sheet having an array of protective domes formed into it, the array corresponding to the array of microcircuits on the wafer, and the temporary adhesion of the sheet to the face of the wafer such that each die in the wafer is covered by a respective one of the domes, with an associated one of the microcircuits protectively sealed therein. Die sawing is performed with the component side of the wafer facing up, the cut passing between the domes and through the thicknesses of both the domed sheet and the wafer such that each die is separated from the wafer, with a corresponding one other domes still attached to it. The domes may be removed later when the dies are located in a more benign environment by simply peeling them off the die.

Abstract: Chip-scale semiconductor packages of the fan-out type and methods of manufacturing such packages are disclosed. In one package embodiment within the invention, the package substrate is stiff enough to effectively carry an increased number of solder balls on an exterior area outside the edge of a semiconductor chip, in addition to the area above the chip. In another package embodiment, a molded support is mounted to the lower surface of the exterior area. The methods of the present invention include making a plurality of packages on a substrate. Prior to sawing a wafer to obtain chips for the assembly method, the wafer is inspected so as to discriminate between good chips and the defective chips. Only good chips are mounted to a wafer-shaped or strip-shaped substrate.

Abstract: This invention provides a method apparatus for electrically connecting a semiconductor die, such as a power MOSFET, to a substrate on which the die is mounted, e.g., a lead frame, with a conductive strap, such that the connection is resistant to the shear stresses incident upon it with changes in temperature of the device. The method includes providing a conductive strap, and in one embodiment thereof, forming a recess in the top surface of the substrate. The bottom surface of a flange portion of the strap is attached to the floor of the recess such that the recess captures the flange and prevents relative horizontal movement of the flange and substrate with variations in the temperature of the device. Other embodiments include attaching the strap to the die and substrate with joints of a resilient conductive elastomer, and forming apertures in the strap and substrate that cooperate with a conductive joint material to reinforce the connection against temperature-induced shear forces.

Abstract: An image sensor package includes a molding having an interior locking feature and an exterior locking feature. The molding is a low cost molded part. The image sensor package further includes a window having an interior surface and an exterior surface. The exterior locking feature of the molding contacts a periphery of the exterior surface of the window and the interior locking feature of the molding contacts a periphery of the interior surface of the window. In this manner, the window is supported by the molding both top and bottom. Also, the distance which moisture must travel along the interface between the molding and window to reach the image sensor is maximized thus essentially eliminating moisture ingress into the image sensor package.

Abstract: A micromirror device package includes a micromirror device chip having a micromirror device area on an upper surface of the micromirror device chip. A window is mounted above the micromirror device area and to the upper surface of the micromirror device chip by a bead. By forming the window of borosilicate glass and the bead of solder glass, the micromirror device area is hermetically sealed. In this manner, corrosion and contamination of the micromirror device area is prevented.

Abstract: A package for one or more semiconductor die is disclosed, along with a method of making the package. In one embodiment, the package includes a substrate having opposed top and bottom surfaces and an aperture therebetween. The substrate includes an insulative layer and top and bottom metal layers on the insulative layer around the aperture. The metal layers are electrically connected through the insulative layer. At least one die is supported within the aperture by an insulative encapsulant material. The bottom surface of the die is exposed. In alternative embodiments, a stack including a plurality of die (e.g., two die) are supported in the aperture. Rectangular metal are provided in a single row on the bottom surface of the substrate along at least two edges of the package.

Abstract: A lead frame for making a semiconductor package is disclosed. The leadframe's leads include a lead lock provided at a free end of each inner lead that is adapted to increase a bonding force of the inner lead to a resin encapsulate, thereby effectively preventing a separation of the inner lead from occurring in a singulation process involved in the fabrication of the semiconductor package. A semiconductor package fabricated using the lead frame and a fabrication method for the semiconductor package are also disclosed.

Abstract: A die mounting apparatus that includes: 1) a die including a bottom surface having an active region is located among the bottom surface and a first and second bond pads provided on the bottom surface outside of the active region; 2) a substrate including a top surface and protruding electrical contacts that are electrically coupled to the first and second bond pads; and 3) a first encapsulant circumscribing a periphery of the die, where the first encapsulant, the bottom surface of the die, and the top surface of the substrate define a free space. The first encapsulant extends inwards from the periphery of the die towards the active region but does not contact the active region. Advantageously, the first encapsulant forms a seal around the die to protect its active region from the environment. A further advantage is that the first encapsulant provides added security that bond pads of the die will remain in contact with contacts formed among the substrate even after distortion of the shape of the die.

Abstract: A method of making a PCB having an integral heat spreader and/or central ground plane includes forming one or more first openings in a first layer of a metal at selected locations and filling the. openings with an electrically insulating material. The first sheet is laminated between second and third layers of a metal interleaved with first and second layers of a dielectric material. At least one second opening is formed through the insulating material in one of the first openings, and at least one third opening is formed in the laminate at a position displaced from the first openings. The upper and lower layers of metal are electrically connected to each other through the at least one second and third openings to define “vias” through the laminate. The vias comprise “clearance vias” from which the first metal sheet is electrically isolated, and “thermal vias” to which the first metal sheet is electrically connected.

Abstract: Disclosed herein are semiconductor packages and stacks thereof. An example package includes an insulative substrate having a first surface, first apertures, a second aperture, and circuit traces on the first surface. A first portion of each circuit trace overlies a first aperture and an end of the circuit trace is near the second aperture. A solder ball is in each first aperture, fused to the overlying circuit trace. A semiconductor die is in the second aperture and is electrically connected to the ends of the traces. A third aperture may extend through the first portion of each circuit trace. A second package can be stacked on a first package. Solder balls of the second package each fuse with an underlying solder ball of the first package through a third aperture of the first package. The dies of the stacked packages may be positioned for optical communication with each other.

Abstract: A substrate includes a flip chip bond pad and a first bond pad on a dielectric substrate layer. First and second organic solderability protectant (OSP) layers are on the flip chip bond and first bond pad, respectively. A solder paste is on the first OSP layer. The solder paste is reflowed in an inert atmosphere to form a solder-on-pad (SOP) directly on and in contact with the flip chip bond pad. A sufficient thickness of the second OSP layer remains after reflow to inhibit oxidation of the first bond pad.

Abstract: A method for forming a snapable multi-package array substrate, snapable multi-package array and snapable packaged electronic components is disclosed. The snapable multi-package substrate is formed with trenches that separate and define sections where individual packaged electronic components are fabricated in a snapable multi-package array, and where individual packaged electronic components are singulated from the snapable multi-package array of the invention by simply applying hand pressure to break or “snap” individual packaged electronic components apart.

Abstract: A structure includes a substrate such as a wafer or an array of packages. The substrate has a front-side surface and a back-side surface. A reference feature such as a scribe grid is on the front-side surface. In at least one alignment mark is on the back-side surface, the alignment mark having a precise positional relationship to the reference feature on the front-side surface. The reference mark is used to cut the substrate from the back-side surface.

Abstract: An apparatus for mounting an electronic device on a substrate without soldering is disclosed. The apparatus includes a body and a plurality of cantilever beams extending from the body. The apparatus is mounted on the substrate. The electronic device is placed within the apparatus. In one embodiment, the cantilever beams press against the electronic device. In another embodiment, the cantilever beams engage the substrate. The apparatus presses an array of electrical contacts of the electronic device (e.g., interconnection balls) against corresponding metal pads of the substrate, thereby forming an electrical connection.

Abstract: A plurality of pressure sensor dice are attached to an array of pressure sensor die attach sites located on a substrate. The pressure sensor dice are then electrically connected to the pressure sensor die attach sites using standard wire bond techniques. The resulting array of pressure sensor sub-assemblies is then molded, using a mold tool that closes on three sides of the substrate so that a cavity is formed that is open on the fourth side. A portion of the outer surface of the micro-machine element of each pressure sensor die is left exposed at the bottom of a cavity or hole in the encapsulant. After molding, the exposed outer surface of the micro-machine element is covered with a pressure coupling gel applied in the cavity. The resulting array of packaged pressure sensors are then sigulated using well know sawing or laser techniques or by snapping a specially formed snap array.

Abstract: A lead frame for a semiconductor package including a rectangular lead frame body having a central opening, a plurality of leads arranged at and along each of two or four facing sides of the lead frame body, the leads extending in flush with the lead frame body, and a semiconductor chip mounting plate positioned on a plane not flush with a plane, where the leads are positioned, the semiconductor chip mounting plate being supported by down-set tie bars and provided with at least one groove having a rectangular ring shape while serving to prevent a penetration of moisture and to provide an increased coupling strength for the semiconductor chip mounting plate, the semiconductor chip mounting plate also serving as a heat sink. A ground bridge bar having a rectangular ring shape is arranged between the semiconductor chip mounting plate and the leads and supported by another tie bars.

Abstract: A semiconductor device has multiple, stacked dies in which the back surfaces of each die can be biased to the same or a different electrical potential. The device includes a substrate having a plurality of electrically conductive leads arrayed around an electrically conductive die-mounting pad. A first semiconductor die is mounted on and in electrical connection with the pad. A uniformly thin spacer is mounted on the first die inside the inner periphery of the wire bonding pads thereon and such that the spacer is electrically isolated from the first die. A second die is mounted on the spacer with a layer of electrically conductive material. The layer of conductive material and the die pad are electrically connected to the same or different leads of the substrate such that, by connecting the leads to the same or different electrical potentials, the respective back surfaces of the dies are biased to the same or different potentials.

Abstract: A plurality of pressure sensor dice are attached to an array of pressure sensor die attach sites located on a custom substrate having holes. The pressure sensor dice are then electrically connected to the pressure sensor die attach sites using standard flip chip techniques. The resulting array of pressure sensor sub-assemblies is then molded, so that a cavity is formed that is open at the bottom of each hole in the custom substrate. A portion of the outer surface of the micro-machine element of each pressure sensor die is left exposed at the bottom of the hole in the substrate. After molding, the exposed outer surface of the micro-machine element is covered with a pressure coupling gel applied in the hole. The resulting array of packaged pressure sensors are then sigulated using well know sawing or laser techniques or by snapping a specially formed snap array.

Abstract: Packages for an integrated circuit die and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts, bond wires, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad and the contacts have side surfaces which include reentrant portions and asperities to engage the encapsulant. A method of making a package includes providing a metal leadframe having a die pad in a rectangular frame. Tabs extend from the frame toward the die pad. The die pad and tabs have side surfaces with reentrant portions and asperities. A die is attached to the die pad. The die is electrically connected to the tabs. An encapsulant is applied to the upper and side surfaces of the leadframe. Finally, the leadframe is cut in situ so that the die pad and tabs are severed from the frame, the sides of the package are formed, and the package is severed from the leadframe.

Abstract: Semiconductor packages and other electronic assemblies having an active heat sink are disclosed, along with methods of making the same. The active heat sink includes a cavity partially filled with a heat activated liquid. Heat generated during operation of a chip boils the heat activated liquid. The vapor condenses on an inner surface of the active heat sink and transfers heat to an outer, possibly finned, surface exposed to ambient to dissipate heat. In some embodiments, the active heat sink may be a closed vessel mounted on the chip. In some embodiments, the vessel of the active heat sink is formed from a die pad of a leadframe substrate. The die pad includes a recess that forms the active heat sink cavity when bonded to the back surface of the chip. The heat activated liquid directly contacts the back surface of the chip in these embodiments.