Patents Assigned to Amkor Technology Singapore Holding Pte Ltd.
  • Publication number: 20210013142
    Abstract: A packaged semiconductor device has a die attach pad and leads disposed proximate to the die attach pad. Each lead has a lead bottom surface and a lead end surface. A semiconductor device attached adjacent to a top surface of the die attach pad, and a conductive clip is attached to the semiconductor device and at least one of the leads. The conductive clip comprises a first tie bar extending from a first side surface of the conductive clip. A package body encapsulates the semiconductor device, the conductive clip, portions of the leads, at least a portion of the first tie bar, and at least a portion of the die attach pad. Each lead end surface is exposed in a side surface of the package body, and an end surface of the first tie bar is exposed in a first side surface of the package body. A conductive layer is disposed on each lead end surface but is not disposed on the end surface of the first tie bar.
    Type: Application
    Filed: September 29, 2020
    Publication date: January 14, 2021
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Siang Miang YEO, Mohd Hasrul Bin ZULKIFLI
  • Publication number: 20210013144
    Abstract: In one example, a semiconductor device comprises a substrate comprising a dielectric, a first conductor on a top side of the dielectric, and a second conductor on a bottom side of the dielectric, wherein the dielectric has an aperture, and the first conductor comprises a partial via contacting a pad of the second conductor through the aperture, an electronic device having an interconnect electrically coupled to the first conductor, and an encapsulant on a top side of the substrate contacting a side of the electronic device. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: July 10, 2019
    Publication date: January 14, 2021
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Ji Yeon Ryu, Jae Beom Shim
  • Publication number: 20210013136
    Abstract: In one example, a semiconductor device comprises a substrate and an electronic device on a top side of the substrate, a lead frame on the top side of the substrate over the electronic device, wherein the lead frame comprises a connection bar and a lead, a component mounted to the connection bar and the lead on a top side of the lead frame, and an encapsulant on the top side of the substrate, wherein the encapsulant contacts a side of the electronic device and a side of the component. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: July 8, 2019
    Publication date: January 14, 2021
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Hyung Jun Cho, Kyoung Yeon Lee, Tae Yong Lee, Jae Min Bae
  • Patent number: 10886235
    Abstract: An integrated shield electronic component package includes a substrate having as upper surface, a lower surface, and sides extending between the upper surface and the lower surface. An electronic component is mounted to the upper surface of the substrate. An integrated shield is mounted to the upper surface of the substrate and includes a side shielding portion directly adjacent to and covering the sides of the substrate. The integrated shield covers and provides an electromagnetic interference (EMI) shield for the electronic component, the upper surface and sides of substrate. Further, the integrated shield is integrated within toe integrated shield electronic package. Thus, separate operations of mounting an electronic component package and then mounting a shield are avoided thus simplifying manufacturing and reducing overall assembly costs.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: January 5, 2021
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Paul Mescher, Danny Brady
  • Publication number: 20200411397
    Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
    Type: Application
    Filed: September 11, 2020
    Publication date: December 31, 2020
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
  • Patent number: 10872879
    Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: December 22, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Seong Kim, Edwin J. Adlam, Ludovico E. Bancod, Gi Jung Kim, Robert Lanzone, Jae Ung Lee, Yung Woo Lee, Mi Kyeong Choi
  • Publication number: 20200395272
    Abstract: A semiconductor device comprises a substrate having a substrate top side, a substrate lateral side, and a substrate bottom side, an electronic device on the substrate top side, and an encapsulant on the substrate top side and contacting a lateral surface of the electronic device. The substrate comprises a conductive structure and a dielectric structure that extends comprising a protrusion in contact with the encapsulant. The conductive structure comprises a lead comprising a lead flank, the lead flank comprising a cavity and a conductive coating on a surface of the lead in the cavity. The conductive structure comprises a pad exposed at the substrate top side, embedded in the dielectric structure, and adjacent to the protrusion, to electrically couple with the electronic device via a first internal interconnect. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: June 11, 2019
    Publication date: December 17, 2020
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Won Bae Bang, Kwang Seok Oh, George Scott
  • Patent number: 10867956
    Abstract: A method for manufacturing a semiconductor device, for example formed utilizing component stacking. As non-limiting examples, various aspects of this disclosure provide a method for reducing warpage and/or stress in stacked semiconductor devices.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: December 15, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Won Chul Do, Jin Hee Park
  • Patent number: 10867984
    Abstract: A method for manufacturing a semiconductor package, for example a package-on-package type semiconductor device package. As non-limiting examples, various aspects of this disclosure provide high-yield methods for manufacturing a package-on-package type semiconductor package, or a portion thereof.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: December 15, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Dong Jin Kim, Jin Han Kim, Se Woong Cha, Ji Hun Lee, Joon Dong Kim, Yeong Beom Ko
  • Patent number: 10861776
    Abstract: Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of a metal leadframe, wherein at least two of the bond fingers comprise one or more recessed self-alignment features. A reflow process may be performed on the semiconductor die and leadframe, thereby melting solder bumps on the semiconductor die such that a solder bump may be pulled into each of the recessed self-alignment features and aligning the solder bumps on the semiconductor die to the bond fingers. The recessed self-alignment features may be formed utilizing a chemical etch process or a stamping process. A surface of the recessed self-alignment features or the bond fingers of the metal leadframe may be roughened. A solder paste may be formed in the recessed self-alignment features prior to placing the semiconductor die on the bond fingers of the metal leadframe.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: December 8, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventor: Marc Alan Mangrum
  • Publication number: 20200381404
    Abstract: In one example, a semiconductor device comprises a base assembly comprising a first substrate, a first device on a top surface of the first substrate, and a first encapsulant on the top surface of the first substrate and bounding a side surface of the first device. The semiconductor device further comprises a conductive pillar on the first substrate and in the first molding compound, wherein the conductive pillar comprises a non-conductive pillar core and a conductive pillar shell on the pillar core.
    Type: Application
    Filed: May 28, 2019
    Publication date: December 3, 2020
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: In Su Mok, Won Geol Lee, Il Bok Lee, Won Myoung Ki
  • Patent number: 10843918
    Abstract: A semiconductor device may include a first substrate, a first electrical component, a lid, a second substrate, and a second electrical component. The first substrate may include an upper surface, a lower surface, and an upper cavity in the upper surface. The first electrical component may reside in the upper cavity of the first substrate. The lid may cover the upper cavity and may include a port that permits fluid to flow between an environment external to the semiconductor device and the upper cavity. The second substrate may include the second electrical component mounted to an upper surface of the second substrate. The lower surface of the first substrate and the upper surface of the second substrate may fluidically seal the second electrical component from the upper cavity.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: November 24, 2020
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Lawrence Prestousa Natan, Adrian Arcedera, Roveluz Lledo-Reyes, Sarah Christine-Sanchez Torrefranca
  • Patent number: 10847478
    Abstract: A method of forming an electronic device structure includes providing an electronic component having a first major surface, an opposing second major surface, a first edge surface, and an opposing second edge surface. A substrate having a substrate first major surface and an opposing substrate second major surface is provided. The second major surface of the first electronic component is placed proximate to the substrate first major surface and providing a conductive material adjacent the first edge surface of the first electronic component. The conductive material is exposed to an elevated temperature to reflow the conductive material to raise the first electronic component into an upright position such that the second edge surface is spaced further away from the substrate first major surface than the first edge surface. The method is suitable for providing electronic components, such as antenna, sensors, or optical devices in a vertical or on-edge.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: November 24, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventor: Shaun Bowers
  • Patent number: 10840169
    Abstract: In one example, a semiconductor device comprises a substrate having a top surface and a bottom surface, an electronic device on the bottom surface of the substrate, a leadframe on the bottom surface of the substrate, the leadframe comprising a paddle, wherein the paddle is coupled to the electronic device, and a lead electrically coupled to the electronic device. The semiconductor device further comprises a first protective material contacting the bottom surface of the substrate and a side surface of the electronic device.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: November 17, 2020
    Assignee: Amkor Technology Singapore Holding PTE. LTD.
    Inventors: Hyung Jun Cho, Kyoung Yeon Lee, Tae Yong Lee, Jae Min Bae
  • Patent number: 10833008
    Abstract: A packaged semiconductor device has a die attach pad and leads disposed proximate to the die attach pad. Each lead has a lead bottom surface and a lead end surface. A semiconductor device attached adjacent to a top surface of the die attach pad, and a conductive clip is attached to the semiconductor device and at least one of the leads. The conductive clip comprises a first tie bar extending from a first side surface of the conductive clip. A package body encapsulates the semiconductor device, the conductive clip, portions of the leads, at least a portion of the first tie bar, and at least a portion of the die attach pad. Each lead end surface is exposed in a side surface of the package body, and an end surface of the first tie bar is exposed in a first side surface of the package body. A conductive layer is disposed on each lead end surface but is not disposed on the end surface of the first tie bar.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: November 10, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Siang Miang Yeo, Mohd Hasrul Bin Zulkifli
  • Patent number: 10825755
    Abstract: A packaged electronic device includes a substrate having a lead. The lead includes an outward facing side surface having a first height, and an inward facing side surface having a second height that is less than the first height. An electronic device is electrically connected to the lead. A package body encapsulates the electronic device and portions of the lead. The outward facing side surface is exposed through a side surface of the package body, and the inward facing side surface is encapsulated by the package body. A conductive layer is disposed on the outward facing side surface to provide the packaged electronic device with an enhanced wettable flank. In one embodiment, the electronic device is electrically connected to a thick terminal portion having the outward facing side surface. In another embodiment, the electronic device is electrically connected to a thin terminal portion having the inward facing side surface.
    Type: Grant
    Filed: January 4, 2020
    Date of Patent: November 3, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventor: Pedro Joel Rivera-Marty
  • Publication number: 20200343163
    Abstract: In accordance with the present description, there is provided multiple embodiments of a semiconductor device. In each embodiment, the semiconductor device comprises a substrate having a conductive pattern formed thereon. In addition to the substrate, each embodiment of the semiconductor device includes at least one semiconductor die which is electrically connected to the substrate, both the semiconductor die and the substrate being at least partially covered by a package body of the semiconductor device. In certain embodiments of the semiconductor device, through-mold vias are formed in the package body to provide electrical signal paths from an exterior surface thereof to the conductive pattern of the substrate. In other embodiments, through mold vias are also included in the package body to provide electrical signal paths between the semiconductor die and an exterior surface of the package body.
    Type: Application
    Filed: July 10, 2020
    Publication date: October 29, 2020
    Applicant: Amkor Technology Singapore Holding Pte. Ltd
    Inventors: Dong Joo PARK, Jin Seong KIM, Ki Wook LEE, Dae Byoung KANG, Ho CHOI, Kwang Ho KIM, Jae Dong KIM, Yeon Soo JUNG, Sung Hwan CHO
  • Patent number: 10818569
    Abstract: In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: October 27, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Se Man Oh, Kyoung Yeon Lee, Sang Hyeon Lee, Min Cheol Shin
  • Publication number: 20200335441
    Abstract: In one example, a semiconductor device comprises a redistribution layer (RDL) substrate having a top surface and a bottom surface, wherein the RDL substrate comprises a filler-free dielectric material, an electronic device on the top surface of the RDL substrate, an electrical interconnect on the bottom surface of the RDL substrate and electrically coupled to the electronic device, a first protective material contacting a side surface of the electronic device and the top surface of the RDL substrate, and a second protective material contacting a side surface of the electrical interconnect and the bottom surface of the RDL substrate. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: April 18, 2019
    Publication date: October 22, 2020
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Tae Ki Kim, Jae Beom Shim, Seung Nam Son, Won Chul Do
  • Patent number: 10811341
    Abstract: In accordance with the present description, there is provided multiple embodiments of a semiconductor device. In each embodiment, the semiconductor device comprises a substrate having a conductive pattern formed thereon. In addition to the substrate, each embodiment of the semiconductor device includes at least one semiconductor die which is electrically connected to the substrate, both the semiconductor die and the substrate being at least partially covered by a package body of the semiconductor device. In certain embodiments of the semiconductor device, through-mold vias are formed in the package body to provide electrical signal paths from an exterior surface thereof to the conductive pattern of the substrate. In other embodiments, through mold vias are also included in the package body to provide electrical signal paths between the semiconductor die and an exterior surface of the package body.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: October 20, 2020
    Assignee: Amkor Technology Singapore Holding Pte Ltd.
    Inventors: Dong Joo Park, Jin Seong Kim, Ki Wook Lee, Dae Byoung Kang, Ho Choi, Kwang Ho Kim, Jae Dong Kim, Yeon Soo Jung, Sung Hwan Cho