Abstract: A radio frequency system has a first and a second antenna terminal, a radio frequency transceiver coupled to the antenna terminals, a rectifier connected to the antenna terminals at its input side and a voltage limiter. The voltage limiter comprises a first and a second input terminal connected to the antenna terminals, and a first and a second diode element connected between the first respectively the second input terminal and a bias terminal. A regulation transistor is connected between the bias terminal and the reference potential terminal. A voltage controller has a reference input for receiving a reference signal, a feedback input connected to the bias terminal and a control output for providing a control potential to a control terminal of the regulation transistor on the basis of the reference signal and a signal at the bias terminal.

Abstract: A method for manufacturing a semiconductor element comprising a single photon avalanche diode having a multiplication zone (AR) a guard ring structure with a second type of electrical conductivity comprises providing a semiconductor wafer with a first region (R) comprising a semiconductor material with the first type of conductivity. The method further comprises generating by a first doping process a first well (W1) of the guard ring structure having a first vertical depth, the first well (W1) laterally surrounding the multiplication zone (AR) and having a lateral distance (A) from the multiplication zone (AR). The method further comprises generating by a second doping process a second well (W2) of the guard ring structure having a second vertical depth, the second well (W2) laterally surrounding and adjoining a part of the first region for laterally defining the multiplication zone (AR).

Abstract: A relief structure is formed on a surface of a carrier provided for accommodating a wafer, which is fastened to the carrier by a removable adhesive contacting the carrier. The relief structure, which may be spatially confined to the center of the carrier, reduces the strength of adhesion between the wafer and the carrier. If the adhesive is appropriately selected and maintains the connection between the wafer and the carrier at elevated temperatures, further process steps can be performed at temperatures of typically 300° C. or more. The subsequent mechanical separation of the adhesive joint is facilitated by the relief structure on the carrier.

Abstract: A semiconductor substrate (1) is provided with integrated circuits. Dicing trenches (7) are formed in the substrate (1) between the integrated circuits, a polyimide layer (8) spanning the trenches (7) is applied above the integrated circuits, a tape layer (14) is applied above the polyimide layer (8), and a layer portion of the substrate (1) is removed from the substrate side (17) opposite the tape layer (14), until the trenches (7) are opened and dicing of the substrate (1) is thus effected. The polyimide layer (8) is severed in sections (18) above the trenches (7) when the tape layer (14) is removed. The semiconductor chip is provided with a cover layer (11) laterally confining the polyimide layer (8) near the trenches (7), in particular for forming breaking delimitations (9).

Abstract: A host interface for a media device comprises a first and a second host audio terminal for receiving a first and a second analog audio signal, a first and a second connector audio terminal for connecting a first and a second pole of a four-pole connector, and a host control circuit. The host control circuit is adapted to detect whether a device requiring a supply signal over the four-pole connector is connected. If no such device is detected, the first and the second analog audio signal are passed to the first and the second connector audio terminal. If such a device is detected, the first connector audio terminal is connected to a supply terminal.

Abstract: An isolation area (10) is provided over a drift region (12) with a spacing (d) to a contact area (4) provided for a drain connection (D). The isolation area is used as an implantation mask, in order to produce a dopant profile of the drift region in which the dopant concentration increases toward the drain. The implantation of the dopant can be performed instead before the production of the isolation area, and the later production of the isolation area (10) changes the dopant profile also in a way that the dopant concentration increases toward the drain.

Abstract: A semiconductor substrate is provided with an annular cavity extending from a front side of the substrate to an opposite rear side. A metallization is applied in the annular cavity, thereby forming a through-substrate via and leaving an opening of the annular cavity at the front side. A solder ball is placed above the opening and a reflow of the solder ball is effected, thereby forming a void of the through-substrate via, the void being covered by the solder ball.

Abstract: According to the improved concept, a method for analyzing a semiconductor element comprising polymer residues located on a surface of the semiconductor element is provided. The method comprises marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance and detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.

Abstract: The semiconductor device comprises a semiconductor substrate (1), a photosensor (2) integrated in the substrate (1) at a main surface (10), an emitter (12) of radiation mounted above the main surface (10), and a cover (6), which is at least partially transmissive for the radiation, arranged above the main surface (10). The cover (6) comprises a cavity (7), and the emitter (12) is arranged in the cavity (7). A radiation barrier (9) can be provided on a lateral surface of the cavity (7) to inhibit cross-talk between the emitter (12) and the photosensor (2).

Abstract: The method comprises the steps of providing a semiconductor device comprising a semiconductor layer (1) with at least one radiation sensor (6) and a dielectric layer (2), arranging a web (3) comprising a plurality of recesses (4) on the dielectric layer, and introducing ink of different colors (A, B, C) in the recesses by inkjets (I).

Abstract: A circuit arrangement comprises a first terminal for connection to a voltage source, a second terminal for connection to a first current sink and a third terminal for supplying a potential signal. A first diode string can be connected to the voltage source on the anode side and to the first current sink on the cathode side. The third terminal can be coupled to the cathode side of the first diode string by a resistor. An adjustable reference current sink is coupled to the third terminal, for generating a reference current, and comparison unit coupled to the third terminal on the input side for providing a short-circuit detection signal in dependence on a difference between the potential signal and an adjustable reference voltage. The potential signal can be supplied in dependence on a first short-circuit voltage across the first diode string and in dependence on the reference current.

Abstract: The interposer-chip-arrangement comprises an interposer (1), metal layers arranged above a main surface (10), a further metal layer arranged above a further main surface (11) opposite the main surface, an electrically conductive interconnection (7) through the interposer, the interconnection connecting one of the metal layers and the further metal layer, a chip (12) arranged at the main surface or at the further main surface, the chip having a contact pad (15), which is electrically conductively connected with the interconnection, a dielectric layer (2) arranged above the main surface with the metal layers embedded in the dielectric layer, a further dielectric layer (3) arranged above the further main surface with the further metal layer embedded in the further dielectric layer, and an integrated circuit (25) in the interposer, the integrated circuit being connected with at least one of the metal layers (5).

Abstract: A reference circuit arrangement comprises a branched current path connecting a first and second terminal via an intermediate terminal. The intermediate terminal is connected to a reference terminal. A current path is coupled between the first and second terminal via the reference terminal. A feedback loop is connected to the first and second terminal and designed to control, at the first and second terminal, a virtual ground potential. A reference path is connected to the feedback loop having a reference input for receiving from the feedback loop a reference current and reference output to provide a reference voltage.

Abstract: An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1?) having a first threshold voltage (Vth1), at least a second differential stage (DS2) comprising at least two transistors (M3, M3?) having a second threshold voltage different from the first threshold voltage, at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement.

Abstract: An amplifier circuit with a differential input and a differential output comprises a first and a second pair of matched transistors having a first threshold voltage and comprising control terminals connected to the differential input. A first and a second pair of triplets of transistors having a second threshold voltage being different from the first threshold voltage is connected to each one of the pairs of matched transistors such that respective current paths are formed with these transistors. The currents are split up to bias current sources and to an output stage such that the current is reused for implementing a class AB operation. Furthermore, a current through bias transistors connected in the current path of the first and the second pair of matched transistors is mirrored to output transistors being arranged in a differential current path of the output stage.

Abstract: A method for gesture detection comprises pre-processing and main-processing steps, wherein the pre-processing comprises emitting light using a light emitting device and generating of directional sensor signals as a function of time by detecting a fraction of the emitted light reflected by means of a movable object using a directional light sensor array). The main-processing comprises calculating coordinates as a function of time by using the directional sensor signals, being indicative of a position of the object with reference to a plane parallel to a principal plane of the light sensor array, and detecting a movement of the object depending on the timing of the coordinates.

Abstract: A host interface circuit operates in a power mode when connected to an accessory device compatible with a power supply via a first line of a data cable. During power mode, the host interface circuit couples a power regulator to the first line. The host interface circuit operates in a legacy mode when connected to an accessory device not compatible with such a power supply and couples the legacy terminal to the first line during legacy mode. An accessory interface circuit configured to operate in a power mode when connected to a host device capable of a power supply via a first line couples a power input of an active device to the first line and a data input of the active device to a second line during power mode.

Abstract: An active noise control arrangement has a signal input (SI), a microphone input (MI), a signal output (SO) and a digital interface (DI). A signal processing block (SP) coupled to the microphone input (MI) by means of an amplifier (MA) has a digitally adjustable gain and comprises combining means (CM) and a filter (TP). The signal processing block (SP) is configured to generate an output signal at the signal output (SO) as a function of an input signal at the signal input (SI) and an amplified microphone signal. A control block (CB) is coupled to the digital interface (DI) and configured to adjust the gain of the amplifier (MA).

Abstract: A housing (1) is provided which in particular is suitable for a mobile phone and, in addition to the customary loudspeaker housing (2) for accommodating a loudspeaker (4), comprises an additional housing (3) enclosing an additional volume of air (16) and being arranged in a preferential direction (V) for sound emission of the loudspeaker housing (2). Further, a loudspeaker module comprising the housing (1) as well as a loudspeaker (4), a microphone (8) and a control unit for active noise suppression is provided.

Abstract: We disclose a control circuit for active noise control, ANC, coupled to a speaker generating a speaker signal based on an amplified audio signal and to an ANC microphone generating a disturbed audio signal based on ambient noise and the speaker signal. The control circuit has a first mixer generating an intermediate audio signal by superposing an audio signal and a first compensation signal, a first amplifier generating the amplified audio signal based on the intermediate audio signal and a compensation unit generating a second compensation signal based on the audio signal. A tuning unit generates a compensated audio signal based on the disturbed audio signal and the second compensation signal. An ANC filter coupled to the tuning unit generates the first compensation signal by applying filter operations to the compensated audio signal.