Abstract: A headphone system includes a headphone, a sensor, and a processor. The headphone may provide sound from virtual speakers to a listener via a plurality of sound paths that are filtered with a plurality of filters. The sensor may sense an angular velocity of a movement of the listener. The processor may receive the angular velocity and may calculate delays in the plurality of sound paths and filter coefficients for the plurality of filters based on the angular velocity, and insert the calculated delays in the plurality of sound paths and adjust the plurality of filters with the calculated filter coefficients.

Abstract: Heart rate monitors are plagued by noisy photoplethysmography (PPG) data, which makes it difficult for the monitors to output a consistently accurate heart rate reading. Noise is often caused by motion. Using known methods for processing accelerometer readings that measure movement to filter out some of this noise may help, but not always. The present disclosure describes an improved front-end technique (time-domain interference removal) based on using adaptive linear prediction on accelerometer data to generate filters for filtering the PPG signal prior to tracking the frequency of the heartbeat (heart rate). The present disclosure also describes an improved back-end technique based on steering the frequency of a resonant filter in order to track the heartbeat. Implementing one or both of these techniques leads to more accurate heart rate measurements.

Abstract: Heart rate monitors are plagued by noisy photoplethysmography (PPG) data, which makes it difficult for the monitors to output a consistently accurate heart rate reading. Noise is often caused by motion. Using known methods for processing accelerometer readings that measure movement to filter out some of this noise may help, but not always. The present disclosure describes an improved front-end technique (time-domain interference removal) based on using adaptive linear prediction on accelerometer data to generate filters for filtering the PPG signal prior to tracking the frequency of the heartbeat (heart rate). The present disclosure also describes an improved back-end technique based on steering the frequency of a resonant filter in order to track the heartbeat. Implementing one or both of these techniques leads to more accurate heart rate measurements.

Abstract: Embodiments of the disclosure provide improved mechanisms for applying DEM techniques to a DAC comprising a plurality of cells. Disclosed mechanisms include keeping track of the amplitude of input digital signal over a certain time period to determine a range of amplitudes of a portion of the input signal, and, when converting the digital values of that portion to analog values and applying a particular DEM technique, limiting the number of DAC cells on which a DEM technique is applied only to a number that is necessary for generating the analog output corresponding to the tracked portion, which number is determined based on the tracked amplitudes and could be smaller than the total number of DAC cells. In this manner, mismatch error may be reduced for smaller input signal amplitudes. Whenever possible, unused DAC cells may be put into a power saving mode, providing the advantage of reduced power consumption.

Abstract: Systems and methods for filtering noise from an input signal in a computationally efficient manner are provided. A method includes generating a raw noisy matrix representing the input signal, wherein each element of the raw noisy matrix represents a portion of the input signal, initializing a denoised matrix as equal to the raw noisy matrix, and updating the denoised matrix. Updating the denoised matrix includes iteratively convolving a current version of the denoised matrix with a kernel to generate a convolution matrix, and modifying the denoised matrix based in part on values in the convolution matrix.

Abstract: Apparatus and methods for loss of signal detection are provided. In one embodiment, a detection circuit for monitoring an input includes a small signal boost circuit, a rectifier circuit, a low-pass filter, and one or more comparators. The small signal boost circuit can generate an amplified signal by providing a first amount of gain to an input signal when the input signal is relatively small, but can saturate and provide reduced gain without external gain control adjustment when the input signal does not have a relatively small magnitude. The rectifier circuit can rectify the boosted signal to generate a rectified signal, and the low-pass filter can filter the rectified signal to generate a filtered signal. The one or more comparators can compare the filtered signal to one or more decision threshold voltages to determine the presence or absence of the input signal on the input.

Abstract: A clock system including a ring oscillator having a plurality of cascaded inverters, each of the cascaded inverters having a pair of inputs coupled to outputs of a respectively adjacent inverter stage and having a pair of outputs coupled to inputs of another respectively adjacent inverter stage, each inverter stage having a common mode control circuit provided therein, and a feedback controller adapted to transmit a control signal to the common mode control circuit of at least one of the inverters.

Abstract: Microphone stages in a microphone array may be coupled together in a daisy chain. Each stage may include a microphone, an analog to digital converter, a decimation unit, a receiver, an adder, and a transmitter. The converter may convert analog audio microphone signals into digital codes that may be decimated. The adder may add decimated digital codes in each stage to a cumulative sum of decimated digital codes from prior stages. This new sum may be transmitted to the next microphone stage, where the adder may add the decimated digital codes from that stage to the cumulative sum. A serial interface may be used to connect the transmitters and receivers of each of the stages. The serial interface may be used to transmit the cumulative sum of decimated digital codes between the stages. The serial interface may also be used to transmit configuration data between the stages.

Abstract: Apparatus and methods for ultrasound probes are provided. In certain implementations, a receive switch for an ultrasound probe includes a first field effect transistor (FET) and a second FET electrically connected in series between a first terminal and a second terminal with the FETs' sources connected to one another. The receive switch includes a positive threshold detection and control circuit for turning off the receive switch when a voltage of the first terminal is greater than a positive threshold voltage, and a negative threshold detection and control circuit for turning off the receive switch when the first terminal's voltage is less than a negative threshold voltage. The receive switch further includes a gate bias circuit that can bias the gates of the first and second FETs so as to turn on the receive switch when no positive or negative high voltage conditions are detected on the first terminal.

Abstract: A temperature sensor for use in an infrared detector the temperature sensor comprising: a first resistor associated with a first thermal path having a first thermal conductivity between the first resistor and a substrate and a first temperature coefficient of resistance; a second resistor associated with a second thermal path having a second thermal conductivity between the second resistor and the substrate and a second temperature coefficient of resistance, and a measurement circuit responsive to changes in the resistance of the first and second resistors to estimate changes in temperature, and wherein at least one of (a) the first and second thermal conductivities are different or (b) the first and second temperature coefficients of resistance are different.

Abstract: Apparatus and methods for transceiver interface overvoltage clamping are provided. In certain configurations, an interface device includes a first p-type well region and a second p-type well region in an n-type isolation structure. Additionally, the clamp device includes a first p-type active region and a first n-type active region in the first p-type well region and electrically connected to a first terminal of the clamp device. Furthermore, the clamp device includes a second p-type active region and a second n-type active region in the second p-type well region and electrically connected to a second terminal of the clamp device. The n-type isolation structure is in a p-type region of a semiconductor substrate, and electrically isolates the first and second p-type well regions from the p-type substrate region. The clamp device further includes a blocking voltage tuning structure positioned between the first and second n-type active regions.

Abstract: Embodiments of the present disclosure are based on a recognition that some processors are configured with instructions to compute logarithms and exponents (i.e. some processors include log and exp circuits). Embodiments of the present disclosure are further based on an insight that the use of the existing log and exp circuits could be extended to compute certain other functions by using the existing log and exp circuits to transform from a Cartesian to a logarithmic domain and vice versa and performing the actual computations of the functions in the logarithmic domain, which may be computationally easier than performing the computations in the Cartesian domain.

Abstract: Apparatus and methods for phase linearization and interpolation in rotary traveling wave oscillators (RTWOs) are provided. In certain configurations, an RTWO system includes a first elongated RTWO and a second elongated RTWO that are phase-locked to one another with a non-zero phase shift. The first and second elongated RTWOs each include two elongated sections of differential transmission line of high phase linearity. For example, such long and straight sections of the differential transmission lines can have uniform capacitance loading and avoid non-uniformities in length and/or thickness associated with poor phase linearity. The RTWO system further includes tap circuitry that receives clock signal phases from the elongated sections of the RTWOs. In certain implementations, the tap circuitry includes one or more interpolation circuits that interpolate received clock signal phases to increase the number of available phases. The RTWO system can include a large number of taps of high phase linearity.

Abstract: An amplifier system may include a current source, an impedance element responsive to a current change, and a feedback controller generating a control signal based on impedance element response. Current source may supply current to a pair of output elements, one of which being controlled by an integrator, and a portion of the integrator. Impedance element may have terminals coupled to inputs of the output elements and may be configured to experience a change in voltage based on a change in current supplied to its input. Feedback controller may have a pair of inputs coupled to the terminals of impedance element and an output to control the current source based on a detected change in voltage across the impedance element. Current source may be varied based on the control signal to maintain a constant current supplied to the input of the impedance elements.

Abstract: A balanced teeter-totter accelerometer has a mass suspended above a substrate, the mass having an axis of rotation that is parallel to the substrate and substantially geometrically centered with respect to the shape of the mass. A physical acceleration in a direction perpendicular to the substrate causes the mass to rotate about the axis of rotation. The rotation is sensed by measuring a change in capacitance of electrodes on the substrate. The accelerometer may be calibrated using the same sensing electrodes.

Abstract: An exemplary multipath feedforward amplifier includes a plurality of amplification stages configured to form at least partially distinct amplification paths extending from an input terminal to an output terminal, each amplification path defined by a respective subset of the plurality of amplification stages, wherein at least one amplification stage is a band pass resonator. In various implementations, multipath feedforward amplifier can maximize gain at a frequency of interest by having an amplification path that cascades band pass resonators. In various implementations, the plurality of amplification paths are configured to optimize gain at a center frequency ranging from about 2 GHz to about 3 GHz.

Abstract: A compact sensor module and methods for forming the same are disclosed herein. In some embodiments, a sensor die is mounted on a sensor substrate. A processor die can be mounted on a flexible processor substrate. In some arrangements, a thermally insulating stiffener can be disposed between the sensor substrate and the flexible processor substrate.

Abstract: A wide common-mode range receiver includes an input module, voltage level shift module, voltage level shift control module, and output module. The receiver can also include an equalizer. The receiver translates data originating from a circuit powered from an external voltage supply to a circuit powered by an internal voltage supply. The voltage level shift may be scaled based on differences between the voltage supplies or by determining the difference between an input common-mode voltage and a reference voltage, and driving a servo based on the difference.

Abstract: A circuit may include a queue, a monitor, and a controller. The queue may receive and store a plurality of commands from a plurality of buses to access a shared set of registers. The monitor may monitor the plurality of commands in the queue to determine whether a period of time needs to be reserved for selected commands from one of the plurality of buses. The controller, if the period of time needs to be reserved, based on the period of time determined by the monitor, may disable acceptance of commands from buses other than the one of the plurality of buses, may execute the selected commands for the one of the plurality of buses, and may allow more than one of the plurality of buses access to results of the selected commands.

Abstract: A signal processing device has a first discrete time analog signal processing section, which has an input, an output, a plurality of charge storage elements, and plurality of switch elements coupling the charge storage elements. The device has a controller coupled to the first signal processing section configured to couple different subsets of the charge elements of the first signal processing section in successive operating phases to apply a signal processing function to an analog signal presented at the input of the first signal processing section and provide a result of the applying of the signal processing function as an analog signal to the output of first signal processing section. The signal processing function of the first signal processing section comprises a combination of a filtering function operating at a first sampling rate and one or more modulation functions operating at corresponding modulation rates lower than the first sampling rate.