Abstract: In one aspect, a microphone with closely spaced elements is used to acquire multiple signals from which a signal from a desired source is separated. The signal separation approach uses a combination of direction-of-arrival information or other information determined from variation such as phase, delay, and amplitude among the acquired signals, as well as structural information for the signal from the source of interest and/or for the interfering signals. Through this combination of information, the elements may be spaced more closely than may be effective for conventional beamforming approaches. In some examples, all the microphone elements are integrated into a single a micro-electrical-mechanical system (MEMS).

Abstract: In an example embodiment, a two-wire communication protocol engine manages control and data transmissions in a bi-directional, multi-node bus system where each node is connected over a twisted wire pair bus to another node. Some embodiments include a state machine that allows for synchronized updates of configuration data across the system, a distributed interrupt system, a synchronization pattern based on data coding used in the system, and data scrambling applied to a portion of the data transmitted over the twisted wire pair bus. The multi-node bus system comprises a master node and a plurality of slave nodes. The slave nodes can be powered over the twisted wire pair bus.

Abstract: A motor driver may include a controller, a space vector modulator, a converter and a detector. The space vector modulator may generate driving signals under control of the controller according to a space vector pulse width modulation (“SVPWM”) scheme. The converter may derive AC signals from the driving signals received from the space vector modulator and may output the AC signals to the USM motor. The detector may generate feedback signals representing current and voltage supplied to the USM motor. The controller may revise estimates of space vectors, based on measurements from the detector, to control the space vector modulator to adjust frequencies, amplitudes, or phase angles of the plurality of AC signals.

Abstract: A method of fabricating a MEMS device provides a device substrate, forms a plurality of trenches in/on the substrate, and forms a sacrificial material on the substrate (e.g., growing or depositing the sacrificial material) to form a plurality of etch channels. Each trench defines one etch channel, and each etch channel forms an interior configured to channel etchant. The method also bonds a handle substrate to the sacrificial material of the device substrate, and removes at least a portion of the sacrificial material.

Abstract: Aging effects on devices fabricated using deep nanometer complementary metal-oxide semiconductor (CMOS) processes can cause circuits to exhibit an undesirable mismatch buildup over time. To address the aging effects, the connections to an array of M differential circuits are controlled to limit and systematically minimize or reverse the aging effects. In one embodiment, the controlling permutation sequence is selected to stress the array of M differential circuits under opposite stress conditions during at least two different time periods. Imposing opposite stress conditions, preferably substantially equal opposite stress conditions, can reverse the direction of a mismatch buildup and limit the mismatch buildup over time within acceptable limits. The controlling permutation sequence can be applied to an array of comparators of an analog-to-digital converter, or an array of differential amplifiers of a folding analog-to-digital converter.

Abstract: A system implementing an MBIST device is disclosed. The system includes an ECC-protected memory and the MBIST device for self-test of the memory. The MBIST device includes a first access port communicatively connected to the memory via a first path, the first path excluding the ECC logic associated with the embedded memory, and a second access port communicatively connected to the memory via a second path, the second path including the ECC logic associated with the memory. The device is configured to test the memory, in a first mode of operation, via the first path and, in a second mode of operation, via the second path. One advantage of such system includes re-using, with little additional die area, of MBIST logic already required for manufacturing test of the product (first mode of operation) for system or application level tests that may be carried out by customers (second mode of operation).

Abstract: Determining if a hermetically sealed MEMs device loses hermeticity during operation. In one embodiment, the MEMs device is an accelerometer. A test signal having an associated frequency above an operational frequency range for the accelerometer is provided to the accelerometer at an input during operation of the accelerometer for sensing an acceleration. The output signal of the accelerometer is filtered at least above the operational frequency range of the accelerometer producing a test output signal. The test output signal is then compared to a predetermined threshold to determine if the amplitude of the test output signal differs from the threshold. If the amplitude of the test output signal differs from the predetermined threshold, an error signal is produced indicating that hermeticity of the accelerometer has been lost.

Abstract: In an example, a system and method are disclosed for providing a single control law that is operable to regulate both small-signal, steady-state operation, and large-signal transients of a switching regulator. The control law is based on detecting a zero-crossing of capacitor current, and projecting in advance a turning point for either ramping up or ramping down capacitor voltage at a target voltage. Certain embodiments may realize the control function in high-speed analog components, although certain other embodiments may implement the same or a similar control law in a digital controller.

Abstract: Electrostatic discharge (ESD) protection devices can protect electronic circuits. In the context of radio frequency (RF) circuits and the like, the insertion loss of conventional ESD protection devices can be undesirable. The amounts of parasitic capacitances at nodes of devices of an ESD protection device are not necessarily symmetrical, with respect to the substrate. Disclosed are techniques which decrease the parasitic capacitances at signal nodes, which improve the insertion loss characteristics of ESD protection devices.

Abstract: An integrated circuit can include a group of bond pads alternating between bond pads configured to provide a return path and bond pads configured to provide a signal bond pad. For example, five bond pads can be arranged in a return-signal-return-signal-return arrangement. The integrated circuit can further be configured to receive or transmit high frequency signals.

Abstract: An optical detector may include an epitaxial layer having a continuous surface provided on a surface of a substrate. Two or more electrodes may be arranged at different positions in the epitaxial layer so that the electron-hole pairs generated in the epitaxial layer from incident light passing through the aperture and reaching the epitaxial layer have a varying probability of being collected by each of the electrodes as the angle of the incident light changes. The electrodes may be arranged at different depths in the epitaxial layer. The epitaxial layer may be continuous and have a continuous aperture-facing surface between each of the electrodes associated with a particular aperture to ensure that more light passing through the aperture is absorbable in the epitaxial layer and subsequently detectable by the electrodes. This may result in improved light detection capabilities.

Abstract: Multichannel successive approximation register (SAR) analog-to-digital converters (ADC), along with methods and systems for multichannel SAR analog-to-digital conversion, are disclosed herein. An exemplary multichannel SAR ADC can include a first SAR ADC for each of a plurality of input channels, and a second SAR ADC, a multiplexer, and a residue amplifier shared among the plurality of input channels. The multiplexer can select an analog residue signal from one of the first SAR ADCs for conversion by the second SAR ADC. The residue amplifier can amplify the selected analog residue signal. The second SAR ADC, multiplexer, and/or residue amplifier may be shared among all of the plurality of input channels. Where the multichannel SAR ADC includes N input channels, the second SAR ADC, multiplexer, and/or residue amplifier may be shared among b channels of the N input channels.

Abstract: In some implementations, a metal pad for capturing or interfacing with through-silicon vias has a plurality of openings through it. Another metal pad on an upper level can also include a plurality of openings. The metal pads are vertically aligned and the placement of the openings in each metal pad is such that the openings are laterally offset and substantially do not directly overlie or underlie one another. As seen in a top-down view, the through-silicon via etch may “see” a metal etch stop that extends continuously across the width of the via, although different portions of the etch stop may be distributed on different vertical levels due to the presence of openings in the metal pads. The openings in the metal pads facilitate integrated circuit fabrication their respective levels and the aggregate structure formed by the metal pads provides an effective etch stop for the through-silicon via etch.

Abstract: In an example, a differential amplifier is disclosed that is configured to realize low noise with decreased overall system current. The differential amplifier may include a first amplifier stage and a second amplifier stage arranged in series, wherein a pull-up current iH flowing as a single bias current iB=iH flows into the first stage. A single pull-down current iT sources to ground from the second stage, wherein iH=iT=iB substantially. In certain embodiments, the transconductance of the second stage may be increased by providing two transconductors coupled at their base nodes.

Abstract: A method for downsampling digital samples xn, . . . of a signal by a decimation factor d comprising an integer part i using averaging is disclosed. The method includes identifying a partial sum based on the decimation factor and a number N of samples to use for the averaging as a sum Sn+i,n+N?1 of (N?i) samples xn+i, . . . xn+N?1, computing the partial sum, computing a first sum Sn,n+N?1 of a first set of N digital samples xn, . . . xn+N?1 as a sum of a set of i digital samples xn, . . . xn+i?1 and the computed partial sum, computing a second sum Sn+i,n+i+N?1 of a second set of N digital samples xn+i, . . . xn+i+N?1 as a sum of a set of i digital samples xn+N, . . . xn+i+N?1 and the computed partial sum, and downsampling the digital samples based at least in part on the first sum and the second sum.

Abstract: A circuit operating with a switching clock signal and a sampling clock signal can have one or more of its switching and sampling clock signals periodically phase-reversed. The period of phase reversal can be greater than twice the period of the original switching and/or sampling clock signal, and in certain configurations the switching and sampling clock signals can be synchronized. With a selection of phase reversal period (or frequency), aliasing frequency components of the mixed signal from the switching and sampling clock signals can be removed.

Abstract: In this disclosure, new structures for high-performance voltage buffers (source followers and emitter followers) are described. The structures achieve high performance (linearity) and reduce power consumption. In addition, they are reconfigurable to optimize the performance and power consumption depending on the input frequency range.

Abstract: An approach to processing of acoustic signals acquired at a user's device include one or both of acquisition of parallel signals from a set of closely spaced microphones, and use of a multi-tier computing approach in which some processing is performed at the user's device and further processing is performed at one or more server computers in communication with the user's device. The acquired signals are processed using time versus frequency estimates of both energy content as well as direction of arrival. In some examples, a non-negative matrix or tensor factorization approach is used to identify multiple sources each associated with a corresponding direction of arrival of a signal from that source. In some examples, data characterizing direction of arrival information is passed from the user's device to a server computer where direction-based processing is performed.

Abstract: Power consumption of analog-to-digital converters (ADCs) is one important requirement for automotive and consumer devices. One flavor of an ADC is a dual quantizer architecture for oversampling delta-sigma modulators. The dual quantizer delta-sigma modulator has a first quantizer for digitizing the output of the loop filter and a second quantizer for digitizing the input of the quantizer. However, the quantization noise of the second quantizer is a highly correlated signal and significantly degrades the spectrum of the delta-sigma modulator. To address this issue, an improvement to the dual quantizer architecture is made to cancel the quantization noise of the second quantizer that is digitizing the input. Furthermore, the improvement allows the second quantizer to run at a much slower sampling rate than the first quantizer. Advantageously, the improvement provides reduction in power consumption and the overall area of modulator.

Abstract: Various embodiments of the present invention provide a two-wire (e.g., unshielded twisted pair) bus system that is simple (e.g., no microcontroller required in slave devices), synchronous with embedded clock information, inexpensive, automotive EMC compliant, and has sufficient speed and bandwidth for a large number of slave devices/peripherals, and also provides various protocols that can be used in various communication systems such as a two-wire bus system. The two-wire bus optionally may be self-powered, i.e., the master device may provide power to the slave devices over the two-wire bus.