Abstract: A new method and circuit arrangement for operating an electric motor, such as a stepper motor, in a control loop for preventing motor stall, the electric motor comprising at least a first motor coil and a second motor coil, the method comprising: operating the electric motor at a velocity equal to the target velocity; receiving a load value associated with an electric motor load; and determining whether the load value is greater than a load value threshold. Based on a determination that the load value is greater than the load value threshold decreasing the velocity of the electric motor to a velocity less than the target velocity.

Abstract: Gallium nitride-based monolithic microwave integrated circuits (MMICs) can comprise aluminum-based metals. Electrical contacts for gates, sources, and drains of transistors can include aluminum-containing metallic materials. Additionally, connectors, inductors, and interconnect devices can also comprise aluminum-based metals. The gallium-based MMICs can be manufactured in complementary metal oxide semiconductor (CMOS) facilities with equipment that produces silicon-based semiconductor devices.

Abstract: Apparatus and method for establishing a stable operating point of a H-bridge with a center shunt switch. The stable operating point lets a circuit connected to the H-bridge outputs work in a more ideal condition. As such, an H-bridge with a stable operating point will yield a higher performance and/or save power. Since common mode is one of the biggest sources of electromagnetic interference, a stable operating point in an H-bridge also suppresses EMI.

Abstract: Apparatus and methods for control and calibration of external oscillators are provided herein. In certain embodiments, an electronic oscillator system includes a semiconductor die and a controllable oscillator that is external to the semiconductor die. The oscillation frequency of the controllable oscillator is tuned by a first varactor and a second varactor. The semiconductor die includes a phase-locked loop (PLL) that provides fine tuning to the controllable oscillator by controlling the first varactor, and a calibration circuit that provides coarse tuning to the controllable oscillator by controlling the second varactor.

Abstract: An analog-to-digital converter (ADC) system for providing a calibrated voltage measurement without an external reference voltage may include an ADC circuit, including an analog ADC input and a digital ADC output. The ADC system may also include circuitry to generate a first internal reference voltage and a second internal reference voltage. The ADC system may also include circuitry configured to provide a selected output from a number of inputs, wherein the inputs include inputs to receive (1) the first internal reference voltage, (2) the second internal reference voltage, and (3) a user-provided analog signal of interest, wherein the selected output can be connected to the analog ADC input, an external voltage measurement device, or both.

Abstract: A semiconductor-based stress sensor can include a bipolar transistor device with first and second collector terminals. An excitation circuit can provide an excitation signal to an emitter terminal of the bipolar transistor device, and a physical stress indicator for the semiconductor can be provided based on a relationship between signals measured at the collector terminals in response to the excitation signal. The signals can indicate a charge carrier mobility characteristic of the semiconductor, which can be used to provide an indication of physical stress. In an example, the physical stress indicator is based on a current deflection characteristic of a base region of the transistor device.

Abstract: Techniques are described through which continuous gapless voltage measurements can be synchronized between devices with independent clock sources on an asynchronous bus by slightly adjusting a speed of a local clock source for a period of time. Also, a read-out technique is described through which the synchronous measurements can be read out in a coherent way. These techniques can allow a high-accuracy time-average of the battery cell voltage (or fuel cell voltage) to be reconstructed, while allowing the same results to be synchronous across an entire battery stack, for use in instantaneous voltage/current diagnostics or calculations.

Abstract: Systems, devices, and methods related to electrostatic discharge (ESD) protection in radio frequency (RF) switch circuitry are provided. An electrostatic discharge (ESD)-protected radio frequency (RF) switch circuitry includes a common port; at least one terminal port; a switch circuitry coupled between the common port and the at least one terminal port, wherein the switch circuitry comprises one or more transistors connected in a stacked configuration; and a first ESD protection circuitry coupled between a gate of a first transistor of the one or more transistors and a driver circuitry for the first transistor.

Abstract: Fin field-effect transistor (FinFET) thyristors for protecting high-speed communication interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.

Abstract: A soft-switching Phase-Shift Full-Bridge (PSFB) converter system may include a transformer comprising a primary side and a secondary side. Phase-leading circuitry and phase-lagging circuitry may be located on the primary side of the transformer. The phase leading a phase lagging circuitry may include one or more bridge switches. The system may further include clamping circuitry coupled to the secondary side of the transformer. The clamping circuitry configurable to, when in an active clamping mode, short the secondary side of the transformer. An inductance may be included on the primary side of the transformer to collect and store energy from an input source when the secondary side of the transformer is shorted. The energy stored in the inductance may be used to enable soft-switching of the bridge switches in the phase-lagging circuitry during a dead time or a circulating time of the bridge switches in the phase-leading circuitry.

Abstract: A semiconductor device includes a layer of a first semiconducting material, where the first semiconducting material is epitaxially grown to have a crystal structure of a first substrate. The semiconductor device further includes a layer of a second semiconducting material disposed adjacent to the layer of the first semiconducting material to form a heterojunction with the layer of the first semiconducting material. The semiconductor device further includes a first component that is electrically coupled to the heterojunction, and a second substrate that is bonded to the layer of the first semiconducting material.

Abstract: Front-end circuitry is difficult to design for high sample rate, wide bandwidth receivers with high performance requirements on noise and linearity. One exemplary front-end circuitry is integrated on-chip with the RF ADC in a receiver, and the circuitry implements ESD protection, attenuation, and gain. The circuitry includes a multi-tap filter with LC circuits, and the filter implements a highly linear filter. Advantageously, the capacitors in the LC circuits are also used for ESD protection. Additionally, tunable attenuator cells are implemented across the multi-tap filter to provide a wide range of variable attenuation. The circuitry can further include a fixed or variable gain stage at the output. The resulting circuitry offers variable gain and attenuation while meeting bandwidth, noise, and linearity requirements.

Abstract: The present subject matter relates to active balun circuits. An active balun circuit includes a plurality of transistors; an output transmission line connected to output terminals of the transistors; an input transmission line; and a plurality of serial capacitors coupled to an input terminal of the transistors and the input transmission line.

Abstract: There is disclosed herein examples of systems and methods for compressing a signal. Samples of the signal can be segmented and the samples within each of the segments can be averaged to produce a value that can represent the samples within the segment. The number of samples to average in each segment may be determined based on an error threshold, such that the number of samples being averaged can be maximized to produce less data to be transmitted while maintaining the representation of the samples within the error threshold. In some embodiments, a signal can be separated into a timing reference, a representative periodic function, and a highly compressible error signal. The error signal can be utilized for reproducing a representation of the signal.

Abstract: A charge pump is connected between a source and a body of the switch. Such a configuration avoids a condition in which the body diode opens for negative drain-to-source voltage (Vds) across the switch. Such a configuration also avoids a condition in which the switch control circuit generates control signals referenced to a body potential rather than a source potential, thereby allowing the switch to reliably turn off even for negative Vds. An additional gain stage ensures that the switch can be properly turned on. The techniques can be used to generate switches that enable highly linear processing of bipolar differential signals even far outside of the supply range.

Abstract: The disclosed technology generally relates to lithographically defined conductive lines for integrated circuit devices formed by plating, and more particularly to conductive lines shaped to reduce the magnitude of electric field in the electric field distributions around conductive lines of integrated and monolithic transformers and isolators.

Abstract: A load switch system and method of manufacture can include: configuring a power switch to complete or interrupt a power circuit; coupling a low current comparator for comparing the current to a low current threshold and outputting a first current threshold signal; coupling a filter to the low current comparator, the filter outputs the first current threshold signal after a predefined length of time; coupling a high current comparator to the current sensor, the high current comparator compares the current to a high current threshold and outputs a second current threshold signal; and coupling a control logic to the low current comparator and to the high current comparator, the control logic opens the power switch and interrupts the power circuit based on the second current threshold signal being output by the high current comparator or the first current threshold signal being output by the filter.

Abstract: A capacitive amplifier device and technique for mitigating the perturbation within the switchable terminals of a feedback capacitor which is produced by the switching activity performed as part of the device's operation. The capacitive amplifier contains feedback components which can be switched without producing significant kickback or poorly behaved transitions due to the inclusion of at least one dedicated circuit. The dedicated circuit is a kickback limiter circuitry which is connected to a switchable node and is designed to reduce the kickback. The technique for reducing the kickback produced can be achieved by connecting and activating the kickback limiter circuitry.

Abstract: Systems, devices, and methods related to antenna elements with perforations and augmentations are provided. An example patch antenna structure includes a first conductive patch on a first layer of the structure, where the first conductive patch includes one or more perforations at a periphery of a first side of the first conductive patch, and one or more extended conductive portions at a second side of the first conductive patch, the second side opposite the first side; a ground plane on a ground layer of the structure, the ground layer spaced apart from the first layer; and a first signal feed to couple a signal to the first conductive patch. In an example, an individual extended conductive portion of the one or more extended conductive portions may compensate a radiation pattern associated with a corresponding one of the one or more perforations.

Abstract: A heat transfer element is disclosed. The heat transfer element can be configured to directly bond to a metal surface of an element. The heat transfer element can include a chamber that is defined at least in part by a housing that has a metal portion. The heat transfer element can also include a phase change material disposed in the chamber. The phase change material can be in thermal communication with the metal portion. The Heat transfer element can be bonded to the element to define a bonded structure.