Abstract: Micro-scale passive devices, such as transformers and capacitors, having an insulator layer with insulative particles and/or conductive or nonlinear conductive particles disposed therein. The insulative particles disposed in the insulator layer can increase a breakdown electric field of the device, and the conductive or nonlinear conductive particles disposed in the insulator layer can reduce a maximum electric field of the device. Increasing the breakdown electric field of the device and/or reducing the maximum electric field of the device can increase the lifespan of a micro-scale passive device, and/or may allow the device to operate at a higher threshold electric field without breakdown of the device.

Abstract: An example transconductance circuit includes a first portion that includes a first degeneration transistor, configured to receive a first input voltage, and a second portion that includes a second degeneration transistor, coupled to the first degeneration transistor and configured to receive a second input voltage. The first portion further includes a first input transistor, coupled to the first degeneration transistor and configured to provide a first output current, while the second portion further includes a second input transistor, coupled to the second degeneration transistor and configured to provide a second output current. Such a transconductance circuit may be used as an input stage capable of reliably operating within drain-source breakdown voltage of the transistors employed therein even in absence of any other protection devices, and may be significantly faster, consume lower power, and occupy smaller die area compared to conventional transconductance circuits.

Abstract: Systems, devices, and methods related to phase shifters are provided. An example true time-delay (TTD) phase shifter structure includes a signal conductive line disposed on a first layer of the structure; a first switchable ground plane comprising a first conductive plane disposed on a second layer of the structure; a second switchable ground plane comprising a second conductive plane disposed on a third layer of the structure, where the first, second, and third layers are separate layers of the structure; a first switch coupled between the first switchable ground plane and a first ground element, the first ground element disposed on the second layer; and a second switch coupled between the second switchable ground plane and a second ground element, the second ground element disposed on the third layer.

Abstract: The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.

Abstract: The disclosed technology generally relates to forming metallization structures for integrated circuit devices by plating, and more particularly to plating metallization structures that are thicker than masking layers used to define the metallization structures. In one aspect, a method of metallizing an integrated circuit device includes plating a first metal on a substrate in a first opening formed through a first masking layer, where the first opening defines a first region of the substrate, and plating a second metal on the substrate in a second opening formed through a second masking layer, where the second opening defines a second region of the substrate. The second opening is wider than the first opening and the second region encompasses the first region of the substrate.

Abstract: An apparatus comprises a sigma-delta analog-to-digital converter (ADC) circuit configured to convert an analog input signal to a digital value. The sigma-delta ADC circuit includes a loop filter circuit including at least one loop filter amplifier, a flash ADC circuit including multiple comparators, and a bias control circuit configured to change a biasing of the at least one loop filter amplifier according to outputs of the multiple comparators of the flash ADC circuit.

Abstract: Radio frequency switches with improved switching speed are provided. In certain embodiments, an RF switching circuit includes a FET switch including a gate, a digital buffer configured to provide a first output voltage to the gate of the FET during a steady-state, and a fast switching circuit in parallel with the digital buffer and configured to provide a second output voltage to the gate of the FET during a switching state. The fast switching circuit includes at least one charge pump configured to boost at least one supply voltage to a multiple of the at least one supply voltage. The fast switching circuit is configured to generate the second output voltage based on the boosted at least one supply voltage.

Abstract: A line protector circuit comprises an external side switch circuit coupled to an external circuit node of the line protector circuit, an internal side switch circuit coupled in series to the external side switch circuit and an internal circuit node of the line protector circuit, a high supply circuit node and a low supply circuit node, and switch control circuitry configured to deactivate the internal side switch circuit and divert a bias current from the external side switch to the low supply circuit node when the external voltage exceeds a high supply voltage of the high supply circuit node.

Abstract: A method for fine-tuning a convolutional neural network (CNN) and a sensor system based on a CNN are disclosed. The sensor system may be deployed at a deployment location. The CNN may be fine-tuned for the deployment location using sensor data, e.g., images, captured by a sensor device of the sensor system at the deployment location. The sensor data may include objects that are not present in an initial data set used for training the CNN. The sensor data and the initial data set may be input to the CNN to train the CNN and obtain fine-tuned parameters of the CNN. The CNN can thus be fine-tuned to the deployment location of the sensor system, with an increased chance of recognizing objects when using the sensor system and the CNN to recognize objects in captured sensor data.

Abstract: A reference electrode with a liquid-impermeable enclosure comprises a chamber for a reference electrolyte. The reference electrode also comprises a first electrode element comprises a reference electrolyte electrode surface arranged to contact a reference electrolyte located within the chamber and a second electrode element is provided at least partially outside the enclosure and comprises a sample electrode surface for contacting a sample. The first and second electrode are electrically connected through the enclosure. Alternatively or additionally, a conductive connecting element defining a part of the enclosure and/or extending through the enclosure electrically connects the first electrode element and the second electrode element.

Abstract: A switching converter circuit comprises a converting circuit stage, an error amplifier, and a control circuit. The converting circuit stage includes a magnetic circuit element and a switching circuit configured to convert an input voltage to a regulated output voltage by charging and discharging the magnetic circuit element using activation pulses generated using a system clock signal. The error amplifier generates a control voltage using the output voltage. The control circuit varies time between successive activation pulses according to the control voltage, and the successive activation pulses are synchronized to the system clock signal.

Abstract: A reference generator system can include a PTAT circuit coupled to a signal supply node and configured to provide a voltage reference signal or a current reference signal that is based on a physical characteristic of one or more components of the PTAT circuit and a correction signal. The system can include a CTAT circuit coupled to the PTAT circuit and configured to provide the correction signal to the PTAT circuit. In an example, the reference generator system can be implemented at least in part using NMOS devices that comprise a portion of an indium gallium zinc oxide (IGZO) substrate.

Abstract: An electronic device and a method of forming such an electronic device are disclosed. The electronic device can include an integrated device package and a component. The integrated device package includes a substrate and a package body over the substrate, and a hole formed through the package body to expose a conductive pad of the substrate. The component is mounted over the package body, and includes a component body and a lead extending from the component body through the hole. The lead includes an insulated portion and a distal exposed portion, and the insulated portion includes a conductor and an insulating layer disposed about the conductor, wherein the distal exposed portion is uncovered by the insulating layer such that the conductor is exposed at the distal portion. The electronic device can also include a conductive material that electrically connects the distal exposed portion to the conductive pad of the substrate.

Abstract: The response of a coil based current measuring circuit is often proportional to frequency. To correct for this a low pass or integrating function is applied to the response to linearize it. The low pass filter is made from real resistors and capacitors, and tolerances in their values significantly affect the estimate of current. The present approach can provide a way of addressing such problems. This allows consumers of electricity to have confidence in the accuracy of, for example, their electricity meter.

Abstract: A power combiner/divider circuit can be structured having a base structure with the addition of an odd-mode capacitor and a low pass network at an end of the base structure or structured having a base structure with the addition of an inductor and a high pass network at an end of the base structure. The power combiner/divider circuit can be implemented as a port coupled to multiple ports with low pass networks or high pass networks arranged at the ends of paths to the multiple ports. In embodiments using low pass base structures or low pass networks coupled to the base structures, inductors in such low pass sections can be positively coupled on a pair-wise basis.

Abstract: A system and method for storing sensed values in an optical receiver corresponding to time-of-flight windows for receiving optical signals elicited by emitted optical pulses includes at least one photodetector, a storage array, and a control circuit. The at least one photodetector is configured to generate output signals indicative of received optical signals. The storage array includes a plurality of storage elements and is connected to receive and store the output signals from the at least one photodetector corresponding to at least a portion of a time-of-flight receive window.

Abstract: The present disclosure relates to a PUF apparatus for generating a persistent, random number. The random number is determined by selecting one or more PUF cells, each of which comprise a matched pair of capacitors that are of identical design, and determining a value that is accurately and reliably indicative of a random manufacturing difference between them, based in which the random number is generated. The random manufacturing differences between the capacitors creates the randomness in the generated random number. Furthermore, because the random manufacturing difference should be relatively stable over time, the generated random number should be persistent.

Abstract: High speed, high dynamic range SAR ADC method and architecture. The SAR DAC comparison method can make fewer comparisons with less charge/fewer capacitors. The architecture makes use of a modified top plate switching (TPS) DAC technique and therefore achieves very high-speed operation. The present disclosure proffers a unique SAR ADC method of input and reference capacitor DAC switching. This benefits in higher dynamic range, no external decoupling capacitory requirement, wide common mode range and overall faster operation due to the absence of mini-ADC.

Abstract: A method of monitoring a battery system includes connecting a voltage divider circuit to a battery of the battery system; measuring a first battery voltage; sampling a first chassis voltage for less than a settling time of the first chassis voltage and estimating a settled value of the first chassis voltage using sampled values of the first chassis voltage; changing a configuration of the voltage divider circuit; measuring a second battery voltage; sampling a second chassis voltage for less than a settling time of the second chassis voltage and estimating a settled value of the second chassis voltage using sampled values of the second chassis voltage; and determining isolation impedance of the battery to a chassis using the first and second battery voltages and the estimated settled values of the first and second chassis voltages.

Abstract: A status of one or more components of a battery monitor circuit can be evaluated, such as to validate operation of the monitor circuit. In an example, a battery monitor circuit can be evaluated by providing a first test signal to a battery voltage measurement circuit that is coupled to a battery. A first analog-to-digital converter (ADC) circuit can be configured to receive a first voltage signal from the battery voltage measurement circuit in response to the first test signal. A processor circuit can be configured to validate the first ADC circuit by evaluating a correspondence between the first test signal and the received first voltage signal. One or more other ADC circuits in the battery monitor circuit can be validated by cross-checking measurement results with information from the first ADC circuit.