Abstract: Vital sign monitors are plagued by noisy photoplethysmography (PPG) data, making it difficult for the monitors to output consistently accurate readings. Noise in PPG signals is often caused by motion. The present disclosure provides improved techniques for reducing motion-related artifacts in optical/PPG measurements for vital signs monitoring. In general, techniques described herein are based on using measurements of reference sensors that include sensors other than optical sensors used for the optical measurements, e.g., biopotential sensors, bioimpedance sensors, and/or capacitive sensors. In particular, techniques described herein aim to filter PPG signals using substantially only the noise components of signals generated by reference sensors, by attenuating or altogether eliminating components of the signals generated by reference sensors which are indicative of the parameter the reference sensors are designed to measure.

Abstract: Disclosed herein are systems and methods for performing DC offset correction of a video signal received over an AC-coupled video link. In one aspect, a transmitter is configured to compute, and provide to a receiver, metadata indicative of a statistical characteristic (e.g., an average or a sum of values) for a group of active pixels of a video signal acquired by a camera. The receiver is configured to compute an analogous statistical characteristic on the video signal received over an AC-coupled video link, and to perform DC offset correction by modifying one or more values of the received video signal based on a comparison of the statistical characteristic computed by the receiver and the one computed by the transmitter and indicated by the received metadata.

Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.

Abstract: A magnetic field sensor is disclosed. The magnetic field sensor includes a first magnetoresistive element and a second magnetoresistive element arranged as a half bridge. The magnetic field sensor also includes two or more conductors adjacent to the first magnetoresistive element and the second magnetoresistive element. The two or more conductors can carry a bias current and a compensation current such that the bias current and the compensation current flow in the same direction adjacent to the first magnetoresistive element while the bias current and the compensation current flow in opposite directions adjacent to the second magnetoresistive element.

Abstract: A gas sensor package is disclosed. The gas sensor package can include a housing defining a first chamber and a second chamber. An electrolyte can be provided in the first chamber. A gas inlet can provide fluid communication between the second chamber and the outside environs. The gas inlet can be configured to permit gas to enter the second chamber from the outside environs. An integrated device die can be mounted to the housing. The integrated device die can comprise a sensing element configured to detect the gas. The integrated device die can have a first side exposed to the first chamber and a second side exposed to the second chamber, with the first side opposite the second side.

Abstract: SPI Round Robin Mode for Single-Cycle MUX Channel Sequencing. SPI round robin mode is an SPI mode applicable for MUX devices control. It allows the MUX output to connect to the next input channel sequentially in just one clock cycle. Configurations can be made such as: clock edge to use (rising/falling), ascending/descending channel sequence, and enabling/disabling the channels to go through. The device supersedes an ADC with built in sequencing and is applicable to multiplexing, switching, instrumentation, process control and isolation application—while retaining SPI device control and operation.

Abstract: A phase-locked loop (PLL) comprising a multi-band oscillator and a memory configured to store control input for the oscillator. The PLL is operable in a calibration mode in which the PLL is configured to acquire a frequency controlled word (FCW) for the PLL corresponding to a frequency generated by the oscillator in response to a first control input threshold on a first band of the oscillator; generate a frequency corresponding to said FCW on a second band of the oscillator adjacent to said first band; identify a second control input causing the oscillator to generate said frequency corresponding to said FCW and store said second control input in memory.

Abstract: An optical device package is disclosed. The optical device package includes a substrate that passes light at an optical wavelength. The optical device package also includes an optical device assembly that is mounted to the substrate. The optical device assembly comprises an optical device die. The optical device die has a first surface that is mounted to and facing the substrate and a second surface that is opposite the first surface. The optical device package further includes a molding compound that is disposed at least partially over the second surface of the integrated device die.

Abstract: Embodiments of the present disclosure provide mechanisms for measuring currents flowing in one or more conductor wires. The mechanisms are based on using magnetic sensor pairs arranged within a housing with an opening for the wires, where each magnetic sensor pair can generate a pair of signals indicative of magnetic fields in two different directions. The outputs of the sensor pairs can be used to derive a measure of current(s) flowing through the one or more wires. The use of magnetic sensor pairs that can measure magnetic field in two different directions may enable simultaneous current measurement in multiple wires placed within the opening, improve accuracy of current measurements while relaxing requirements for precise control of the placement of the wire(s), reduce the impact of stray magnetic interference, and enable both AC and DC measurements.

Abstract: The present disclosure provides a pulse generator which generates a pulse train by mixing pulses of a first clock having a first frequency, with pulses of a second clock having a second frequency. Over a predefined time period, the combination of pulses results in a pulse train having an effective frequency which is between the first and second frequencies. A multiplexer is used to select which of the first and second clocks should be provided to the output. Depending on the desired target frequency, the multiplexer is controlled to mix differing amounts of pulses from the first and second clocks. A multiplexer is controlled by a control signal, which is generated using combinatorial logic using the first clock as an input. The pulse generator may be used, for example, as a clock for a charge pump.

Abstract: The disclosed technology generally relates to forming metallization structures for integrated circuit devices by plating, and more particularly to plating metallization structures that are thicker than masking layers used to define the metallization structures. In one aspect, a method of metallizing an integrated circuit device includes plating a first metal on a substrate in a first opening formed through a first masking layer, where the first opening defines a first region of the substrate, and plating a second metal on the substrate in a second opening formed through a second masking layer, where the second opening defines a second region of the substrate. The second opening is wider than the first opening and the second region encompasses the first region of the substrate.

Abstract: This disclosure describes, among other things, embodiments of devices, systems, and methods for using 3-dimensional (3D) magnetic sensors to detect the position of a magnetic target. By using 3D magnetic sensors, a two dimensional array of such magnetic sensors can be used to determine a 3D position of a magnetic target.

Abstract: Embodiments of the present disclosure provide ADCs particularly suitable for PDAF image sensors, which ADCs may have an increased speed and/or reduced design complexity and power consumption compared to conventional implementations. An example ADC for a PDAF image sensor is configured to implement modified SAR techniques which reduce the number of bit trials required for conversion, and enable increased number of samples in a row-conversion time period of the image sensor. The ADC may implement the modified SAR techniques in combination with CMS in pixel readout signal chain, which may reduce noise without a proportionate increase in ADC sample rate.

Abstract: This disclosure relates to fractional-N phase-locked loops. A digital filter can filter out quantization noise from a modulator. Separate paths can process an integer part associated with an output signal of the digital filter and a fractional part associated with the output signal of the digital filter. The separate paths can be combined in the fractional-N phase-locked loop, for example, as a weighted sum.

Abstract: Isolated DC-DC converters are described. A DC-DC converter is a device which converts a direct current (DC) signal from one voltage to another. An isolated DC-DC converter performs the conversion across an electrical isolation barrier separating two voltage domains. The signal converted from one voltage to another, and transferred from one voltage domain to another, may be a power signal. Described are isolated DC-DC converters which transfer a power signal from one voltage domain to another via an isolator, and a power feedback signal back across the isolator. The isolator is a transformer in some situations.

Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.

Abstract: Aspects of this disclosure relate to an adaptive biasing circuit for a power amplifier. The adaptive biasing circuit can include a shunt resistor arrangement and/or a floating gate linearizer arrangement.

Abstract: An improved receiver for use in a data pocket communications is provide, where the process of configuring the gain of the receiver and identifying a preamble in the data packet are made more robust. The improved receiver does not need to rely on the received power level exceeding a trigger threshold to initiate the gain control. Instead the gain control runs while the receiver is waiting for a data packet. The frequency correction process can run concurrently with the gain control process.

Abstract: Techniques to generate two separate temperature independent reference voltages. The reference voltages can be generated using a chain of ?VBE cells. A cross-quad ?VBE-cell-based bandgap voltage reference can cancel out noise of associated current sources by forcing them to correlate. Several ?VBE stages can be cascaded together to generate an appreciable PTAT component that can cancel the CTAT component from VBE. In some example configurations, only BJTs are used—without requiring use of an amplifier—to generate the bandgap voltages; in this way, extremely low noise voltage references can be generated. The PTAT and the CTAT voltages can be combined to generate a bandgap voltage of approximately VG0 or approximately 2VG0.

Abstract: An embodiment of a thermoelectric device may include a plurality of thermoelectric cells disposed between first and second planes. Each of the thermoelectric cells may include a thermoelectric element formed from a thermoelectric material of a single semiconductor type, the thermoelectric element including a first end, a second end, and a portion extending from the first end to the second end, the portion extending from the first end to the second end including at least two surfaces that face each other; and at least one conductive element electrically connected to and extending away from the second end of the thermoelectric element toward the first end of the thermoelectric element of another thermoelectric cell. Each thermoelectric cell also may further include an insulating element disposed between the at least two surfaces of the thermoelectric element and between portions of the at least one conductive element.