Abstract: In a communication receiver circuit, an amplifier circuit can include an adjustable gain. A signal corresponding to a portion of a transmitted frame can be received, and a gain of the receiver circuit can be adjusted such as automatically, and such adjustment can be referred to as automatic gain control (AGC). An offset correction can be performed to adjust for an error in a received representation of a transmitted carrier, and such offset correction can be referred to as carrier frequency offset (CFO) correction. A portion of the received signal can be dynamically allocated between AGC and CFO correction, such as allocating a longer duration to CFO correction when AGC results in a relatively higher receiver gain, and allocating a shorter duration to CFO correction when AGC results in a relatively lower receiver gain.

Abstract: Micro-electromechanical switch (MEMS) devices can be fabricated using integrated circuit fabrication techniques and materials. Such switch devices can provide cycle life and insertion loss performance suiting for use in a broad range of applications including, for example, automated test equipment (ATE), switching for measurement instrumentation (such as a spectrum analyzer, network analyzer, or communication test system), and uses in communication systems, such as for signal processing. MEMS devices can be vulnerable to electrical over-stress, such as associated with electrostatic discharge (ESD) transient events. A solid-state clamp circuit can be incorporated in a MEMS device package to protect one or more MEMS devices from damaging overvoltage conditions. The clamp circuit can include single or multiple blocking junction structures having complementary current-voltage relationships, such as to help linearize a capacitance-to-voltage relationship presented by the clamp circuit.

Abstract: The present invention relates to current measurement apparatus 100. The current measurement apparatus 100 comprises a measurement arrangement 110, 114 which is configured to be disposed in relation to a load 108 which draws a current signal, the measurement arrangement being operative when so disposed to measure the load drawn current signal. The current measurement apparatus 100 also comprises a signal source 112 which is operative to apply a reference input signal to the measurement arrangement 110, 114 whereby an output signal from the measurement arrangement comprises a load output signal corresponding to the load drawn current signal and a reference output signal corresponding to the reference input signal.

Abstract: A low-noise, low-power reference voltage circuit can include an operational transconductance amplifier (OTA) with inputs coupled to a temperature-compensated voltage, such as can be provided by source-coupled first and second field-effect transistors (FETs) having different threshold voltages. A capacitive voltage divider can feed back a portion of a reference voltage output by the OTA to the inputs of the OTA to help establish or maintain the temperature-compensated voltage across the inputs of the OTA. A switching network can be used, such as initialize the capacitive voltage divider or other capacitive feedback circuit, such as during power-down cycles, or when resuming powered-on cycles. A switch can interrupt current to the OTA during the power-down cycles to save power. The cycled voltage reference circuit can provide a reference voltage to an ADC reservoir capacitor. Powering down can occur during analog input signal sampling, during successive approximation routine (SAR) conversion, or both.

Abstract: Mechanisms for evaluating amplitude for current pulses provided to a transimpedance amplifier (TIA) for current levels beyond the linear range of the TIA where clipping circuit(s) may limit the input voltage of the TIA are disclosed. In one aspect, an example TIA arrangement includes a clipping arrangement that includes multiple clipping circuits. Each clipping circuit can be biased by different bias voltages such that the different clipping circuits are activated at different input current amplitudes. Different clipping circuits can have different impedances, which can result in different recovery time characteristics. With the multiple clipping circuits in clipping arrangements discussed herein, a saturated dynamic range of a TIA can be divided into sub-regions and different pulse widening characteristics for each region may be defined, which may enable determination of amplitude for current pulses provided to the TIA even for current levels beyond the linear range of the TIA.

Abstract: An apparatus includes a processing unit that divides an overlay buffer into a plurality of macro blocks, draws a graphic primitive object including a plurality of pixels, identifies one of the plurality of macro blocks upon a determination that the plurality of pixels has crossed a boundary of the one of the plurality of macro blocks, and image processes the one of the plurality of macro blocks.

Abstract: An apparatus is provided comprising: a first power domain that includes a first component that operates at a first voltage level; a second power domain that includes a media access controller (MAC) that operates at a second voltage level; and a third power domain that includes a physical media access (PHY) device that operates at a third voltage level; wherein the first voltage level is higher than the second voltage level; and wherein the second voltage level is unreferenced; further including: a first reinforced electrical isolation circuit disposed on a first circuit path that includes at least one signal lane that extends between the first power domain and the second power domain; and a second reinforced electrical isolation circuit disposed on a second circuit path that includes at least one signal lane that extends between the MAC device and the PHY device.

Abstract: An amplifier circuit having improved common mode rejection is provided. This can be achieved by estimating the common mode value of an input signal and using this to adjust a target common mode voltage at the output of the amplifier. This can help avoid the differential gain becoming modified by the common mode voltage.

Abstract: A differential digital-to-analog (DAC) circuit that can include a reservoir capacitor and various switches to couple the bottom plates of the input capacitors, e.g., bit-trial capacitors, to reference voltages, e.g., REF+ or REF?. In this manner, the reservoir capacitor can be used to provide any differential charge to the input capacitors, e.g., bit-trial capacitors, and the reference voltages, e.g., REF+ and REF?, can be used to provide any common mode charge to the input capacitors.

Abstract: A stage, suitable for use in an analog to digital converter or a digital to analog converter, can have a plurality of slices that can be operated together to form a composite output. The stage can have reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This feature allows a fast conversion to be achieved without loss of noise performance.

Abstract: A stage, suitable for use in and analog to digital converter or a digital to analog converter, comprises a plurality of slices. The slices can be operated together to form a composite output having reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This allows a fast conversion to be achieved without loss of noise performance. The slices can be sub-divided to reduce scaling mismatch between the most significant bit and the least significant bit. A shuffling scheme is implemented that allows shuffling to occur between the sub-sections of the slices without needing to implement a massively complex shuffler.

Abstract: Apparatus and methods for synchronization of multiple semiconductor dies are provided herein. In certain implementations, a reference clock signal is distributed to two or more semiconductor dies that each include at least one data converter. The two or more dies include a master die that generates a data converter synchronization signal, and at least one slave die that processes the data converter synchronization signal to align timing of data conversion operations across the dies, for instance, to obtain a high degree of timing coherence for digital sampling. In certain implementations, the dies correspond to radar chips of a radar system, and the data converter synchronization signal corresponds to an analog-to-digital converter (ADC) synchronization signal. Additionally, the master radar chip generates a ramp synchronization signal to synchronize transmission sequencing across the radar chips and/or to provide phase alignment of ADC clock signals.

Abstract: Methods, systems and circuits for controlling the power available to the load, by reducing the power available to the load, and additionally or alternatively, limiting the current available by pre-establishing a maximum reference current. The reference current is compared to the actual or estimated current drawn by the load or part of the load. The comparison result is used to control a device or switch which disconnects the power supply or power supply regulator, whether connected directly to the load or connected via voltage dropping device, to one or more or a plurality of the load blocks when the maximum current is exceeded.

Abstract: Radio frequency (RF) isolators are described, coupling circuit domains operating at different voltages. The RF isolator may include a transmitter which emits a directional signal toward a receiver. Layers of materials having different dielectric constants may be arranged to confine the emission along a path to the receiver. The emitter may be an antenna having an aperture facing the receiver.

Abstract: A dither is an uncorrelated signal, usually pseudo-random noise injected into the input of an ADC such that a given input value of the wanted signal becomes spread over a plurality of codes. This reduces the effect of DNL and also smooths the integral non-linearity (INL) response of the ADC. The advantages of introducing dither could be obtained without having to perturb the signal input to the ADC. This avoids the introduction of additional components in the ADC. The dither can be applied to the components used to form a residue of the ADC stage within a pipelined converter. For example, a dither can be applied solely to a DAC part or different dithers can be applied to a ADC and DAC parts respectively. This allows greater flexibility of linearization of the ADC response and the formation of an analog residue by the DAC.

Abstract: Various examples are directed to systems and methods for digital predistortion (DPD). A linear digital predistortion (DPD) circuit may be programmed to generate a pre-distorted signal linear component based at least in part on a complex baseband signal. A nonlinear DPD circuit may be programmed to generate a pre-distorted signal nonlinear component based at least in part on the complex baseband signal. A mixer circuit programmed to generate a pre-distorted signal based at least in part on the pre-distorted signal linear component and the pre-distorted signal nonlinear component.

Abstract: Aspects of the embodiments are directed to systems, methods, and devices for eye gaze tracking. In embodiments, a projective surface, such as a virtual reality display screen or augmented reality projective surface, can project light towards a wearer's eyes. The light can be light representing the shape of the projective surface or can be a displayed shape. The light can be reflected from a cornea. The reflected light from the cornea can be received. A distortion of the shape of the projective surface or displayed shape can be used to determine an eye gaze position.

Abstract: RF communication systems that provide combined demodulation and despreading are provided herein. In certain embodiments, an RF communication system generates an in-phase (I) signal and a quadrature-phase (Q) signal based on processing a received spread spectrum signal carrying a sequence of data symbols. The data symbols each have a symbol period and are coded by one or more multi-bit spreading codes. The RF communication system includes a symbol correlator that delays the I signal and the Q signal by an integer number of symbol periods to thereby generate a delayed I signal and a delayed Q signal, respectively. Additionally, the symbol correlator generates a correlation signal based on correlating the delayed I signal to the I signal and correlating the delayed Q signal to the Q signal. The RF communication system processes the correlation signal to recover the sequence of data symbols.

Abstract: Many processes for audio signal processing can benefit from voice activity detection, which aims to detect the presence of speech as opposed to silence or noise. The present disclosure describes, among other things, leveraging energy-based features of voice and insights on first and second formant frequencies of vowels to provide a low-complexity and low-power voice activity detector. A pair of two channels is provided whereby each channel is configured to detect voice activity in respective frequency bands of interest. Simultaneous activity detected in both channels can be a sufficient condition for determining that voice is present. More channels or pairs of channels can be used to detect different types of voices to improve detection and/or to detect voices present in different audio streams.

Abstract: An interface circuit to an electromagnetic flow sensor is described. In an example, it can provide a DC coupled signal path from the electromagnetic flow sensor to an analog-to-digital converter (ADC) circuit. Examples with differential and pseudo-differential signal paths are described. Examples providing DC offset or low frequency noise compensation or cancellation are described. High input impedance examples are described. Coil excitation circuits are described, such as can provide on-chip inductive isolation between signal inputs and signal outputs. A switched mode power supply can be used to actively manage a bias voltage of an H-Bridge, such as to boost the current provided by the H-Bridge to the sensor coil during select time periods, such as during phase shift time periods of the coil, which can help reduce or minimize transient noise during such time periods.