Patents Assigned to Analog Devices Global
  • Publication number: 20190339337
    Abstract: A calibration apparatus for calibrating a magnetic sensor configured to generate an output signal indicative of magnetic field strength when a bias signal is applied to it is disclosed. The apparatus includes a test magnetic field generator (MFG) to generate magnetic fields of known magnitude, and further includes a processor to control the MFG to generate a known magnetic field, control the sensor to generate a test output signal when the MFG generates the known magnetic field and a known bias signal is applied to the sensor, and determine how to change the bias signal based on a deviation of the measured test output signal from an expected output signal. Using a test MFG that produces known magnetic fields when known bias signals are applied to sensors allows evaluating and compensating for changes in sensitivity of the sensors by accordingly changing bias signals applied to the sensors.
    Type: Application
    Filed: March 6, 2019
    Publication date: November 7, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Yogesh Jayaraman SHARMA, Jochen SCHMITT, Paul R. BLANCHARD
  • Publication number: 20190339727
    Abstract: Methods, systems and circuits for controlling the power available to the load, by reducing the power available to the load, and additionally or alternatively, limiting the current available by pre-establishing a maximum reference current. The reference current is compared to the actual or estimated current drawn by the load or part of the load. The comparison result is used to control a device or switch which disconnects the power supply or power supply regulator, whether connected directly to the load or connected via voltage dropping device, to one or more or a plurality of the load blocks when the maximum current is exceeded.
    Type: Application
    Filed: May 2, 2018
    Publication date: November 7, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Sriram GANESAN, Amit Kumar SINGH, Nilanjan PAL, Nitish KUTTAN
  • Patent number: 10466296
    Abstract: An apparatus comprises a load resistance connectable in series with the electronic sensor to form a series resistance of the load resistance and the internal impedance of the electronic sensor; an excitation circuit configured to apply a predetermined voltage to a circuit element; and a measurement circuit configured to: initiate applying the predetermined voltage to the series resistance and determining the series resistance; initiate applying the predetermined voltage to the load resistance and determining the load resistance; and calculate the internal impedance of the sensor using the determined series resistance and the load resistance, and provide the calculated internal impedance to a user or process.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: November 5, 2019
    Assignee: Analog Devices Global
    Inventors: Guangyang Qu, Yincai Tony Liu, Baotian Hao, Hanqing Wang, Hengfang Mei, Rengui Luo, Yimiao Zhao, Junbiao Ding
  • Patent number: 10468906
    Abstract: Embodiments of the disclosure can provide an optical charging system with an integrated sensor and power receiver. An electronic device (e.g., a wearable) can include an optical sensor for performing photometric measurements. A photodiode of the sensor can be shared and used for generating an electrical signal when exposed to a light source (e.g., LED) of a light power transmitter. The electrical signal can be conditioned by a power management circuit and can be used to charge a device battery. The light power transmitter can include a photodiode, which can be used for establishing a connection with the device using an optical signal emitted by a light source of the optical sensor. The light power transmitter can be power by, e.g., a USB connection. The intensity of the power transmitter light source can be regulated via a feedback signal from the device, based on the battery charging status.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: November 5, 2019
    Assignee: Analog Devices Global
    Inventors: Hua-Jung Yang, Suyi Yao
  • Patent number: 10468484
    Abstract: A modified bipolar transistor is provided which can provide improved gain, Early voltage, breakdown voltage and linearity over a finite range of collector voltages. It is known that the gain of a transistor can change with collector voltage. This document teaches a way of reducing this variation by providing structures for the depletion regions with the device to preferentially deplete with. As a result the transistor's response can be made more linear.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: November 5, 2019
    Assignee: Analog Devices Global
    Inventors: Edward John Coyne, William Allan Lane, Seamus P. Whiston
  • Patent number: 10461770
    Abstract: Techniques for a configurable analog-to-digital converter filter to ameliorate transfer function peaking or frequency response issues are provided. In an example, a front-end circuit of a processing circuit can include a resistor-capacitor filter including at least two capacitors and a switch circuit. The resistor-capacitor filter can couple an input analog signal to the processing circuit. The switch circuit can couple to a first capacitor of the at least two capacitors, and can selectively place a terminal of the first capacitor at a selected one of a plurality of distinct nodes of the resistor-capacitor filter to configure the circuit to address the peaking or frequency response issue.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: October 29, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Avinash Gutta, Venkata Aruna Srikanth Nittala
  • Patent number: 10459013
    Abstract: An apparatus is provided that can estimate a transfer function, for example of current measurement systems, voltage measurement systems and power measurement systems, and also provide an estimate of certainty about the transfer function. This enables customers to have confidence that they are not being overcharged for electricity.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: October 29, 2019
    Assignee: Analog Devices Global
    Inventors: Jonathan Ephraim David Hurwitz, Seyed Amir Ali Danesh, William Michael James Holland, John Stuart
  • Patent number: 10462413
    Abstract: Disclosed herein are systems and methods for performing DC offset correction of a video signal received over an AC-coupled video link. In one aspect, a transmitter is configured to compute, and provide to a receiver, metadata indicative of a statistical characteristic (e.g., an average or a sum of values) for a group of active pixels of a video signal acquired by a camera. The receiver is configured to compute an analogous statistical characteristic on the video signal received over an AC-coupled video link, and to perform DC offset correction by modifying one or more values of the received video signal based on a comparison of the statistical characteristic computed by the receiver and the one computed by the transmitter and indicated by the received metadata.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: October 29, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Isaac Molina Hernandez, Niall D. O'Connell, Sean M. Mullins
  • Patent number: 10461151
    Abstract: An integrated circuit may include a semiconductor die having a trench formed in a surface of the semiconductor die. One or more circuit components may be formed on the surface of the semiconductor die. The trench can extend into the semiconductor die next to at least one circuit component. The trench may surround the circuit component partially or wholly. The trench may be filled with a material having a lower bulk modulus than the semiconductor die in which the trench is formed.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: October 29, 2019
    Assignee: Analog Devices Global
    Inventors: Patrick F. M. Poucher, Padraig L. Fitzgerald, John Jude O'Donnell, Oliver J. Kierse, Denis M. O'Connor
  • Patent number: 10461635
    Abstract: A charge pump circuit comprises a first charge transfer circuit path coupled including a first boost capacitor coupled to a first clock input, a first charge switch coupled to a circuit input, and a first discharge switch coupled to a circuit output; a second charge transfer circuit path including a second boost capacitor coupled to a second clock input, a second charge switch coupled to the circuit input, and a second discharge switch coupled to the circuit output; a first charge control circuit including a first gate switch coupled to a gate input of the first charge switch, and a first gate-drive capacitor coupled to the gate input of the second charge switch; and a second charge control circuit including a second gate switch coupled to a gate input of the second charge switch, and a second gate-drive capacitor coupled to the gate input of the first charge switch.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: October 29, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventor: Jose Bernardo Din
  • Patent number: 10461724
    Abstract: A relaxation oscillator can provide a smaller and cheaper alternative to a crystal oscillator circuit in a wide variety of applications. A sawtooth relaxation oscillator can include overshoot error integration. Separate and distinct oscillator capacitor charging, overshoot error integration, and reset phases can be provided using separate comparators for first and second oscillation capacitors. Potential advantages can include high accuracy high-frequency clock, convenient trimming during initial calibration, clock frequency stability over temperature and time, fast startup with low overshoot, high power supply rejection, low power, or low noise/jitter. The oscillator can charge an oscillation capacitor up to a target voltage, then interrupt charging before beginning an error integration phase that adjusts the target voltage by integrating an overshoot error of a voltage on the oscillation capacitor. After completing the overshoot error integration, the voltage on the oscillation capacitor can be reset.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: October 29, 2019
    Assignee: Analog Devices Global
    Inventors: Jonathan Ephraim David Hurwitz, Sean B. Brennan
  • Patent number: 10454488
    Abstract: Various examples are directed to a variable speed comparator circuit comprising a first comparator, a second comparator, and a third comparator and a logic circuit. The first comparator may be configured to generate a first comparator output using a first input and a second input. The second comparator may be configured to generate a second comparator output using the first input and the second input. The third comparator may be configured to generate a third comparator output using the first input and the second input. A propagation delay of the second comparator may be less than a propagation delay of the first comparator. Also, a propagation delay of the third comparator may be less than the propagation delay of the second comparator. The second comparator may have an input offset relative to the third comparator.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: October 22, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventor: Sandeep Monangi
  • Patent number: 10454493
    Abstract: Many electronic circuits rely on the ratio of one component to other components being well defined. Current flow in component can warm the component causing its electrical properties to change, for example the resistance of a resistor may increase due to self-heating as a result of current flow. The present disclosure provides a way to reduce temperature variation between components so as to reduce electrical mismatch between them or the consequences of such mismatch. This is important as even a change of resistance of, for example, 20-50 ppm in a resistor can result in non-linearity exceeding the least significant bit value of a 16 bit digital to analog converter.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: October 22, 2019
    Assignee: Analog Devices Global
    Inventors: Dennis A. Dempsey, Michael C. W. Coln
  • Patent number: 10447255
    Abstract: A timer circuit is provided comprising: a resistor; a programmable gain circuit coupled to amplify the reference level based upon a resistor and a selected gain; a detection circuit coupled to identify the amplified reference level based upon a resistor; a selection circuit configured to select the gain based at least in part upon the identified amplified reference level based upon a resistor; a comparator circuit configured to transition between providing a signal having a first value and providing a signal having a second value based at least in part upon comparisons of a reactive circuit element excitation level with the amplified reference level based upon a resistor and with a second reference level; and reactive circuit element excitation circuit configured to reverse excitation of the reactive circuit element in response to the comparator circuit transitioning between providing the signal having the first value and providing the signal having the second value.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: October 15, 2019
    Assignee: Analog Devices Global
    Inventors: Sherwin Paul Roldan Almazan, George Redfield Spalding, Jr.
  • Patent number: 10439572
    Abstract: An “all-digital” operational amplifier architecture, that does not have the constraint of maintaining devices in their saturation region, can leverage the high speed achievable by deeply scaled technology to replace traditional linear current referenced continuous-time operational amplifier circuits with CMOS-like dynamic circuits that require no referencing structure, have no static power consumption, and are compatible with ultra-low supply voltages. Techniques are described to replace analog continuous-time linear operational amplifier input and output stages by a discrete-time comparator circuit, e.g., CMOS-style, and a switched capacitor charge pump circuit, respectively.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: October 8, 2019
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Frederick Carnegie Thompson, Riccardo Tonietto
  • Publication number: 20190306447
    Abstract: An image sensor can respond to light either linearly or logarithmically in order to achieve flexible and high contrast performance. This is made possible by using a programmable lookup table, or an array of numbers, that represents control parameter values of the image sensor. The control parameter values in the lookup table are programmable and could be kept constant, increase linearly, or non-linearly, between consecutive indexes. Photodiode control circuitry is used to adapt the response of the photodiodes in the image sensor depending on the lighting impacting upon the image sensor.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Wayne PALMER, Pascal DORSTER, Peeyush BHATIA
  • Publication number: 20190302191
    Abstract: An example method to reduce data handling on lithium ion battery monitors is provided and includes receiving a request from a micro-controller for data associated with one or more cells, receiving signals corresponding to monitored properties from the cells, calculating derivative properties from the monitored properties, dividing a default data into a plurality of portions, and sending the derivative properties and one of the portions to the micro-controller according to at least a first compute logic option or a second compute logic option. The default data can include cell voltages, auxiliary inputs, stack voltage, reference output voltage, analog voltage output, analog voltage input, temperature, and reference buffer voltage. The default data is provided sequentially to the micro-controller in as many consecutive read backs as the number of portions, where each portion corresponds to the default data measured at a distinct time instant.
    Type: Application
    Filed: June 20, 2019
    Publication date: October 3, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventor: Jeremy R. Gorbold
  • Patent number: 10429456
    Abstract: A magnetic device may include a magnetic structure, a device structure, and an associated circuit. The magnetic structure may include a patterned layer of material having a predetermined magnetic property. The patterned layer may be configured to, e.g., provide a magnetic field, sense a magnetic field, channel or concentrate magnetic flux, shield a component from a magnetic field, or provide magnetically actuated motion, etc. The device structure may be another structure of the device that is physically connected to or arranged relative to the magnetic structure to, e.g., structurally support, enable operation of, or otherwise incorporate the magnetic structure into the magnetic device, etc. The associated circuit may be electrically connected to the magnetic structure to receive, provide, condition or process of signals of the magnetic device.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: October 1, 2019
    Assignee: Analog Devices Global
    Inventors: Alan J. O'Donnell, Robert Guyol, Maria Jose Martinez, Jan Kubik, Padraig L. Fitzgerald, Javier Calpe Maravilla, Michael P. Lynch, Eoin E. English
  • Patent number: 10429483
    Abstract: The sensor interface IC measures or calibrates a target resistance to be used as a gain resistor for a TIA amplifier in the sensor interface IC. One or more excitation currents are generated in response to different specified excitation voltages that are applied to an external calibration resistor having a specified calibration resistance value. Response voltages are measured across the target resistor, respectively in response to the corresponding different one or more excitation currents. The resistance value of the target resistor is determined using a difference between the measured response voltages, a difference between the specified excitation voltages, and the specified calibration resistance value.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: October 1, 2019
    Assignee: Analog Devices Global
    Inventors: GuangYang Qu, Leicheng Chen, Michael Looney
  • Publication number: 20190293689
    Abstract: Embodiments of the present disclosure provide mechanisms for measuring currents flowing in one or more conductor wires. The mechanisms are based on using magnetic sensor pairs arranged within a housing with an opening for the wires, where each magnetic sensor pair can generate a pair of signals indicative of magnetic fields in two different directions. The outputs of the sensor pairs can be used to derive a measure of current(s) flowing through the one or more wires. The use of magnetic sensor pairs that can measure magnetic field in two different directions may enable simultaneous current measurement in multiple wires placed within the opening, improve accuracy of current measurements while relaxing requirements for precise control of the placement of the wire(s), reduce the impact of stray magnetic interference, and enable both AC and DC measurements.
    Type: Application
    Filed: June 8, 2018
    Publication date: September 26, 2019
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Boris Lerner, Yogesh Jayaraman Sharma, Sefa Demirtas, Jochen Schmitt, Paul Blanchard, Arthur J. Kalb, Harvey Weinberg, Jonathan Ephraim David Hurwitz