Patents Assigned to Analog Devices, Inc.
  • Patent number: 8108567
    Abstract: An apparatus and a method for providing serialized HDMI data from an HDMI source to an HDMI sink. An HDMI transmitter may include inputs including control inputs, a deserializer, and a parser. The inputs may receive serialized HDMI data from an HDMI data source. A deserializer may deserialize the serialized HDMI data received on each of the respective inputs and outputting parallel data for each of the inputs. A parser may parse the parallel data output from the deserializer from each of the respective inputs into serial video data at a first clock rate and audio data at a second clock rate. Control inputs of the transmitter may be set to a first mode in which from the deserializer is caused to bypass the parser, and the parallel data is output from the HDMI transmitter.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: January 31, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Christian Willibald Bohm
  • Patent number: 8106710
    Abstract: The present disclosure describes a variable gain transconductor having gain and/or linearity performance that are selectively controllable in operation. In one embodiment the gain and/or linearity performance are selectively controllable in response to the strength of an input signal, such as an incoming radio frequency (RF) signal to a radio receiver. In one embodiment, gain and/or linearity performance of the variable gain transconductor are selectively controllable by selecting or deselecting a number of operating bias cells. In one embodiment, gain and/or linearity performance of the variable gain transconductor are selectively controllable by selecting or deselecting a number of operating transconductance (gm) cells. In one embodiment, gain and/or linearity performance of the variable gain transconductor are selectively controllable by selecting or deselecting a combination of operating bias cells and gm cells.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: January 31, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Antonio Montalvo
  • Patent number: 8105880
    Abstract: Methods are disclosed related to attaching a die to a leadframe. One such method includes initially bonding a carrier pad which is pre-coated with a thermosetting first adhesive to the leadframe. The first adhesive can be raised to its thermosetting cure temperature by heating the leadframe to a temperature just above the thermosetting cure temperature of the first adhesive. A thermosetting second adhesive which is liquid at room temperature can be applied to a second major surface of the carrier pad, and the die can be placed on the second adhesive and aligned with the leadframe. The second adhesive can be raised to its thermosetting cure temperature to bond the die to the carrier pad, and in turn form a bonded assembly.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: January 31, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Garrett Griffin
  • Patent number: 8106700
    Abstract: In embodiments of the present invention, the problems of poor low-frequency response, slow speed, high cost and high power consumption in conventional voltage translators are addressed by processing high frequency and low frequency components of an input signal separately in two parallel stages without the use of large passive components or slow devices. At the output, the processed high frequency and low frequency components are seamlessly merged at a combining stage that maintains the integrity of the frequency response over the complete translator bandwidth.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: January 31, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Kimo Y. F. Tam, Jennifer Lloyd
  • Patent number: 8107306
    Abstract: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: January 31, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Eric Nestler, Jeffrey Bernstein, David Reynolds, Alexander Alexeyev, Jeffrey Venuti, William Bradley, Vladimir Zlatkovic
  • Publication number: 20120020139
    Abstract: An apparatus and method of testing one-time-programmable memory limits current through a one-time-programmable memory to less than a threshold amplitude, where the memory has a fuse configured to blow upon receipt of a signal having the threshold amplitude. The method also uses blow signal assertion circuitry to attempt to assert a blow signal to the fuse. When not defective, blow signal assertion circuitry is configured to permit the low amplitude signal to flow through the fuse when the fuse is not blown and the blow signal is asserted. The method then produces an output signal having a success value if the limited current flows through the fuse, and a failure value if the current does not flow through the fuse.
    Type: Application
    Filed: July 22, 2011
    Publication date: January 26, 2012
    Applicant: Analog Devices, Inc
    Inventors: Howard R. Samuels, Thomas W. Kelly
  • Publication number: 20120020502
    Abstract: A headphone system includes a headphone, a sensor, and a processor. The headphone may provide sound from virtual speakers to a listener via a plurality of sound paths that are filtered with a plurality of filters. The sensor may sense an angular velocity of a movement of the listener. The processor may receive the angular velocity and may calculate delays in the plurality of sound paths and filter coefficients for the plurality of filters based on the angular velocity, and insert the calculated delays in the plurality of sound paths and adjust the plurality of filters with the calculated filter coefficients.
    Type: Application
    Filed: May 25, 2011
    Publication date: January 26, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Robert Adams
  • Patent number: 8102206
    Abstract: An embodiment of an amplifier circuit includes a plurality of amplifiers connected between input and output terminals to form at least partially parallel amplification paths between the terminals. A first plurality of the amplification paths include series-connected pluralities of the amplifiers and share a common first series-connected amplifier, and a second plurality of the amplification paths have different first amplifiers. Optionally, a third plurality of the amplification paths include series-connected pluralities of the amplifiers and share a common last series-connected amplifier, and a fourth plurality of the amplification paths have different last amplifiers. Alternatively, a first plurality of the amplification paths include series-connected pluralities of the amplifiers and share a common last series-connected amplifier, and a second plurality of the amplification paths have different last amplifiers.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: January 24, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Hajime Shibata
  • Patent number: 8102201
    Abstract: A reference circuit configured to provide a reference value. The circuit includes a first circuit unit which is configured to provide a first electrical representation that varies linearly with temperature and has a crossover point where its polarity relative to zero changes from a negative value to a positive value. A second circuit unit is configured to provide a second electrical representation that varies linearly with temperature. The first and second circuit units are operable for facilitating combining the first and second electrical representations such that the combination has a value corresponding to the value of the second electrical representation at a reference temperature.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: January 24, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Stefan Marinca
  • Patent number: 8100012
    Abstract: A MEMS sensor includes a substrate having a MEMS structure movably attached to the substrate, a cap attached to the substrate and encapsulating the MEMS structure, and an electrode formed on the cap that senses movement of the MEMS structure.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: January 24, 2012
    Assignee: Analog Devices, Inc.
    Inventors: John R. Martin, Xin Zhang
  • Patent number: 8102637
    Abstract: Disclosed are a method, device, and system for a microelectromechanical (MEM) device control system that can control the operation of a MEM device. The system can include a microelectromechanical device and a control circuit. The micromechanical device can include a moveable member coupled to an electrical terminal, a sensor, responsive to a movement of the moveable member, can output a sensor signal based on the movement of the moveable member, and an actuating electrode for receiving a control signal. The control circuit can be responsive to the signals output by the sensor and outputs the control signal to the actuating electrode.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: January 24, 2012
    Assignee: Analog Devices, Inc.
    Inventors: William Hunt, Denis Ellis, Padraig Fitzgerald, Colin Lyden
  • Patent number: 8102002
    Abstract: The invention is directed to a protection circuit for protecting IC chips against ESD. An ESD protection circuit for an integrated circuit chip may comprise an isolated NMOS transistor, which may comprise an isolation region isolating a backgate from a substrate, and a first and second doped regions and a gate formed on the backgate. The ESD protection circuit may further comprise a first terminal to connect the isolation region to a first electrical node, and a second terminal to connect the second doped region to a second electrical node. The first electrical node may have a higher voltage level than the second electrical node, and the gate and backgate may be coupled to the second terminal.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: January 24, 2012
    Assignee: Analog Devices, Inc.
    Inventors: David Foley, Haiyang Zhu
  • Patent number: 8103027
    Abstract: A MEMS microphone has an SOI wafer, a backplate formed in a portion of the SOI wafer, and a diaphragm adjacent to and movable relative to the backplate. The backplate has at least one trench that substantially circumscribes a central portion of the backplate.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: January 24, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Xin Zhang, Thomas Chen, Sushil Bharatan, Aleksey S. Khenkin
  • Publication number: 20120013406
    Abstract: A clock system includes a digital phase/frequency detector (DPFD), a buffer, a digitally-controlled oscillator (DCO) including a sigma-delta modulator (SDM), an adder, a first frequency divider. The DPFD may have a first input for a reference input clock, a second input for a feedback signal, the DPFD generating an output representing a difference between the reference input clock and the feedback signal. The buffer may be coupled to the DPFD for accumulating the difference signal over time. The sigma-delta modulator (SDM) may have a control input coupled to the buffer. The adder may have inputs coupled to the (SDM) and a source of an integer control word. The first frequency divider may have an input for a clock signal and a control input coupled to the adder, the DCO generating an output clock signal having an average frequency representing a frequency of the input clock signal divided by (N+F/M), wherein N is determined by the integer control word and F/M is determined by an output of the SDM.
    Type: Application
    Filed: July 19, 2010
    Publication date: January 19, 2012
    Applicant: Analog Devices, Inc.
    Inventors: Dan ZHU, Reuben Pascal Nelson, Timir Raithatha, Wyn Palmer, John Cavey, Ziwei Zheng
  • Publication number: 20120013492
    Abstract: The invention provides a systematic error correction network coupled to a converter. The converter may display a systematic non-linearity error, and the systematic error correction network shapes a correction transform function that acts like counter distortion function for the non-linearity error. The systematic error correction network then scales the correction transform function according to a reference variable, where the magnitude of non-linearity error is related to the reference variable. The scaled correction transform function is then applied to the converter path in order to generate a corrected analog output signal.
    Type: Application
    Filed: June 24, 2011
    Publication date: January 19, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Roderick MCLACHLAN, Michael COLN
  • Publication number: 20120013320
    Abstract: A voltage regulator receives an unregulated DC input voltage supply and provides a regulated DC output voltage. A primary pass element and an external resistor are located in a primary current path through which a load current flows from the input terminal to the output terminal. The voltage regulator includes two control circuits that control the impedances of two pass elements. Power dissipation can be improved and the dropout voltage can be reduced by maintaining the voltage on an internal node of the voltage regulator.
    Type: Application
    Filed: July 16, 2010
    Publication date: January 19, 2012
    Applicant: Analog Devices, Inc.
    Inventor: Brian Moane
  • Patent number: 8098094
    Abstract: An input stage for an instrumentation system may include a resistor coupled between an input terminal and a summing node, and an amplifier arranged to maintain the voltage at the summing node. In anther embodiment, an instrumentation input system may include an input stage to receive a signal to be measured, and a variable gain amplifier having an input coupled to an output of the input stage, wherein the variable gain amplifier comprises two or more gain stages. A variable gain amplifier may include an attenuator having an input and a series of tap points and a series of low-inertia switches to steer outputs from the attenuator to an output terminal.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: January 17, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Publication number: 20120008242
    Abstract: Apparatuses and methods for electronic circuit protection are disclosed. In one embodiment, an apparatus comprises an internal circuit electrically connected between a first node and a second node, and a protection circuit electrically connected between the first node and the second node and configured to protect the internal circuit from transient electrical events. The protection circuit comprises a bipolar transistor having an emitter connected to the first node, a base connected to a third node, and a collector connected to a fourth node. The protection circuit further comprises a first diode electrically connected between the third node and the fourth node, and a second diode electrically connected between the second node and the fourth node. The first diode is an avalanche breakdown diode having an avalanche breakdown voltage lower than or about equal to a breakdown voltage associated with the base and the collector of the bipolar transistor.
    Type: Application
    Filed: July 8, 2010
    Publication date: January 12, 2012
    Applicant: Analog Devices, Inc.
    Inventor: Javier A. Salcedo
  • Publication number: 20120007207
    Abstract: Apparatus and methods for electronic circuit protection are disclosed. In one embodiment, an apparatus comprises a substrate includes an n-well and a p-well adjacent the n-well. An n-type active area and a p-type active area are disposed in the n-well. The p-type active area, the n-well, and the p-well are configured to operate as an emitter, a base, and a collector of an PNP bipolar transistor, respectively, and the p-type active area surrounds at least a portion of the n-type active area so as to aid in recombining carriers injected into the n-well from the p-well before the carriers reach the n-type active area. The n-well and the p-well are configured to operate as a breakdown diode, and a punch-through breakdown voltage between the n-well and the p-well is lower than or equal to about a breakdown voltage between the p-type active area and the n-well.
    Type: Application
    Filed: February 18, 2011
    Publication date: January 12, 2012
    Applicant: Analog Devices, Inc.
    Inventor: Javier A. Salcedo
  • Publication number: 20120007195
    Abstract: Apparatuses are disclosed, such as those involving integrated circuit packaging. In one embodiment, a chip package includes: an encapsulation having a top surface and a bottom surface facing away from the top surface. The package further includes a leadframe including a plurality of leads. Each of the leads includes an exposed portion exposed through one of edges of the bottom surface of the encapsulation. The exposed portion has a length. At least one of exposed portions positioned along one of the edges of the bottom surface of the encapsulation has a length different from other exposed portions along the edge. The package can also include a dummy pad exposed through a corner of the bottom surface. The configuration can enhance solder joint reliability of the package when the package is attached to a printed circuit board.
    Type: Application
    Filed: August 5, 2010
    Publication date: January 12, 2012
    Applicant: Analog Devices, Inc.
    Inventor: Ying Zhao