Patents Assigned to Analog Devices, Inc.
  • High bit rate optical communication over multimode fibers
    Patent number: 7194156
    Abstract: An optical communication system includes a transmitter that receives an input optical signal from an optical source and performs filtering so that an output signal from the transmitter includes a specific set of fiber modes that are allowed to pass for further processing. A receiver receives the output signal and performs the necessary operations to retrieve a signal indicative of the input signal.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: March 20, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Shrenik Deliwala
  • Variable-gain amplifier having error amplifier with constant loop gain
    Patent number: 7190227
    Abstract: A translinear amplifier is disclosed. A loop amplifier drives the bases of the input and output transistor pairs from the differential collector voltage of the input pair. The loop amplifier contains a third differential pair (a gain pair). The tail current of the gain pair is inversely related to the tail current of the input pair, such that loop amplifier gain remains stable when the transconductance of the input pair changes (due, e.g., to input gain changes). In one embodiment, a linear-in-dB interface is provided that adjusts input pair tail current exponentially (and gain pair tail current exponentially and inversely) to linear voltage changes at a gain input.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: March 13, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Anti-cross conduction drive control circuit and method
    Patent number: 7187226
    Abstract: An anti-cross conduction driver control circuit and method prevent the occurrence of race conditions and avoid cross-conduction between series-connected power devices, typically MOSFETs, controlled in accordance with the present invention. Individual state machines are connected across the inputs and outputs of each power device driver, and are arranged to accurately determine when the driver has completed a task requested of it. Each state machine produces a “lockout” signal based on driver status, which is used to inhibit the operation of the opposite driver under prescribed conditions, and to thereby prevent cross-conduction between the series-connected power devices.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: March 6, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Jonathan M. Audy
  • Multi-Microphone System
    Publication number: 20070047746
    Abstract: A microphone system implements multiple microphones on a single base. To that end, the microphone system has a base, and a plurality of substantially independently movable diaphragms secured to the base. Each of the plurality of diaphragms forms a variable capacitance with the base and thus, each diaphragm effectively forms a generally independent, separate microphone with the base.
    Type: Application
    Filed: August 23, 2006
    Publication date: March 1, 2007
    Applicant: ANALOG DEVICES, INC.
    Inventors: Jason Weigold, Kieran Harney
  • Optical cross-connect system
    Patent number: 7183633
    Abstract: An optical cross-connect switch comprises a base (216), a flap (211) and one or more electrically conductive landing pads (222) connected to the flap (211). The flap (211) has a bottom portion that is movably coupled to the base (216) such that the flap (211) is movable with respect to a plane of the base (216) from a first orientation to a second orientation. The one or more landing pads (222) are electrically isolated from the flap (211) and electrically coupled to be equipotential with a landing surface.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: February 27, 2007
    Assignee: Analog Devices Inc.
    Inventors: Michael J. Daneman, Franklin Wall, Behrang Behin, Murali Chaparala, Mark W. Chang, Scott Dalton, Timothy Beerling, Stephen Panyko, Meng-Hsiung Kiang, Boris Kobrin, Chuang-Chia Lin
  • Correction for circuit self-heating
    Patent number: 7183794
    Abstract: Methods and apparatus for correcting for circuit self-heating replicate a thermal characteristic of a component that may be coupled to a bias circuit. A bias circuit may include replication component coupled to a reference cell. The replication component may be included in a feedback loop with the reference cell to improve accuracy.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: February 27, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Vincenzo DiTommaso
  • Stable systems for comparing and converting signals
    Patent number: 7183812
    Abstract: Comparator systems are provided that include cross-coupled transistors which respond to a differential network that receives an input signal. The systems further include a control transistor connected across the cross-coupled transistors and a bias network configured to apply a bias voltage to the control transistor that is substantially the voltage across two transistors which are each biased into saturation. It has been found that this bias during the systems' acquire phase substantially stabilizes the systems' gain over variations in their total environment and that this stabilization enhances the systems' performance.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: February 27, 2007
    Assignee: Analog Devices, Inc.
    Inventor: David Graham Nairn
  • Synthesizer and method for generating an output signal that has a desired period
    Patent number: 7180339
    Abstract: A frequency synthesizer includes a circuit which selectively outputs multiple output signals having different respective periods to drive the average period of a combined output signal to substantially equal a desired period.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: February 20, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Tyre Paul Lanier
  • Logarithmic temperature compensation for detectors
    Patent number: 7180359
    Abstract: The intercept of a logarithmic amplifier is temperature stabilized by generating a signal having the form H log H where H is a function of temperature such as T/T0. The first H factor is cancelled, thereby generating a correction signal having the form Y log H. The cancellation may be implemented with a transconductance cell having a hyperbolic tangent function. The H log H function may be generated by a pair of junctions biased by one temperature-stable current and one temperature-dependent current. The pair of junctions and the transconductance cell may be coupled together in a translinear loop. A user-accessible terminal may allow adjustment of the correction signal for different operating frequencies.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: February 20, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Vincenzo DiTommaso
  • Universal signal modulators
    Patent number: 7180384
    Abstract: Universal signal modulators structures are shown which are particularly useful for selectively generating polar-modulated digital sequences from input phase and amplitude symbols and for generating quadrature-modulated digital sequences from input first and second quadrature symbols. Significantly, the modulation structure (quadrature modulation or polar modulation) of these embodiments can selected by simply changing the state of a mode command.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: February 20, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Dimitrios Efstathiou, Ken Gentile
  • Multi-path digital power supply controller
    Patent number: 7180439
    Abstract: A multi-path digital power supply controller includes a first ADC (ADC1) coupled to the supply's output voltage Vout and arranged to provide an output which varies with Vout's low frequency components, and a second ADC (ADC2) coupled to Vout and arranged to provide an output which varies with Vout's high frequency components. A digital reference value is subtracted from the output of ADC1 to produce a low frequency digital error signal, and a summing circuit sums the low frequency digital error signal and the output of ADC2. Processing circuitry is arranged to produce an output which varies with the summed signal and is suitable for coupling to a power stage for use in regulating Vout. Preferably, ADC1 is a low-bandwidth high-resolution ADC and ADC2 is a high-bandwidth low-resolution ADC, both of which are low-cost components.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: February 20, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Anthonius Bakker
  • Method for placing a device in a selected mode of operation
    Patent number: 7181635
    Abstract: A method for placing a device in a selected mode of operation. The method comprises the steps of initializing a device select signal into a first logic state, asserting the device select signal in a second logic state, and returning the device select signal to the first logic state within a first user-controlled time window. A device is also described that includes means for detecting logic state transitions at a device select input and a clock input, and means for changing operating mode of the device in response to a predetermined number of logic state transitions at the clock input, occurring between logic state transitions at the device select input. The selected operating mode may be a reduced power consumption mode, for example, or another operating mode of the device, such as a daisy-chain mode of operation, or a mode that accommodates programming of analog input range.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: February 20, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Michael Byrne, Nicola O'Byrne, Colin Price, Derek Hummerston
  • Synchronization pulse detection circuit
    Patent number: 7176979
    Abstract: A synchronization pulse detector includes an absolute value independent shape detector for processing samples of an input signal having a synchronization pulse and a plurality of non-synchronization pulses to determine whether such samples have a predetermined sequence. The predetermined sequence includes a first and second absolute value independent time-varying portions and a first and second absolute value independent non-time varying portions. One of the first and second absolute value independent time-varying portions having a positive slope and the other one of the first and second absolute value independent time-varying portions having a negative slope.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: February 13, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Christian Willibald Böhm, Michael Patrick Daly, Kieran Heffernan
  • Compact Galois field multiplier engine
    Patent number: 7177891
    Abstract: A compact Galois field parallel multiplier engine includes a multiplier circuit for multiplying together two polynomials with coefficients over a Galois field to obtain their product; a Galois field linear transformer circuit has a multiply input from the multiplier circuit for predicting the modulo remainder of the polynomial product for an irreducible polynomial; first and second polynomial inputs; the Galois field linear transformer circuit may include a plurality of cells configured in a matrix section and a unity matrix section wherein the unity matrix section cells represent the prediction of the remainder when the output of the multiplier circuit is a polynomial with a power less than the power of the irreducible polynomial.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: February 13, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Yosef Stein, Joshua A. Kablotsky
  • Automatic environmental compensation of capacitance based proximity sensors
    Publication number: 20070032967
    Abstract: Improved capacitive sensor operation is achieved with improved discrimination between environmental drift and apparent drift attributable to human proximity to the sensor. A proximity algorithm detects conditions interpreted as indicating a user is close to, but not touching, a sensor. When such proximity is detected, ambient value calibration is halted, thereby avoiding treating the human's proximity as environmental drift requiring compensation and preventing miscalculation of calibration. The proximity algorithm employs two moving-average filters (implemented in hardware or software) to monitor the CDC output values over time and to make appropriate adjustments to a signal representing the ambient, while distinguishing environmental drift from proximity-induced pseudo-drift.
    Type: Application
    Filed: July 18, 2006
    Publication date: February 8, 2007
    Applicant: Analog Devices, Inc.
    Inventors: Ken Feen, Laurent Coquerel, Richardson Jeyapaul, John Cleary
  • Proportional to absolute temperature voltage circuit
    Patent number: 7173407
    Abstract: A voltage circuit including a first amplifier having first and second inputs and having an output driving a current mirror circuit is provided. Outputs from the current mirror circuit drive first and second transistors which are coupled to the first and second input of the amplifier respectively. The base of the first transistor is coupled to the second input of the amplifier and the collector of the first transistor is coupled to the first input of the amplifier such that the amplifier keeps the base and collector of the first transistor at the same potential. The first and second transistors are adapted to operate at different current densities such that a difference in base emitter voltages between the first and second transistors may be generated across a resistive load coupled to the second transistor, the difference in base emitter voltages being a PTAT voltage.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: February 6, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Stefan Marinca
  • Method and a digital-to-analog converter for converting a time varying digital input signal
    Patent number: 7173554
    Abstract: A digital-to-analogue converter (DAC) (1) comprises a digital processing circuit (2) having an input register (10) to which data samples of a digital input signal are written at a data sampling rate (fs). A delay register (14) holds each data sample for one clock cycle of the data sampling rate (fs), and a subtracting circuit (15) sequentially produces difference values between consecutive ones of the data samples by subtracting the data sample in the delay register (14) from the input register (12) on each clock cycle of the data sampling rate (fs).
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: February 6, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Hans Juergen Tucholski
  • High accuracy segmented DAC
    Patent number: 7173552
    Abstract: A N-bit segmented digital to analog converter (DAC) adapted to provide an analog signal output on the basis of a digital input code, the DAC being formed from a plurality of individual segments, the segments being selectively combined to effect the output from the DAC determined by the input and wherein the number of segments is given by 2N?1+x where x is greater or equal to one, and at least one of the segments has a weighting less than that of the least significant bit (LSB) of the overall DAC.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: February 6, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Santiago Iriarte Garcia
  • Clock sources and methods with reduced clock jitter
    Patent number: 7173470
    Abstract: Clock sources are provided which are especially useful for reducing phase noise in signal samplers that typically provide samples of an analog input signal in signal-conditioning systems such as analog-to-digital converters. This phase noise reduction is realized with the recognition that sampler noise is related to clock jitter by a ratio of the input signal's slew rate to the clock's slew rate. Clock embodiments include a frequency divider and a signal gate. The divider divides a first signal to provide a second signal with a slew rate lowered from the slew rate of the first signal and the gate passes the second signal when commanded by the first signal to thereby generate a clock signal.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: February 6, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Franklin M. Murden, Ahmed Mohamed Abdelatty Ali
  • Receiver circuit with transmission loss compensation
    Patent number: 7174143
    Abstract: Transmission loss compensation is provided for receiver circuits in general, including an ATE receiver circuit having a voltage-to-current converter, such as a transconductance amplifier, that receives a distorted DUT signal and provides an output to a current-to-voltage converter, such as a transimpedance amplifier. The compensation circuit injects a compensation current into the current-to-voltage converter to compensate for transmission losses. The compensation circuit can be configured to inject a plurality of transient compensation currents with different respective time constants and peak values.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: February 6, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Anthony E. Turvey