Abstract: A multi-phase hybrid DC-DC converter using a switched-capacitor technique is described. The multi-phase hybrid converter can reduce the volt-seconds on the inductors of the converter, which can allow for a reduction in the size of the inductors. In addition, the multi-phase hybrid converter can utilize inductors as current sources to charge and discharge the flying capacitors, which can reduce the size of the mid capacitor and increase solution density. Because charging and discharging are performed by inductors, the multi-phase hybrid converter can eliminate the capacitor-to-capacitor charge transfer. As such, the multi-phase hybrid converter does not need high capacitance to achieve high efficiency operation, which can further increase solution density.

Abstract: Fin field-effect transistor (FinFET) thyristors for protecting high-speed communication interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.

Abstract: A dual-phase hybrid DC-DC converter using a switched-capacitor technique is described. The dual-phase hybrid converter can reduce the volt-seconds on the inductors of the converter, which can allow for a reduction in the size of the inductors. In addition, the dual-phase hybrid converter can utilize inductors as current sources to charge and discharge the flying capacitors, which can reduce the size of the mid capacitor and increase solution density. Because charging and discharging are performed by inductors, the dual-phase hybrid converter can eliminate the capacitor-to-capacitor charge transfer. As such, the dual-phase hybrid converter does not need high capacitance to achieve high efficiency operation, which can further increase solution density.

Abstract: An image processing system having on-the-fly calibration uses the placement of the imaging sensor and the light source for calibration. The placement of the imaging sensor and light source with respect to each other affect the amount of signal received by a pixel as a function of distance to a selected object. For example, an obstruction can block the light emitter, and as the obstruction is positioned an increasing distance away from the light emitter, the signal level increases as light rays leave the light emitters, bounce off the obstruction and are received by the imaging sensor. The system includes a light source configured to emit light, and an image sensor to collect incoming signals including reflected light, and a processor to determine a distance measurement at each of the pixels and calibrate the system.

Abstract: A device is disclosed. The device includes a housing that defines a chamber. The chamber is to be at least partially filled with an electrolyte material. The device also includes a plurality of electrodes that are at least partially embedded in the housing and exposed to the chamber. The device further includes an access port that provides fluid communication between an interior of the housing and the outside environs.

Abstract: Pulse width modulation (PWM) controllers for hybrid converters are provided herein. In certain embodiments, a PWM controller for a hybrid converter includes a threshold generation circuit for generating a threshold signal based on an output voltage of the hybrid converter, a threshold adjustment circuit for generating an adjusted threshold signal based on sensing a voltage of a flying capacitor of the hybrid converter, and a comparator that generates a comparison signal based on comparing the adjusted threshold signal to an indication of an inductor current of the hybrid converter. The output of the comparator is used for generating PWM control signals used for turning on and off the switches (for instance, power transistors) of the hybrid converter.

Abstract: Sensor apparatus and methods for operating the same for measuring acceleration are disclosed. In some embodiments, circuitry inside a sensor digitizes a measured acceleration signal from an accelerometer into a digitized acceleration signal, which is processed by a digital equalization filter within the sensor to provide an equalized acceleration signal. The equalized acceleration signal may have a frequency response that is substantially flat over a frequency range that extends beyond the resonant frequency of a MEMs sensor within the accelerometer of the sensor.

Abstract: Apparatus and methods for clock duty cycle correction and deskew are provided. In certain embodiments, a clock distribution circuit includes a clock driver that provides a differential clock signal to a clock slicer over a pair of transmission lines. The clock distribution circuit further includes a resistor-inductor-capacitor (RLC) tuning circuit for providing termination between the pair of transmission lines and a differential input to the clock slicer. The RLC tuning circuit includes a pair of resistor digital-to-analog converters (resistor DACs or RDACs) coupled to the pair of transmission lines and a pair of controllable inductor-capacitor (LC) circuits coupled to the pair of transmission lines.

Abstract: A sensor for measuring the contents of a syringe or other container is described. The sensor includes a voltage source, a pair of electrodes, a measurement circuit, and an electrode shield. The voltage source is coupled to the electrodes, and the electrodes apply an electric field through at least a portion of the container or syringe. The measurement circuit measures capacitance across the electrodes. The electrode shield partially encloses the pair of electrodes. The electrode shield may include an inner electrode shield having a second voltage, and an outer electrode shield having a third voltage.

Abstract: Techniques, methods, circuits, and systems are provided for providing stabilization for a circuit. One example system includes a switching converter coupled to a power source; a low-pass filter coupled to a load device; a direct current (DC) path; and an alternating current (AC) path, where the DC path and the AC path are provided between the switching converter and the low-pass filter, and where the AC path provides a non-phased information signal to be used to compensate for a phase delay occurring in the DC path. In a more specific implementation, the DC path can be configured to provide control, at low frequency, for an output to the load device. In addition, an error amplifier can be to the DC path and the AC path, where the low-pass filter and the error amplifier can be configured to determine a switchover between the AC path and DC path.

Abstract: Isolators for signals and/or powers transmitted between two circuits configured to operate at different voltage domains are provided. The isolators may have working voltages, for example, higher than 500 Vrms, higher than 1000 Vrms, or between 333 Vrms and 1800 Vrms. The isolators may have a fully symmetrical configuration. The isolators may include a primary winding coupled to a driver and a secondary winding coupled to a receiver. The primary and secondary windings may be laterally coupled to and galvanically isolated from each other. The primary and secondary windings may include concentric traces. The primary and secondary windings may be fabricated using a single metallization layer on a substrate.

Abstract: Gallium nitride-based monolithic microwave integrated circuits (MMICs) can comprise aluminum-based metals. Electrical contacts for gates, sources, and drains of transistors can include aluminum-containing metallic materials. Additionally, connectors, inductors, and interconnect devices can also comprise aluminum-based metals. The gallium-based MMICs can be manufactured in complementary metal oxide semiconductor (CMOS) facilities with equipment that produces silicon-based semiconductor devices.

Abstract: Transconductor circuits with programmable tradeoff between bandwidth and flicker noise are disclosed. An example circuit includes an input port, an output port, a plurality of transistors, and a switch arrangement that includes a plurality of switches, configured to change coupling between the input port, the output port, and the transistors to place the transconductor circuit in a first or a second mode of operation. An input capacitance of the transconductor circuit operating in the first mode is larger than when the transconductor circuit is operating in the second mode. In the first mode, having a larger input capacitance results in a decreased flicker noise because the amount of flicker noise is inversely proportional to the input capacitance. In the second mode, having a smaller input capacitance leads to an increased flicker noise but that is acceptable for wide-bandwidth applications because wide-bandwidth signals may be less sensitive to flicker noise.

Abstract: High voltage clamps with transient activation and activation release control are provided herein. In certain configurations, an integrated circuit (IC) includes a clamp electrically connected between a first node and a second node and having a control input. The IC further includes a first resistor-capacitor (RC) circuit that activates a detection signal in response to detecting a transient overstress event between the first node and the second node, an active feedback circuit that provides feedback from the first node to the control input of the clamp in response to activation of the detection signal, a second RC circuit that activates a shutdown signal after detecting passage of the transient overstress event based on low pass filtering a voltage difference between the first node and the second node, and a clamp shutdown circuit that turns off the clamp via the control input in response to activation of the shutdown signal.

Abstract: Described herein are systems and methods that provide for asymmetric image splitter image stream applications. In one embodiment, a system supporting image multi-streaming comprises an asymmetric image splitter engine that splits super-frame image streams into two or more image streams and a fractional clock divider circuit. The fractional clock divider may comprise a digital feedback control loop and a one-bit sigma delta modulator. The fractional clock divider circuit may provide compatible display clock frequencies for each of the two or more image streams. When a multi-image stream comprises the two image streams, the asymmetric image splitter engine adjusts a vertical asymmetry of a first image stream with a shortest height to same height as a second image stream by adding vertical padding to the first image stream. The super-frame image streams may comprise image streams from video, LIDAR, radar, or other sensors.

Abstract: Systems and methods are disclosed for phase unwrapping for time-of-flight imaging. A method is provided for phase unwrapping that includes measuring a plurality of wrapped depths at a respective plurality of frequencies, wherein each of the plurality of wrapped depths corresponds to a respective phase, generating a plurality of unwrapped phases based on a probability distribution function, by unwrapping each of the plurality of wrapped depths, and identifying a Voronoi cell.

Abstract: An example transconductance circuit includes a first portion that includes a first degeneration transistor, configured to receive a first input voltage, and a second portion that includes a second degeneration transistor, coupled to the first degeneration transistor and configured to receive a second input voltage. The first portion further includes a first input transistor, coupled to the first degeneration transistor and configured to provide a first output current, while the second portion further includes a second input transistor, coupled to the second degeneration transistor and configured to provide a second output current. Such a transconductance circuit may be used as an input stage capable of reliably operating within drain-source breakdown voltage of the transistors employed therein even in absence of any other protection devices, and may be significantly faster, consume lower power, and occupy smaller die area compared to conventional transconductance circuits.

Abstract: Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.

Abstract: Apparatus and methods for vector modulator phase shifters are provided. In certain embodiments, a phase shifter includes a quadrature filter that filters a differential input signal to generate a differential in-phase (I) voltage and a differential quadrature-phase (Q) voltage, an in-phase variable gain amplifier (I-VGA) that amplifies the differential I voltage to generate a differential I current, a quadrature-phase variable gain amplifier (Q-VGA) that amplifies the differential Q voltage to generate a differential Q current, and a current mode combiner that combines the differential I voltage and the differential Q voltage to generate a differential output signal. A phase difference between the differential output signal and the differential input signal is controlled by gain settings of the I-VGA and the Q-VGA.

Abstract: Techniques for biasing output transistor of a push-pull amplifier output stage are provided. In certain applications the techniques can improve efficiency of the amplifier. In an example, a circuit can include an output stage including first and second output transistors, a first scaled replica transistor corresponding to the first output transistor, and an amplifier circuit in a feedback arrangement for biasing a gate of the first output transistor at a level that, at a specified stand-by current level of the first output transistor, reproduces a voltage difference between the drain and source terminals of the first output transistor across the drain and source terminals of the first replica transistor.