Patents Assigned to Analog Devices, Inc.
  • Back-gate field-effect transistors and methods for making the same
    Patent number: 11626486
    Abstract: A back-gate carbon nanotube field effect transistor (CNFETs) provides: (1) reduced parasitic capacitance, which decreases the energy-delay product (EDP) thus improving the energy efficiency of digital systems (e.g., very-large-scale integrated circuits) and (2) scaling of transistors to smaller technology nodes (e.g., sub-3 nm nodes). An exemplary back-gate CNFET includes a channel. A source and a drain are disposed on a first side of the channel. A gate is disposed on a second side of the channel opposite to the first side. In this manner, the contacted gate pitch (CGP) of the back-gate CNFET may be scaled down without scaling the physical gate length (LG) or contact length (LC). The gate may also overlap with the source and/or the drain in this architecture. In one example, an exemplary CNFET was demonstrated to have a CGP less than 30 nm and 1.6× improvement to EDP compared to top-gate CNFETs.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: April 11, 2023
    Assignees: Massachusetts Institute of Technology, Analog Devices, Inc.
    Inventors: Max Shulaker, Tathagata Srimani, Samuel Fuller, Yosi Stein, Denis Murphy
  • Amplifier input offset compensation
    Patent number: 11626847
    Abstract: Various examples are directed to amplifier circuits and methods for operating amplifier circuits. The amplifier circuit may comprise a first amplifier stage. The first amplifier stage comprises a first amplifier, a first feedback resistance, a second amplifier, a second feedback resistance, and a gain resistance. A first current source may be electrically coupled to provide a first current across the gain resistance in a first direction. A second current source may be electrically coupled to provide a second current across the gain resistance in a second direction opposite to the first direction.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: April 11, 2023
    Assignee: Analog Devices, Inc.
    Inventors: David James Plourde, Greg L. Disanto
  • ANALOG SWITCHED-CAPACITOR NEURAL NETWORK
    Publication number: 20230108651
    Abstract: Systems and methods are provided for reducing power in in-memory computing, matrix-vector computations, and neural networks. An apparatus for in-memory computing using charge-domain circuit operation includes transistors configured as memory bit cells, transistors configured to perform in-memory computing using the memory bit cells, capacitors configured to store a result of in-memory computing from the memory bit cells, and switches, wherein, based on a setting of each of the switches, the charges on at least a portion of the plurality of capacitors are shorted together. Shorting together the plurality of capacitors yields a computation result.
    Type: Application
    Filed: February 18, 2022
    Publication date: April 6, 2023
    Applicant: Analog Devices, Inc.
    Inventors: Eric G. NESTLER, Naveen VERMA, Hossein VALAVI
  • Multi quantizer loops for delta-sigma converters
    Patent number: 11621722
    Abstract: The number of bits in the quantizer can be decoupled from the number of bits in the feedback digital-to-analog converter (DAC) A delta-sigma analog-to-digital converter circuit can include a first quantizer to generate an output having a first number of bits and a second quantizer coupled to an output of the first quantizer, where the second quantizer can receive the output of the first quantizer and generate an output having a second number of bits. The feedback DAC can be coupled to the second quantizer to receive a representation of the output of the second quantizer, where the output of the feedback digital-to-analog converter circuit has the second number of bits. These techniques can reduce the area of the feedback DAC, e.g., 4 or 5 bits, and the techniques can achieve a higher maximum stable amplitude (MSA) because it is effectively a second order loop.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: April 4, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Abhishek Bandyopadhyay, Akira Shikata
  • Multi-phase laser driver techniques
    Patent number: 11621539
    Abstract: This disclosure is directed to, among other things, techniques to quickly replenish a capacitance of a laser diode driver circuit after an optical pulse, which can enable a burst of pulses (more than one pulse), such as to enable pulse coding. An energy reservoir circuit can be coupled to a laser diode driver circuit and to a power supply circuit and configured to store enough energy to fire the RD laser diode driver more than once. The energy reservoir circuit can act as an intermediate interface between the RD laser diode driver and the power supply circuit to better optimize the current requirements of each block.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: April 4, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Shawn S. Kuo, James Lin, Ronald A. Kapusta
  • Laser beam control in a LIDAR system
    Patent number: 11614541
    Abstract: This disclosure describes techniques for operating a lidar device. The techniques include emitting light resulting in a plurality of non-parallel laser beam waves; directing the plurality of non-parallel laser beam waves towards a laser beam scanner; reflecting the non-parallel plurality of beam waves by the laser beam scanner towards a collimator device; collimating, with the collimator device, the plurality of non-parallel laser beam waves reflected by the laser beam scanner into a corresponding plurality of parallel plane waves; and directing the plurality of plane waves from the collimator device towards a field of interest.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: March 28, 2023
    Assignee: Analog Devices, Inc.
    Inventor: Kemiao Jia
  • Multiple trigger electrostatic discharge (ESD) protection device for integrated circuits with multiple power supply domains
    Patent number: 11611211
    Abstract: A system having a device for conducting an electrostatic discharge (ESD) current from a designated pin node. The system includes first and second pin nodes, and a switching device having a first switching threshold. The switching device includes a first, terminal coupled to a reference node, and a second terminal, coupled to the first pin node to actuate the switching device to conduct ESD current from the first pin node responsive to a voltage between the first pin node and the reference node exceeding the first switching threshold. The switching device further includes a third terminal, coupled to the second pin node, to actuate the switching device to conduct ESD current from the first pin node responsive to a voltage between the first pin node and the second pin node exceeding a second switching threshold.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: March 21, 2023
    Assignee: Analog Devices, Inc.
    Inventor: Michael Amato
  • Sensor package
    Patent number: 11604084
    Abstract: A sensor package is disclosed. The sensor package can include a housing that at least partially defines a flow channel. The sensor package can also include an electrically conductive spacer that is disposed on a surface of the housing in the flow channel. The sensor package can further include a sensor die that is disposed in and exposed to the flow channel. The sensor die electrically attached to the spacer such that the sensor die is elevated relative to the surface of the housing.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: March 14, 2023
    Assignee: ANALOG DEVICES, INC.
    Inventors: David Frank Bolognia, Jiawen Bai
  • PROGRAMMABLE DELAY LINE WITH GLITCH SUPPRESSION
    Publication number: 20230070085
    Abstract: There is disclosed herein programmable delay lines and control methods having glitch suppression. In particular, the programmable delay lines may include latches that are triggered based on a trigger event of an input signal (which is often an edge of the input signal). The programmable delay lines may include one or more latches coupled between capacitor and transistor subassemblies and the latches, where the latches cause a delay between the time the trigger event arrives at the capacitor and transistor subassemblies and the latches. The delay can prevent the latches from updating at the same time that the edge of the input signal arrives at the capacitor and transistor subassemblies, which can suppress glitches that can causes errors in operation.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 9, 2023
    Applicant: Analog Devices, Inc.
    Inventor: John KENNEY
  • Optical distance detection
    Patent number: 11598861
    Abstract: In an optical detection system, a reference waveform can be used for automated analysis of a received waveform. The reference waveform can be adjusted (e.g., distorted) using information about one or more of a receive channel configuration or other aspects of the receive channel signal, facilitating a more effective comparison between a received impulse and the reference waveform. Such a comparison can be used in a time-to-digital conversion (TDC) technique, such as to provide delay values that can then be used to determine a distance between the illuminated target and an optical transceiver. Other techniques can be used to enhance range accuracy or resolution, such as using automated techniques for control of one or more of receive channel gain, summing or averaging (aggregation of received signals), or bias compensation (e.g., DC balancing).
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: March 7, 2023
    Assignee: Analog Devices, Inc.
    Inventor: Alexander Edward Policht
  • Virtual evaluation for circuits and systems
    Patent number: 11599697
    Abstract: Various examples are directed to systems and methods for evaluating electronic components. A server computing device may provide an evaluation user interface to a user application executing at a user computing device. The server computing device may receive an indication of an electronic component for evaluation from the user application and via the user interface and access a configuration data set for the electronic component. The configuration data set may comprise argument data describing a set of arguments for the electronic component; binding data describing a relationship between a first argument of the set of arguments and a first model input parameter; and simulator data describing a model for the electronic component. The server computing device may also evaluate the electronic component based at least in part on the configuration data set.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: March 7, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Jason Cockrell, Thomas M. MacLeod
  • Multi-phase hybrid converter
    Patent number: 11601049
    Abstract: A multi-phase hybrid DC-DC converter using a switched-capacitor technique is described. The multi-phase hybrid converter can reduce the volt-seconds on the inductors of the converter, which can allow for a reduction in the size of the inductors. In addition, the multi-phase hybrid converter can utilize inductors as current sources to charge and discharge the flying capacitors, which can reduce the size of the mid capacitor and increase solution density. Because charging and discharging are performed by inductors, the multi-phase hybrid converter can eliminate the capacitor-to-capacitor charge transfer. As such, the multi-phase hybrid converter does not need high capacitance to achieve high efficiency operation, which can further increase solution density.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: March 7, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Owen Jong, Ya Liu, Yingyi Yan, Jindong Zhang
  • FinFET thyristors for protecting high-speed communication interfaces
    Patent number: 11595036
    Abstract: Fin field-effect transistor (FinFET) thyristors for protecting high-speed communication interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: February 28, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Javier A. Salcedo, Jonathan G. Pfeifer
  • Dual-phase hybrid converter
    Patent number: 11594956
    Abstract: A dual-phase hybrid DC-DC converter using a switched-capacitor technique is described. The dual-phase hybrid converter can reduce the volt-seconds on the inductors of the converter, which can allow for a reduction in the size of the inductors. In addition, the dual-phase hybrid converter can utilize inductors as current sources to charge and discharge the flying capacitors, which can reduce the size of the mid capacitor and increase solution density. Because charging and discharging are performed by inductors, the dual-phase hybrid converter can eliminate the capacitor-to-capacitor charge transfer. As such, the dual-phase hybrid converter does not need high capacitance to achieve high efficiency operation, which can further increase solution density.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: February 28, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Owen Jong, Ya Liu, Yingyi Yan
  • BUILT-IN CALIBRATION OF TIME-OF-FLIGHT DEPTH IMAGING SYSTEMS
    Publication number: 20230055829
    Abstract: An image processing system having on-the-fly calibration uses the placement of the imaging sensor and the light source for calibration. The placement of the imaging sensor and light source with respect to each other affect the amount of signal received by a pixel as a function of distance to a selected object. For example, an obstruction can block the light emitter, and as the obstruction is positioned an increasing distance away from the light emitter, the signal level increases as light rays leave the light emitters, bounce off the obstruction and are received by the imaging sensor. The system includes a light source configured to emit light, and an image sensor to collect incoming signals including reflected light, and a processor to determine a distance measurement at each of the pixels and calibrate the system.
    Type: Application
    Filed: August 22, 2022
    Publication date: February 23, 2023
    Applicant: Analog Devices, Inc.
    Inventors: Charles MATHY, Brian C. DONNELLY, Nicolas LE DORTZ, Sefa DEMIRTAS
  • Device with chemical reaction chamber
    Patent number: 11587839
    Abstract: A device is disclosed. The device includes a housing that defines a chamber. The chamber is to be at least partially filled with an electrolyte material. The device also includes a plurality of electrodes that are at least partially embedded in the housing and exposed to the chamber. The device further includes an access port that provides fluid communication between an interior of the housing and the outside environs.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: February 21, 2023
    Assignee: Analog Devices, Inc.
    Inventors: David Frank Bolognia, Brian Hall
  • Pulse width modulation controllers for hybrid converters
    Patent number: 11581796
    Abstract: Pulse width modulation (PWM) controllers for hybrid converters are provided herein. In certain embodiments, a PWM controller for a hybrid converter includes a threshold generation circuit for generating a threshold signal based on an output voltage of the hybrid converter, a threshold adjustment circuit for generating an adjusted threshold signal based on sensing a voltage of a flying capacitor of the hybrid converter, and a comparator that generates a comparison signal based on comparing the adjusted threshold signal to an indication of an inductor current of the hybrid converter. The output of the comparator is used for generating PWM control signals used for turning on and off the switches (for instance, power transistors) of the hybrid converter.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: February 14, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Yingyi Yan, San Hwa Chee
  • Method and apparatus for improving MEMs accelerometer frequency response
    Patent number: 11579165
    Abstract: Sensor apparatus and methods for operating the same for measuring acceleration are disclosed. In some embodiments, circuitry inside a sensor digitizes a measured acceleration signal from an accelerometer into a digitized acceleration signal, which is processed by a digital equalization filter within the sensor to provide an equalized acceleration signal. The equalized acceleration signal may have a frequency response that is substantially flat over a frequency range that extends beyond the resonant frequency of a MEMs sensor within the accelerometer of the sensor.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: February 14, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Khiem Quang Nguyen, Adam R. Spirer
  • Apparatus and methods for clock duty cycle correction and deskew
    Patent number: 11579649
    Abstract: Apparatus and methods for clock duty cycle correction and deskew are provided. In certain embodiments, a clock distribution circuit includes a clock driver that provides a differential clock signal to a clock slicer over a pair of transmission lines. The clock distribution circuit further includes a resistor-inductor-capacitor (RLC) tuning circuit for providing termination between the pair of transmission lines and a differential input to the clock slicer. The RLC tuning circuit includes a pair of resistor digital-to-analog converters (resistor DACs or RDACs) coupled to the pair of transmission lines and a pair of controllable inductor-capacitor (LC) circuits coupled to the pair of transmission lines.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: February 14, 2023
    Assignee: Analog Devices, Inc.
    Inventor: Wei-Hung Chen
  • DRUG DELIVERY MONITORING SYSTEM
    Publication number: 20230042083
    Abstract: A sensor for measuring the contents of a syringe or other container is described. The sensor includes a voltage source, a pair of electrodes, a measurement circuit, and an electrode shield. The voltage source is coupled to the electrodes, and the electrodes apply an electric field through at least a portion of the container or syringe. The measurement circuit measures capacitance across the electrodes. The electrode shield partially encloses the pair of electrodes. The electrode shield may include an inner electrode shield having a second voltage, and an outer electrode shield having a third voltage.
    Type: Application
    Filed: September 9, 2022
    Publication date: February 9, 2023
    Applicant: Analog Devices, Inc.
    Inventors: Alan DUGAS, Lalinda D. FERNANDO