Abstract: A system and method to detect the fundamental frequency of an electric input signal using a feedback control loop including a phase error detector, a loop controller, and a digitally controlled oscillator. The frequency detector may detect the fundamental frequency of an electric input signal and produce an output signal representing the fundamental frequency of the electric input signal. The frequency detector may further include a filter that may be coupled to the frequency detector output signal in order to remove spurious tones or noise from the output signal.

Abstract: A system and method can be provided for sampling the residual error in an oversampled SAR ADC, bandpass filtering the sampled residual error, and providing the bandpass filtered signal to an input of a DAC, such as to provide a bandpass filtered output of the SAR ADC. The bandpass filtered output of the SAR ADC can have a reduced electrical noise.

Abstract: Apparatus and methods are disclosed related to managing characteristics of a mobile device based upon capacitive detection of materials proximate the mobile device, a capacitive gesture system that can allow the same gestures be used in arbitrary locations within range of a mobile device. One such method includes receiving a first capacitive sensor measurement with a first capacitive sensor of the mobile device. The method further includes determining a value indicative of a material adjacent to the mobile device based on a correspondence between the first capacitive sensor measurement and stored values corresponding to different materials. The method further includes sending instructions to adjust a characteristic of the mobile device based on the determined value indicative of the material adjacent to the mobile device. In certain examples, gesture sensing can be performed using capacitive measurements from the capacitive sensors.

Abstract: Aspects of this disclosure relate to compensating for an offset in a receiver. In one embodiment, the receiver comprises a mixer, a feedback amplifier, and an offset correction circuit. The offset correction circuit can generate an indication of an offset in a differential input to the feedback amplifier and apply an offset compensation signal at an offset compensation node. The offset compensation node can be in a signal path of the feedback amplifier. Such offset compensation can reduce or eliminate leakage from a local oscillator at an input port of the mixer and/or at an antenna port of the receiver.

Abstract: In an embodiment, a body of apparatus includes an opening, such as a V-shaped jaw, that deterministically locates a position of a wire in at least one dimension when the wire is placed in the opening. The apparatus also includes a plurality of sensors. At least one differential signal can be generated from signals from magnetic sensors, such as anisotropic magnetoresistance (AMR) sensors, of the plurality of sensors to cancel out common mode interference. An additional sensor of the plurality of sensors provides an output from which the location of the wire in another dimension is determined. The current flowing through the wire can be derived from at least the at least one differential signal and the location of the wire the other dimension.

Abstract: An active antenna test system is described. The active antenna test system comprises an active antenna unit comprising: a plurality of antenna elements; at least one processor; a plurality of transceiver modules operably coupled to the at least one processor and arranged to receive at least one first baseband signal for transmission via at least one of the plurality of antenna elements and arranged to pass at least one second baseband signal thereto received and down-converted from at least one of the plurality of antenna elements; and at least one switching module operably coupling the plurality of antenna modules to the plurality of transceiver modules. The active antenna test system also comprises at least one communication test equipment, such as a radio frequency, RF, test module and at least one baseband processor.

Abstract: A flash analog-to-digital converter (ADC) includes comparators that convert an analog input signal to a digital output signal. Offsets of these comparators introduce noise and can hurt the performance of the ADC. Thus, these comparators are calibrated using calibration codes. Conventional calibration methods determine these calibration codes by removing the ADC from an input signal. Otherwise, it is difficult to distinguish the noise from the signal in the calibration measurement. In contrast, an embodiment can determine the calibration codes while the ADC converts the input signal to a digital signal. Such an embodiment can be achieved by a frequency-domain technique. In an embodiment employing a frequency-domain power meter, an input signal can be removed from the power measurement. This removal enables accurate measurement of in-band noise without having the measurement be corrupted by input signal power.

Abstract: For continuous-time multi-stage noise shaping analog-to-digital converters (CT MASH ADCs), quantization noise cancellation often requires accurate estimation of transfer functions, e.g., a noise transfer function of the front end modulator and a signal transfer function of the back end modulator. To provide quantization noise cancellation, digital quantization noise cancellation filters adaptively tracks transfer function variations due to integrator gain errors, flash-to-DAC timing errors, as well as the inter-stage gain and timing errors. Tracking the transfer functions is performed through the direct cross-correlation between the injected maximum length linear feedback shift registers (LFSR) sequence and modulator outputs and then corrects these non-ideal effects by accurately modeling the transfer functions with programmable finite impulse response (PFIR) filters.

Abstract: An analog-to-digital converter (ADC) is a device that can include a reference shuffler and a loop filter. An ADC can achieve better performance with incremental adjustment of a pointer of the reference shuffler, changing coefficients of the loop filter, and storing calibration codes of the ADC in a non-volatile memory. By incrementally adjusting a pointer of the reference shuffler, a calibration can be performed more efficiently than with a random adjustment of the pointer. By temporarily changing the loop filter coefficients, a greater amount of activity can be introduced into the loop filter. This activity can allow the calibration to proceed more efficiently. By storing the calibration codes in a non-volatile memory, a search space for calibration codes can be reduced. Thus, a calibration can occur more quickly, and the calibration itself can be improved.

Abstract: Use of spoken input for user devices, e.g. smartphones, can be challenging due to presence of other sound sources. Blind source separation (BSS) techniques aim to separate a sound generated by a particular source of interest from a mixture of different sounds. Various BSS techniques disclosed herein are based on recognition that providing additional information that is considered within iterations of a nonnegative tensor factorization (NTF) model improves accuracy and efficiency of source separation. Examples of such information include direction estimates or neural network models trained to recognize a particular sound of interest. Furthermore, identifying and processing incremental changes to an NTF model, rather than re-processing the entire model each time data changes, provides an efficient and fast manner for performing source separation on large sets of quickly changing data. Carrying out at least parts of BSS techniques in a cloud allows flexible utilization of local and remote sources.

Abstract: For continuous-time multi-stage noise shaping analog to digital converters (CT MASH ADCs), quantization noise cancellation often requires estimation of transfer functions, e.g., a noise transfer function of the front end modulator. To estimate the noise transfer function, a dither signal can be injected in the front end modulator. However, it is not trivial how the dither signal can be injected, since the dither signal can potentially leak to the back end modulator and cause overall noise degradation. To address some of these issues, the dither signal is injected post the flash analog to digital converter (ADC) of the front end modulator. Furthermore, dummy comparator structures can be used to synchronize the dither with the quantization noise of the targeted flash ADC.

Abstract: Provided herein are apparatus and methods for enhancing bandwidth in trench isolated integrated circuits. In certain configurations, an auxiliary trench forming floating regions between moat isolation regions can isolate parasitic sidewall capacitances of active device regions from ground or AC ground. In this manner the active device regions are merged by the auxiliary trench so as to improve circuit bandwidth and enhance circuit performance. When arranged or combined within a circuit branch, transistors within each floating moat can operate with relatively small parasitic displacement current and can have improved performance.

Abstract: Typically, complex systems require a separate and expensive equalizer at the output of an analog-to-digital converter (ADC). Rather than providing a separate equalizer, the effective Signal Transfer Function (STF) of a Multi-stAge noise SHaping (MASH) ADC can be modified by leveraging available digital filtering hardware necessary for quantization noise cancellation. The modification can involves adding calculations in the software previously provided for computing digital quantization noise cancellation filter coefficients, where the calculations are added to take into account equalization as well. As a result, the signal transfer function can be modified to meet ADC or system-level signal-chain specifications without additional equalization hardware. The method is especially attractive for high-speed applications where magnitude and phase responses are more challenging to meet.

Abstract: Present disclosure aims to accelerate computer-implemented function evaluation by accelerating determination of a table index and a fraction required for interpolation when a processor uses lookup table based function approximation to compute a function of a particular input value. Systems and methods proposed herein are based on an insight that, by carefully selecting configuration for a lookup table used for function approximation, it is possible to reduce determination of table index and fraction to simple shifting of bits of an input value. Once table index and fraction are determined according to systems and methods proposed herein, the value of the function for the given input value may be computed as known in the art.

Abstract: For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine switching mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology forces each DAC unit elements (UEs) to switch a certain amount times and then use the modulator itself to measure the errors caused by those switching activities respectively. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.

Abstract: Systems and methods of implementing a more efficient and less resource-intensive CNN are disclosed herein. In particular, applications of CNN in the analog domain using Sampled Analog Technology (SAT) methods are disclosed. Using a CNN design with SAT results in lower power usage and faster operation as compared to a CNN design with digital logic and memory. The lower power usage of a CNN design with SAT can allow for sensor devices that also detect features at very low power for isolated operation.

Abstract: For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine timing mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology utilizes cross-correlation of each DAC unit elements (UEs) output to the entire modulator output to measure its timing mismatch error respectively. Specifically, the timing mismatch error is estimated using a ratio based on a peak value and a value for the next tap in the cross-correlation function. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.

Abstract: A amplifier system may include a predistorter receiving an input signal to generate a predistortion signal, a first converter receiving the predistortion signal to generate a preamplified signal, a power amplifier receiving the preamplified signal to generate an output signal based on the preamplified signal and the input signal, and a second converter sampling the output signal to generate a feedback signal. The power amplifier may produce a distortion signal at a first frequency, the second converter may sample the output signal using a timing signal with a second frequency that is lower than the first frequency to generate the feedback signal, and the predistorter, based upon the feedback signal, may predistort the predistortion signal to reduce the distortion signal at the first frequency.

Abstract: This application provides methods and apparatus for controlling aspects of a synchronous rectifier power converter. In an example, an apparatus can include a minimum duty cycle control circuit configured to receive first control signals for one or more switches associated with the synchronous rectifier power converter, to compare a duty cycle of the first control signals to a minimum duty cycle threshold, and to provide second control signals having at least the minimum duty cycle for an active snubber switch of the synchronous rectifier power converter.

Abstract: An encapsulated MEMS device includes stress-relief trenches in a region of its substrate that surrounds the movable micromachined structures and that is covered by a cap, such that the trenches are fluidly exposed to a cavity between the substrate and the cap. A method of fabricating a MEMS device includes fabricating stress-relief trenches through a substrate and fabricating movable micromachined structures, and capping the device prior art encapsulating the device.