Abstract: Methods and devices for a remote control device for a display device are disclosed. In one embodiment, the remote control device may comprise a plurality of light sources that each has a light profile angled in a predetermined degree different from other light sources. In another embodiment, the remote control device may comprise a controller; and a plurality of optical detectors coupled to the controller. Each optical detector may generate a pair of electrical signals in response to incident light from a plurality of light sources located on a display device and the controller may calculate the position of the remote control device based on the electrical signals.

Abstract: A discrete-time (e.g., digital) filter can be used as an interpolation filter for processing an oversampled input signal, such as included as a portion of a sigma-delta digital-to-analog conversion circuit. An interpolation filter control circuit can be configured to adjust a filter order of the discrete-time interpolation filter at least in part in response to information indicative of an envelope signal magnitude. For example, higher-level input signals might be processed using an interpolation filter having a stop-band attenuation that is more stringently-specified (e.g., having greater attenuation) than a corresponding attenuation used for lower-level input signals. The filter order can be variable, such as varied in response to a detected envelope magnitude of the input signal to achieve power savings as compared to a filter having fixed parameters.

Abstract: Image capturing systems with interline CCD structures designed to reduce the delay between captures of subsequent image frames are disclosed. Proposed interline CCD structures include two or more sets of storage units associated with a given set of photodetecting elements, where each photodetecting element is associated with one storage unit of each set of storage units in that the charge generated by the photodetecting element during the acquisition of a particular image frame (i.e. during a particular exposure period) may be stored any one of these storage units prior to read-out. Providing multiple sets of storage units allows read-out of charge corresponding to one image frame and stored in one set of storage units while accumulating charge corresponding to another image frame in another set of storage units, thus reducing the delay between captures of different image frames. Consequently, errors and artifacts of the image capturing system can be minimized.

Abstract: Several features are disclosed that improve the operating performance of MEMS switches such that they exhibit improved in-service life and better control over switching on and off.

Abstract: Capacitive sensing can be used to measure electrostatic features of a space. Rudimentary capacitive sensing can be blurry. For instance, the resolution of a capacitive sensor generating a simple electric field is not very high, and the response to the simple electric field is also not very high. Using many capacitive sensors and special sets of excitation signals exciting the capacitive sensors, the capacitive sensors can generate specialized electrostatic fields. Because the specialized electrostatic fields provide different views of the space, enhanced inferences can be made from measurements of responses to those specialized electrostatic fields. Selecting certain specialized electrostatic fields can allow capacitive sensors to sense a focused region of the space. Repeating the steps with varied electrostatic fields can allow capacitive sensors to make enhanced inferences for many focused regions of the space, thereby increasing the resolution of capacitive sensing.

Abstract: The present disclosure relates generally to improving audio processing using an intelligent microphone and, more particularly, to techniques for processing audio received at a microphone with integrated analog-to-digital conversion, digital signal processing, acoustic source separation, and for further processing by a speech recognition system. Embodiments of the present disclosure include intelligent microphone systems designed to collect and process high-quality audio input efficiently. Systems and method for audio processing using an intelligent microphone include an integrated package with one or more microphones, analog-to-digital converters (ADCs), digital signal processors (DSPs), source separation modules, memory, and automatic speech recognition. Systems and methods are also provided for audio processing using an intelligent microphone that includes a microphone array and uses a preprogrammed audio beamformer calibrated to the included microphone array.

Abstract: Power line carriers (PLCs) are susceptible to transients and electromagnetic interference (EMI) on the power line. To address transients and EMI on the power line, an improved power PLC involves transmitting a signal over the power line using a controlled current source, where the current source is modulated by the signal. The current source output is designed to be independent of the voltage on the power line and the load, and thus, is less susceptible to transients and EMI on the power line. The system architecture of the improved PLC also allows for simple, predictable, and flexible termination. In an example implementation in the automotive industry, the improved high frequency PLC may provide a low cost replacement for existing communication interfaces. The improved PLC may consolidate system in-vehicle communication, reduce in-vehicle wiring, provide system flexibility, and decrease vehicle weight and system cost.

Abstract: Typically, complex systems require a separate and expensive equalizer at the output of an analog-to-digital converter (ADC). Rather than providing a separate equalizer, the effective Signal Transfer Function (STF) of a Multi-stAge noise SHaping (MASH) ADC can be modified by leveraging available digital filtering hardware necessary for quantization noise cancellation. The modification can involves adding calculations in the software previously provided for computing digital quantization noise cancellation filter coefficients, where the calculations are added to take into account equalization as well. As a result, the signal transfer function can be modified to meet ADC or system-level signal-chain specifications without additional equalization hardware. The method is especially attractive for high-speed applications where magnitude and phase responses are more challenging to meet.

Abstract: Apparatus and methods for asynchronous clock mapping are provided herein. In certain configurations, an upstream server of a transport network generates clock difference data indicating a time difference between a server clock signal and a client clock signal, which have an asynchronous timing relationship with respect to one another. The clock difference data is generated with high precision by using one or more time-to-digital converters (TDCs). The clock difference data is included in a transmitted data stream, and is used by a downstream server to recover client information with enhanced accuracy.

Abstract: The present disclosure describes a differential shield capacitive sensor design. The sensor design uses a differential measurement to measure capacitance and a pair of traces are used to differentially reject the response of the sensor traces and balance any parasitic capacitances. In some embodiments, the sensor design includes a differential sensor design on a bottom side of a flex circuit to differentially balance the environment and reject noise coupling to the sensor. The top side of the flex circuit can include a single ended design for proper environment sensing. The spatial arrangement and size of the sensors may vary depending on the application.

Abstract: Improvements over existing data collection interfaces disclosed herein include, among other things, additional logic blocks (and associated timers, state machines, and registers) to off-load data collection and data processing prior to waking a microprocessor from a sleep mode. For example, an improved data collection interface collects a predetermined number of sensor values from a sensor while maintaining active a single communication session with the sensor over a pin of the interface. The microprocessor remains in the sleep mode for an entire duration of the single communication session. The data collection interface can reduce the likelihood of false starts of the microprocessor by using the logic blocks to verify that data meet preconditions prior to interrupting the microprocessor. The data collection interface can reduce the overall power consumption of a chip in which the microprocessor is integrated by a factor of at least about 2× (i.e., 50% reduction in power consumption).

Abstract: An exemplary energy harvester includes a piezoelectric diaphragm, an eccentric mass that rotates in response to external motion, and a piezoelectric stress inducer coupled with the eccentric mass and the piezoelectric diaphragm. The piezoelectric stress inducer deforms the piezoelectric diaphragm in response to rotational motion of the eccentric mass, causing the piezoelectric diaphragm to generate electrical energy.

Abstract: Differential clock phase imbalance can produce undesirable spurious content at a digital to analog converter output, or interleaving spurs on an analog-to-digital converter output spectrum, or more generally, in interleaving circuit architectures that depend on rising and falling edges of a differential input clock for triggering digital-to-analog conversion or analog-to-digital conversion. A differential phase adjustment approach measures for the phase imbalance and corrects the differential clock input signals used for generating clock signals which drive the digital-to-analog converter or the analog-to-digital converter. The approach can reduce or eliminate this phase imbalance, thereby reducing detrimental effects due to phase imbalance or differential clock skew.

Abstract: Remote evaluation, e.g., web-based evaluation, lowers the evaluation barrier by allowing an engineer to gain experience with an integrated circuit (IC) using a client (e.g. a web browser) on a remote computer (e.g., a machine remote from the IC being evaluated but local to the engineer) to activate a test set-up that is maintained at a location that is far away from the engineer.

Abstract: Aspects of this disclosure relate to a receiver for digital predistortion (DPD). The receiver includes an analog-to-digital converter (ADC) having a sampling rate that is lower than a signal bandwidth of an output of a circuit having an input that is predistorted by DPD. DPD can be updated based on feedback from the receiver. According to certain embodiments, the receiver can be a narrowband receiver configured to observe sub-bands of the signal bandwidth. In some other embodiments, the receiver can include a sub-Nyquist ADC.

Abstract: A current detection module capable of differentiating and quantifying contribution to a current signal generated by a sensor in response to stimulation by a certain target source from contributions from sources other than the target source (ambient sources) is disclosed. As long as the contribution from the target source comprises a pulsed signal, the module may synchronize itself to the pulse(s) so that there is a predetermined phase relationship between the pulse(s) and functions carried out by various stages of the module. The module may be re-used to also detect and quantify contributions from ambient sources by presenting these contributions to the module as pulses that trigger synchronization of the module. To that end, a detection system disclosed herein is based on the use of such current detection module and allows mode switching where, depending on the selected mode of operation, the module is configured to perform different measurements.

Abstract: An integrated device package is disclosed. The package includes a substrate comprising a cavity through a top surface of the substrate. A first integrated device die is positioned in the cavity. The first integrated device die includes one or more active components. A second integrated device die is attached to the top surface of the substrate and positioned over the cavity. The second integrated device die covers the cavity. Encapsulant can cover the second integrate device die.

Abstract: Provided herein are apparatus and methods for single phase spot circuits. In certain implementations, a single phase spot circuit propagates a spot from input to output in response to a clock edge of a single phase clock signal. The single phase spot circuit holds the spot for about one clock cycle, thereby providing higher maximum operating frequency relative to multiphase spot circuits that hold a spot for about half of a clock cycle. Two or more single phase spot circuits can be electrically connected in a ring to operate as a spot divider. The single phase spot circuits can be used to advance a spot, represented using either a one or a zero, from one spot circuit to the next in response to a clock edge. In certain implementations, as the spot advances, a single phase spot circuit clears the spot from its input via a feedback element.

Abstract: Improved mechanisms for applying noise-shaped segmentation techniques in a multi-bit DAC are disclosed. Noise-shaped segmentation refers to constructing two or more noise-shaped signals whose sum equals the original digital input signal by splitting each word of the input signal into two or more sub-words and converting each sub-word by a respective sub-word DAC group. Disclosed mechanisms include determining a range of amplitudes of a portion of the input signal over a certain time period, and, when converting digital words of that portion to analog values, limiting the number of sub-word DAC groups which are used for the conversion only to a number that is necessary for generating an analog output corresponding to the portion being evaluated, which number is determined based on the tracked amplitudes and could be smaller than the total number of sub-word DAC groups. Placing unused sub-word DAC groups into a power saving mode reduces power consumption.

Abstract: Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.