Abstract: A system, device, and method for binding metadata, such as information derived from the output of a biometric sensor, to hardware intrinsic properties by obtaining authentication-related metadata and combining it with information pertaining to a root of trust, such as a physical unclonable function. The metadata may be derived from a sensor such as a biometric sensor, the root of trust may be a physical unclonable function, the combination of the metadata and root of trust information may employ a hash function, and output from such a hash process may he used as an input to the root of trust. The combined information can he used in interactive or non-interactive authentication.

Abstract: Aspects of the embodiments are directed to passive depth determination. Initially, a high power depth map of a scene can be created. An object in the scene can be identified, such as a rigid body or other object or portion of an object. A series of lower power or RGB images can be captured. The object can be located in one or more of the lower power or RGB images. A change in the position of an object, represented by a set of pixels, can be determined. From the change in position of the object, a new depth of the object can be extrapolated. The extrapolated depth of the object can be used to update the high power depth map.

Abstract: A capped micromachined device has a movable micromachined structure in a first hermetic chamber and one or more interconnections in a second hermetic chamber that is hermetically isolated from the first hermetic chamber, and a barrier layer on its cap where the cap faces the first hermetic chamber, such that the first hermetic chamber is isolated from outgassing from the cap.

Abstract: An apparatus comprises a digital to analog converter (DAC) circuit configured to receive a time-varying a digital input signal and convert the digital input signal to an analog output signal, an output amplifier circuit operatively coupled to the output of the DAC circuit, a peak detector circuit operatively coupled to the input the DAC and configured to produce a signal envelope of the digital input signal, and logic circuitry. The logic circuitry is operatively coupled to the peak detector circuit and is configured to detect when the signal envelope satisfies a specified threshold value; and to adjust a drive capability of an output amplifier circuit of the DAC circuit according to the signal envelope.

Abstract: Embodiments of the present invention may provide a system with a first and second circuit system separated by an electrical isolation barrier but provided in communication by at least one isolator device that bridges the isolation barrier. The first circuit system may include a communication system to transmit data across a common isolator device as a series of pulses, and the second circuit system may receive the series of pulses corresponding to the data. The second circuit system may include a detector coupled to the common isolator device to detect the received pulses, a oneshot to frame the received pulse(s), and a controller to reconstruct the data based on accumulated framed pulse(s). Therefore, noise induced spurious pulses outside the oneshot intervals may be ignored by the second circuit system providing improved noise immunity.

Abstract: For continuous-time multi-stage noise shaping analog-to-digital converters (CT MASH ADCs), quantization noise cancellation often requires accurate estimation of transfer functions, e.g., a noise transfer function of the front end modulator and a signal transfer function of the back end modulator. To provide quantization noise cancellation, digital quantization noise cancellation filters adaptively tracks transfer function variations due to integrator gain errors, flash-to-DAC timing errors, as well as the inter-stage gain and timing errors. Tracking the transfer functions is performed through the direct cross-correlation between the injected maximum length linear feedback shift registers (LFSR) sequence and modulator outputs and then corrects these non-ideal effects by accurately modeling the transfer functions with programmable finite impulse response (PFIR) filters.

Abstract: Aspects of the embodiments are directed to compact and non-contact systems, methods, and devices for optical detection of target chemicals on/in samples are disclosed. Light of at least two different wavelengths, or different bands of wavelengths, interacts with a target chemical, and at least some of the light that has interacted with the target chemical is incident on at least two photodetectors. Each of the photodetectors is configured to detect light of a different wavelength, or a different band of wavelengths, that has interacted with the target chemical. A processing logic is configured to compute a ratio between a parameter indicative of the intensity of light detected by one photodetector and a parameter indicative of the intensity of light detected by the other photodetector, and to determine the presence and/or the amount of the target chemical based on the computed ratio.

Abstract: Techniques for optical detection of target chemicals on/in samples are disclosed. Light of at least two different wavelengths, or different bands of wavelengths, interacts with a target chemical, and at least some of the light that has interacted with the target chemical is incident on at least two photodetectors. Each of the photodetectors is configured to detect light of a different wavelength, or a different band of wavelengths, that has interacted with the target chemical. A processing logic is configured to compute a ratio between a parameter indicative of the intensity of light detected by one photodetector and a parameter indicative of the intensity of light detected by the other photodetector, and to determine the presence and/or the amount of the target chemical based on the computed ratio. In this manner, a simple, compact, and non-contact optical measurement assembly for assessing chemical content using differential spectral measurements may be provided.

Abstract: Methods are described for constructing a mechanical resonating structure by applying an active layer on a surface of a compensating structure. The compensating structure comprises one or more materials having an adaptive resistance to deform that reduces a variance in a resonating frequency of the mechanical resonating structure, wherein at least the active layer and the compensating structure form a mechanical resonating structure having a plurality of layers of materials A thickness of each of the plurality of layers of materials results in a plurality of thickness ratios therebetween.

Abstract: An integrated constant time delay circuit utilized in continuous-time (CT) analog-to-digital converters (ADCs) can be implemented with an RC lattice structure to provide, e.g., a passive all-pass lattice filter. Additional poles created by decoupling capacitors can be used to provide a low-pass filtering effect in some embodiments. A Resistor-Capacitor “RC” lattice structure can be an alternative to a constant-resistance Inductor-Capacitor “LC” lattice implementation. ADC architectures benefit from the RC implementation, due to its ease of impedance scaling and smaller area.

Abstract: A method of operating a radio frequency transceiver may include generating, by a transmit circuit of the transceiver, in-phase (I) and quadrature (Q) analog signals based on a digital calibration signal; mixing, by the transmit circuit, the I and Q analog signals with local oscillator (LO) and phase shifted LO signals to generate upconverted I and Q signals, the LO signal having a first frequency, and combining the upconverted I and Q signals to generate a combined signal; and converting, by a receive circuit of the transceiver, a signal based on the combined signal to a received digital signal using a sampling rate at a second frequency, the second frequency being less than the first frequency, wherein the converting downconverts frequency content in the combined signal.

Abstract: Various embodiments produce a semiconductor device, such a MEMS device, having metallized structures formed by replacing a semiconductor structure with a metal structure. Some embodiments expose a semiconductor structure to one or more a reacting gasses, such as gasses including tungsten or molybdenum.

Abstract: A datapath circuit may include a digital multiply and accumulate circuit (MAC) and a digital hardware calculator for parallel computation. The digital hardware calculator and the MAC may be coupled to an input memory element for receipt of input operands. The MAC may include a digital multiplier structure with partial product generators coupled to an adder to multiply a first and second input operands and generate a multiplication result. The digital hardware calculator may include a first look-up table coupled between a calculator input and a calculator output register. The first look-up table may include table entry values mapped to corresponding math function results in accordance with a first predetermined mathematical function. The digital hardware calculator may be configured to calculate, based on the first look-up table, a computationally hard mathematical function such as a logarithm function, an exponential function, a division function and a square root function.

Abstract: A system has a baseband gain stage to receive incoming in-phase and quadrature voltage signals and output in-phase and quadrature current signals, a mixer core arranged to receive the in-phase and quadrature current signals and output radio frequency signals, and a variable gain amplifier to receive the radio frequency signals and produce a broadband radio signal.

Abstract: Provided herein are apparatus and methods for transconductance amplifiers, such as split cascode low-noise transconductance amplifiers (LNTAs). In an embodiment, an LNTA includes split current paths each coupled to a different mixer by way of a different alternating current (AC) coupling capacitor. The split current paths of the LNTA can be enabled during different modes of operation, such as when the input to the LNTA is within different frequency bands.

Abstract: A sensor module can include a battery housing comprising a battery cavity sized and shaped to receive a battery. The battery cavity can be defined at least in part by a wall to be disposed about at least a portion of a periphery of the battery. A package housing can be disposed on the wall of the battery housing, the package housing smaller than the battery housing. An integrated device package can be disposed in or coupled with the package cavity. The integrated device package can include one or more integrated device dies. An interfacing feature can be coupled with the battery housing and extending transverse to the wall. The interfacing feature can be configured to transduce a biological signature into a signal to be processed by the integrated device package. An interconnect assembly can electrically connect the interfacing feature to the integrated device package.

Abstract: A scaled and configurable pre-processor array can allow minimal digital activity while maintaining hard real time performance. The pre-processor array is specially designed to process real-time sensor data. The interconnected processing units of the array can drastically reduce context swaps, memory accesses, main processor input/output accesses, and real time event management overhead.

Abstract: An integrated circuit may include a substrate and a dielectric layer formed over the substrate. A plurality of p-type thermoelectric elements and a plurality of n-type thermoelectric elements may be disposed within the dielectric layer. The p-type thermoelectric elements and the n-type thermoelectric elements may be connected in series while alternating between the p-type and the n-type thermoelectric elements.

Abstract: Embodiments of the present invention are directed to a battery stack with a leapfrogging communication network. Each cell stage may include a controller, a transmitter, and a pair of receivers. The cell stage in the battery stack may be coupled to the closest two preceding battery cell stages in the stack. In this manner, each cell stage may be able to determine if a fault is present in an immediately preceding cell stage in the stack by monitoring the first preceding cell stage and the second preceding cell stage. If discharge/charge commands transmitted by the second preceding cell stage are not reaching the battery cell stage at issue, the controller may determine that there is a fault in the first preceding cell stage and discharge/charge the cell stage based on the commands transmitted by the second preceding cell stage.

Abstract: A clock and data recovery (CDR) system may use one or more clock signals in sync with recovered data rate. By accumulating a dithering tuning counter value at a data oversampling rate, a plurality of single bit signals at multiples of the recovered data rate and in sync with the recovered data rate can be accurately generated while utilizing the full range of the accumulator. This plurality of clock signals can be used in various modules in the CDR system and other modules in a transceiver system incorporating the CDR system.