Patents Assigned to Analog Devices
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Patent number: 9735797Abstract: For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine timing mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology utilizes cross-correlation of each DAC unit elements (UEs) output to the entire modulator output to measure its timing mismatch error respectively. Specifically, the timing mismatch error is estimated using a ratio based on a peak value and a value for the next tap in the cross-correlation function. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.Type: GrantFiled: November 23, 2016Date of Patent: August 15, 2017Assignee: ANALOG DEVICES, INC.Inventors: Jialin Zhao, Qingdong Meng, Yunzhi Dong, Jose Barreiro Silva
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Patent number: 9735738Abstract: In high speed communication applications, e.g., optical communication, a variable gain amplifier is used for input signal amplitude normalization or for linear equalization. Traditionally a bipolar Gilbert multiplier circuit is used. When moving towards a low-power application, a modified circuit topology is implemented to reduce the minimum supply voltage requirement of the variable gain amplifier while ensuring that bias current levels remain substantially the same and achieving the same current switching capacity as the traditional circuit. As a result, the power consumption of the circuit can be greatly reduced. The modified circuit topology combines the amplifier and gain transistors and achieves gain programming using a voltage difference of two pairs of floating voltage sources.Type: GrantFiled: January 6, 2016Date of Patent: August 15, 2017Assignee: ANALOG DEVICES GLOBALInventor: Devrim Aksin
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Patent number: 9735787Abstract: An agile frequency synthesizer with dynamic phase and pulse-width control is disclosed. In one aspect, the frequency synthesizer includes a count circuit configured to modify a stored count value by an adjustment value. The frequency synthesizer also includes an output clock generator configured to generate an output clock signal having rising and falling edges that are based at least in part on the stored count value satisfying a count threshold. The count circuit is further configured to alter at least one of the period or phase of the output clock signal based at least in part on modifying an adjustment rate of the count circuit.Type: GrantFiled: June 17, 2015Date of Patent: August 15, 2017Assignee: Analog Devices, Inc.Inventors: Oscar Sebastian Burbano, Matthew D. McShea, Peter Derounian, Reuben P. Nelson, Ziwei Zheng, Brad P. Jeffries
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Publication number: 20170230916Abstract: A wireless network power distribution and data aggregation system, along with associated applications, is disclosed. An exemplary system for wirelessly transmitting power to radio frequency (RF) energy harvesting sensor nodes of a wireless network system includes a pyramid-structured antenna array for wirelessly powering RF energy harvesting sensor nodes within a defined coverage area of the wireless network system. The pyramid-structured antenna array generates a radiation pattern from an orthogonal spread-spectrum signal that minimizes destructive interference between adjacent antennas of the antenna array. Each antenna of the antenna array can wirelessly transmit power to a respective sector of the defined coverage are.Type: ApplicationFiled: October 1, 2015Publication date: August 10, 2017Applicant: Analog Devices, Inc.Inventors: YOSEF STEIN, Wei AN, Roman TROGAN
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Publication number: 20170225942Abstract: Microelectromechanical systems (MEMS) switches are described. The MEMS switches can be actively opened and closed. The switch can include a beam coupled to an anchor on a substrate by one or more hinges. The beam, the hinges and the anchor may be made of the same material in some configurations. The switch can include electrodes, disposed on a surface of the substrate, for electrically controlling the orientation of the beam. The hinges may be thinner than the beam, resulting in the hinges being more flexible than the beam. In some configurations, the hinges are located within an opening in the beam. The hinges may extend in the same direction of the axis of rotation of the beam and/or in a direction perpendicular to the axis of rotation of the beam.Type: ApplicationFiled: February 2, 2017Publication date: August 10, 2017Applicant: Analog Devices GlobalInventors: Padraig Fitzgerald, Michael James Twohig
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Patent number: 9729140Abstract: Apparatus and methods to increase the range of a signal processing circuit. A system uses floating bias circuits coupled to a signal processing circuit to increase the range of power supplies that can be used with the signal processing circuit, while maintaining the components of the signal processing circuit within a breakdown voltage threshold. As the voltage level of the data signal varies, the voltage level of the floating bias circuits varies as well.Type: GrantFiled: March 5, 2014Date of Patent: August 8, 2017Assignee: Analog Devices, Inc.Inventors: JoAnn Close, Jennifer W. Pierdomenico, David Hall Whitney
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Patent number: 9728510Abstract: An integrated device package is disclosed. The package can include a package substrate comprising a composite die pad having an upper surface and a lower surface spaced from the upper surface along a vertical direction. The composite die pad can include an insulator die pad and a metal die pad. The insulator die pad and the metal die pad can be disposed adjacent one another along the vertical direction. The substrate can include a plurality of leads disposed about at least a portion of a perimeter of the composite die pad. An integrated device die can be mounted on the upper surface of the composite die pad.Type: GrantFiled: November 25, 2015Date of Patent: August 8, 2017Assignee: ANALOG DEVICES, INC.Inventors: Xiaojie Xue, Dipak Sengupta
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Patent number: 9729109Abstract: Aspects of this disclosure relate to an amplifier with at least two chopper amplifier channels in parallel between a shared input and differential nodes. The amplifier can multiplex outputs of the chopper amplifier channels to provide the output of one or more chopper amplifier channels to the differential nodes at a time. In certain embodiments, this can mask dynamic settling errors.Type: GrantFiled: August 11, 2015Date of Patent: August 8, 2017Assignee: Analog Devices, Inc.Inventors: Marvin L. Shu, Arthur J. Kalb
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Patent number: 9726702Abstract: A digital sine wave may be converted to an analog signal at a digital to analog converter (DAC). The converted analog signal may be supplied to a device and an analog return signal from the device may be passed through a relaxed anti-aliasing filter and converted to digital code words at an analog to digital converter (ADC). An impedance may be calculated from the results of a Fourier analysis of the digital code words. The ADC and DAC clock frequencies may be asynchronous, independently variable, and have a greatest common factor of 1. The clock frequencies of the ADC and/or DAC may be adjusted to change a location of images in the ADC spectrum. By using these different, adjustable clock frequencies for the ADC and the DAC, an analog signal may have increased aliasing without introducing signal errors at a frequency of interest.Type: GrantFiled: September 25, 2012Date of Patent: August 8, 2017Assignee: Analog Devices, Inc.Inventors: Dermot O'Keeffe, Donal Bourke, David Harty, Tudor Vinereanu, Colin Lyden
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Publication number: 20170220502Abstract: Disclosed herein are systems and techniques for general purpose input/output (GPIO)-to-GPIO communication in a multi-node, daisy-chained network. In some embodiments, a transceiver may support GPIO between multiple nodes, without host intervention after initial programming. In some such embodiments, the host may be required only for initial setup of the virtual ports. In some embodiments, GPIO pins can be inputs (which may change virtual ports) or outputs (which may reflect virtual ports). In some embodiments, multiple virtual ports may be mapped to one GPIO output pin (with the values OR'ed together, for example). In some embodiments, multiple GPIO input pins may be mapped to one virtual port. For example, multiple GPIO input pin values may be OR'ed together, even if they come from multiple nodes.Type: ApplicationFiled: January 20, 2017Publication date: August 3, 2017Applicant: Analog Devices, Inc.Inventors: Martin KESSLER, William HOOPER, Lewis F. LAHR
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Publication number: 20170220522Abstract: A method for generating a Fast Fourier Transform (FFT) is disclosed. The method includes providing an input signal to two or more fixed-point FFT algorithms that apply different scaling to reduce growth of their output, resulting in each of the FFT algorithms yielding an array of FFT output values characterized by a different gain. The method further includes determining, on a per-FFT output value basis, whether an output value of an FFT algorithm with a relatively high gain was clipped due to saturation. If not, then the output value of that FFT algorithm is included in the final FFT. Otherwise, an output value of an FFT algorithm with a lower gain is included in the final FFT. Reconstructing the final FFT by such combination of values from different FFTs allows benefiting from the advantages of both higher- and lower-gain FFTs while avoiding or minimizing their disadvantages.Type: ApplicationFiled: January 28, 2016Publication date: August 3, 2017Applicant: ANALOG DEVICES, INC.Inventor: BORIS LERNER
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Publication number: 20170222790Abstract: Disclosed herein are systems and methods for clock sustain in a two-wire communication systems and applications thereof. In some embodiments, in a clock sustain state, slave nodes with processors and digital to analog converters (DACs) may be powered down efficiently in the event of lost bus communication. For example, when the bus loses communication and a reliable clock cannot be recovered by the slave node, the slave node may enter the sustain state and, if enabled, signals this event to a general purpose input/output (GPIO) pin. In the clock sustain state, the slave node phase lock loop (PLL) may continue to run for a predetermined number of SYNC periods, while attenuating the inter-integrated circuit transmit (I2S DTXn) data from its current value to 0. After the predetermined number of SYNC periods, the slave node may reset and reenter a power-up state.Type: ApplicationFiled: January 20, 2017Publication date: August 3, 2017Applicant: Analog Devices, Inc.Inventors: WILLIAM HOOPER, Lewis F. LAHR
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Publication number: 20170222829Abstract: Disclosed herein are systems and techniques for slave-to-slave communication in a multi-node, daisy-chained network. Slave nodes may provide or receive upstream or downstream data directly to/from other slave nodes, without the need for data slots first to route through the master node.Type: ApplicationFiled: January 20, 2017Publication date: August 3, 2017Applicant: Analog Devices, Inc.Inventors: Martin Kessler, William Hooper, Lewis F. Lahr
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Publication number: 20170214367Abstract: Disclosed herein are envelope detectors with high input impedance, and related methods and systems. In some embodiments, an envelope detector with high input impedance may include: a swinging stage including first, second, and third transistors, wherein the third transistor and an active transistor are arranged as a differential pair, the first transistor is the active transistor when an input to the envelope detector is positive, and the second transistor is the active transistor when the input to the envelope detector is negative; and a feedback circuit, coupled to the swinging stage, to provide an output signal representative of a rectification of the input.Type: ApplicationFiled: January 26, 2016Publication date: July 27, 2017Applicant: ANALOG DEVICES, INC.Inventor: Sukhijinder S. Deo
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Publication number: 20170212614Abstract: Metal cases are increasingly in popularity in electronics such as smart phones, tablets, portable speakers, etc., since the look and feel of a metal case are appealing to the consumer. Unfortunately, the metal case is generally incompatible traditional capacitive sensing electrodes, which are usually provided on a printed circuit board or flex circuit and are only usable with plastic cases. To provide capacitive sensing with a metal case, a specialized material stack can be fabricated to embed capacitive sensors with the metal case. Specifically, a conductor (a conductive pad, or conductive layer) can be deposited over an oxide layer formed on the metal case (e.g., through anodization). An outer coating can be provided to protect the conductor. A further conductor and dielectric can be included in the material stack to form a double layer capacitive sensor.Type: ApplicationFiled: January 22, 2016Publication date: July 27, 2017Applicant: ANALOG DEVICES, INC.Inventor: ISAAC CHASE NOVET
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Publication number: 20170214372Abstract: Various embodiments of switched amplifiers are disclosed herein. In some embodiments, a switched amplifier may include a first amplifier; a second amplifier; an input matching network common to both the first and second amplifiers; and at least one switch to couple an input of the switched amplifier, via the input matching network, to one of the first amplifier or the second amplifier. In some embodiments, a switched amplifier may include a first amplifier; a second amplifier; an input matching network common to both the first and second amplifiers or an output matching network common to both the first and second amplifiers; and a bias generation circuit to selectively (1) provide a first bias current to the first amplifier or (2) provide a second bias current to the second amplifier, wherein the second bias current is less than the first bias current.Type: ApplicationFiled: January 25, 2016Publication date: July 27, 2017Applicant: ANALOG DEVICES, INC.Inventors: Sriram Muralidharan, Christopher E. Hay
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Patent number: 9716193Abstract: An integrated optical sensor module includes an optical sensor die having an optical sensing area on its first surface, and an application-specific integrated circuit (ASIC) die arranged over the first surface of the optical sensor die. A hole in the ASIC die is at least partially aligned with the optical sensing area such that at least some of the light passing through the hole may contact the optical sensing area. The hole through the ASIC die can be configured to receive an optical fiber, lens structure, or other optical element therein.Type: GrantFiled: May 2, 2012Date of Patent: July 25, 2017Assignee: ANALOG DEVICES, INC.Inventor: Dipak Sengupta
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Patent number: 9716509Abstract: For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine switching mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology forces each DAC unit elements (UEs) to switch a certain amount times and then use the modulator itself to measure the errors caused by those switching activities respectively. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.Type: GrantFiled: November 23, 2016Date of Patent: July 25, 2017Assignee: ANALOG DEVICES, INC.Inventor: Jialin Zhao
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Patent number: 9716470Abstract: Provided herein are apparatus and methods for compensating an operational amplifier (op-amp). In certain configurations, a compensation network is electrically connected between an output node of the op-amp and an input differential pair coupled source/emitter tail-current node. The compensation network can include a capacitor having a relatively low value of capacitance. In this manner, op-amp bandwidth is improved while power consumption is reduced to meet a “green” standard.Type: GrantFiled: May 21, 2015Date of Patent: July 25, 2017Assignee: Analog Devices, Inc.Inventor: Abhishek Bandyopadhyay
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Patent number: 9716513Abstract: During operation of a SAR ADC, it is possible to exceed the voltage limits of a comparator by presenting voltages at the comparator input that exceed a limited range of acceptable input voltages. The present disclosure provides a system and method such as for delivering a common mode compensation voltage such that voltages present at the comparator inputs can be within the limited range of acceptable input voltages.Type: GrantFiled: August 3, 2016Date of Patent: July 25, 2017Assignee: Analog Devices, Inc.Inventors: Baozhen Chen, Mark D. Maddox, Zhichao Tan
