Patents Assigned to Analog Devices
  • Activity Detection in MEMS Accelerometers
    Publication number: 20120279304
    Abstract: A method of detecting activity with a MEMS accelerometer stores a value of acceleration, then measures acceleration at a later time, calculates a change in acceleration using the measured acceleration and the stored acceleration, and compares the change in acceleration to an activity threshold to detect activity. A method of detecting inactivity uses a similar technique along with a timer. The method of detecting inactivity with a MEMS accelerometer stores an acceleration value, then measures acceleration at a later time, calculates a change in acceleration using the measured acceleration and the stored acceleration, and compares the change in acceleration to an inactivity threshold. If the change in acceleration is less than the inactivity threshold and, if a predetermined period of time has elapsed, then inactivity is detected.
    Type: Application
    Filed: June 6, 2012
    Publication date: November 8, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: James M. Lee, John Memishian
  • SYSTEM AND METHOD FOR LEVEL-SHIFTING VOLTAGE SIGNALS USING A DYNAMIC LEVEL-SHIFTING ARCHITECTURE
    Publication number: 20120280739
    Abstract: A system and method to level-shift multiple signals from a first voltage domain to a second voltage domain with minimized silicon area. A level-shifting system may be organized by implementing a static level-shifter coupled to a plurality of dynamic level-shifters. The static level-shifter may provide a voltage control signal for each of the dynamic level-shifters. Each of the dynamic level-shifters may level-shift an individual input signal from a first voltage domain to a second voltage domain.
    Type: Application
    Filed: May 2, 2011
    Publication date: November 8, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: David Foley
  • Reactive networks to reduce acoustic noise and ensure maximum efficiencies in driving piezoelectric elements in haptic applications
    Patent number: 8305200
    Abstract: A device and method are provided to drive piezoelectric elements in haptic applications. In one embodiment, a pattern generator provides user programmable PWM waveforms to a driver. The load of the driver is an inductor in series with the piezoelectric element. The filtration of the inductor in series with the capacitance of the piezoelectric element suppresses the high-frequency components of the PWM pulse train, and recovers a value commensurate with the duty cycle of the PWM pulse train. The resulting waveform across the piezoelectric element is converted to physical motion, thereby creating a haptic effect on a user interface. Advantageously, there is reduced power loss, reduced switching induced noise, and a more haptic rich environment.
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: November 6, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Mark J. Murphy, Alan Gillespie, Eoin Edward English, Donal Geraghty, Dennis A. Dempsey
  • Substrate bonding with bonding material having rare earth metal
    Patent number: 8304861
    Abstract: A microchip has a bonding material that bonds a first substrate to a second substrate. The bonding material has, among other things, a rare earth metal and other material.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: November 6, 2012
    Assignee: Analog Devices, Inc.
    Inventors: John R. Martin, Christine H. Tsau, Timothy J. Frey
  • ARCHITECTURE AND METHOD TO DETERMINE LEAKAGE IMPEDANCE AND LEAKAGE VOLTAGE NODE
    Publication number: 20120274336
    Abstract: A circuit, system, machine-readable storage medium and method for detecting the presence of a leakage path in a multi-cell voltage source is described. The system includes a detection circuit, the detection circuit having a first, second and third amplifiers, a first input of the first amplifier connected to a first terminal of the voltage source and the first input of the second amplifier connected to a second terminal of the voltage source, a second input of each of the first and second amplifiers connected to a reference capacitor, and an output of each of the first, second and third amplifiers connected to a respective first, second and third outputs of the detection circuit; and a processor having inputs connected to the first and second outputs of the detection circuit.
    Type: Application
    Filed: July 13, 2012
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Lawrence C. STREIT
  • METHOD FOR IMPROVING THE PERFORMANCE OF THE SUMMING-NODE SAMPLING CALIBRATION ALGORITHM
    Publication number: 20120274492
    Abstract: An integrated circuit allows for the isolation of the input of an analog-to-digital converter (ADC) from a summing-node (SNS) algorithm. The integrated circuit contains a gating device that is controlled by bits of a flash analog-to-digital converter (ADC) to gate input samples to sub-ranges that are used by the SNS algorithm. A single sub-range is chosen to be used by the SNS algorithm.
    Type: Application
    Filed: April 26, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Ahmed Mohamed Abdelatty ALI, Huseyin DINC, Paritosh BHORASKAR
  • NOISE CANCELLATION SYSTEM AND METHOD FOR AMPLIFIERS
    Publication number: 20120274363
    Abstract: An architecture of an integrated circuit allows for the canceling of noise sampled on a capacitor in the integrated circuit, after an input signal has already been sampled. Thermal noise correlated with an arbitrary input signal may be canceled after selectively controlling a plurality of switching devices during a sequence of clock phases. An auxiliary capacitor may be used to store a voltage equal to the thermal noise and enable the cancellation of the thermal noise from the sampled signal in conjunction with a noise cancellation unit.
    Type: Application
    Filed: April 28, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Ronald A. KAPUSTA, Colin LYDEN, Haiyang ZHU
  • PRE-CHARGED CAPACITIVE DIGITAL-TO-ANALOG CONVERTER
    Publication number: 20120274488
    Abstract: Embodiments of the present disclosure may provide a charge redistribution DAC with two sets of capacitors that provides a DAC output by sharing charges between a plurality of pairs of capacitors in lieu of charging the capacitors using traditional external reference voltages. The charge redistribution DAC may comprise a plurality of pairs of first and second capacitors that each has a first side and a second side, and a group of first switches and a group of second switches. Each first or second switch selectively controls connection of the first side of a respective first or second capacitor to one of a pair of output signal lines according to a DAC input word. The charge redistribution DAC further may comprise a group of bridging switches each connected between second sides of paired first and second capacitors.
    Type: Application
    Filed: April 28, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Ronald KAPUSTA
  • PIPELINED ANALOG-TO-DIGITAL CONVERTER
    Publication number: 20120274497
    Abstract: An analog-to-digital converter includes a plurality of sequentially cascaded stages, each stage including an amplifier and four copies of a circuit block including a flash and capacitors, in which the four copies of the circuit block operate interleavingly in a respective sample mode, pre-gain mode, gain mode, and reset mode of the circuit block, the copies of the circuit block in the sample mode, pre-gain mode, and reset mode are decoupled from the amplifier, and the copy of the circuit block in the gain mode is coupled to the amplifier to produce an output for a next following stage.
    Type: Application
    Filed: April 27, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Scott BARDSLEY, Franklin MURDEN, Eric SIRAGUSA, Peter DEROUNIAN
  • RF AGC Control
    Publication number: 20120274398
    Abstract: Embodiments of the present invention may provide a signal processor with a wide gain range. The signal processor may comprise at least a discrete step gain stage and a continuous variable gain amplifier (VGA) stage. The discrete step gain stage may comprise a programmable gain amplifier (PGA) (e.g., low noise amplifiers 1 and 2 (LNA1 and LNA2)). The VGA stage may provide a continuous range to compensate the LNAs gain steps. In one embodiment, the AGC controller enables an inherent hysteresis with the AGC step change if required.
    Type: Application
    Filed: April 26, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Reza ALAVI, Saeed AGHTAR, Christoph STEINBRECHER, Arathi SUNDARESAN
  • APPARATUS AND METHOD FOR REAL TIME HARMONIC SPECTRAL ANALYZER
    Publication number: 20120278020
    Abstract: In one embodiment, a measuring device may comprise two oscillators. The first oscillator may generate a local reference signal in a frequency detector to detect a fundamental frequency of the AC. The second oscillator may generate two substantially mutually orthogonal sinusoid signals having the selected frequency. The measuring device further may comprise a first group of multipliers that mixes the two sinusoid signals with a current and a voltage data signal of the AC respectively, a group of low-pass filters for removing high frequency components from the multiplication products, a second group of multipliers for mixing the filtered multiplication products respectively, and a plurality of adders each to sum together a pair of multiplication products of the second group of multipliers.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Gabriel ANTONESEI
  • METHOD AND CIRCUIT FOR LOW POWER VOLTAGE REFERENCE AND BIAS CURRENT GENERATOR
    Publication number: 20120274306
    Abstract: A system and method are provided for a PTAT cell with no resistors which can operate at low power, has less sensitivity to process variation, occupies less silicon area, and has low noise. Further, a system and method are provided to scale up the reference voltage and current through a cascade of unit cells. Still further, a system and method are provided for PTAT component to be fine-tuned, advantageously providing less process variability and less temperature sensitivity.
    Type: Application
    Filed: July 9, 2012
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Stefan MARINCA
  • SYSTEM AND METHOD FOR DETECTING A FUNDAMENTAL FREQUENCY OF AN ELECTRIC POWER SYSTEM
    Publication number: 20120274311
    Abstract: A system and method to detect the fundamental frequency of an electric input signal using a feedback control loop including a phase error detector, a loop controller, and a digitally controlled oscillator. The frequency detector may detect the fundamental frequency of an electric input signal and produce an output signal representing the fundamental frequency of the electric input signal. The frequency detector may further include a filter that may be coupled to the frequency detector output signal in order to remove spurious tones or noise from the output signal.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Gabriel Antonesei
  • Programmable compute unit with internal register and bit FIFO for executing Viterbi code
    Patent number: 8301990
    Abstract: A programmable compute unit with an internal register with a bit FIFO for executing Viterbi code is configured to accumulate in the forward path the best-path to each state in an internal register and store the survivor trace back information bit for each state in each stage in a bit FIFO; and in the trace back, selecting the optimal best-path through the Viterbi trellis by tracing through the bit trace back information survivor bits beginning with the survivor bit of the last stage path; and generating in response to the Viterbi constrain length and a current bit FIFO address, the next bit FIFO address and decoded output bit for the next previous stage.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: October 30, 2012
    Assignee: Analog Devices, Inc.
    Inventors: James Wilson, Yosef Stein, Gregory Yukna, Lewis Lahr
  • Control techniques for motor driven systems
    Patent number: 8299744
    Abstract: Embodiments of the present invention provide a drive signal for a motor-driven mechanical system whose frequency distribution has zero (or near zero) energy at the expected resonant frequency of the mechanical system. The drive signal may be provided as a pair of steps sufficient to activate movement of the mechanical system and then park the mechanical system at a destination position. The steps are spaced in time so as to have substantially zero energy at an expected resonant frequency fR of the mechanical system. The drive signal may be filtered to broaden a zero-energy notch at the expected resonant frequency fR.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: October 30, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Colin Lyden, Javier Calpe-Maravilla, Mark Murphy, Eoin English
  • Directional coupler
    Patent number: 8299871
    Abstract: In a directional coupler having flaps on a pair transmission lines to be coupled, structural characteristics such as the distance between adjacent flaps, the length and width of a flap, the direction of projection of the flaps, and whether and to what degree the flaps on the two transmission lines overlap can be selected in order to optimize electrical characteristics of the coupler.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: October 30, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Rodrigo Carrillo-Ramirez
  • COMPARATOR WITH ADAPTIVE TIMING
    Publication number: 20120268185
    Abstract: An adaptive delay device that provides a delay to a signal based on circuit conditions such as temperature, supply voltage values and/or fabrication processes. The adaptive delay device may respond to circuit conditions by charging a capacitive device to a threshold voltage. A comparator may incorporate the adaptive delay device to provide adaptive timing for the comparator functions thereby attaining improved noise performance and/or reduce power consumption.
    Type: Application
    Filed: April 22, 2011
    Publication date: October 25, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Ronald KAPUSTA
  • APPARATUS AND METHOD FOR EQUALIZATION
    Publication number: 20120268204
    Abstract: Apparatus and methods for equalization are provided. In one embodiment, an apparatus for equalizing an input voltage includes a first capacitor and a first resistor having a first end and a second end, the first end configured to receive the input voltage. The apparatus further includes a second resistor having a first end electrically connected to the second end of the first resistor at an output node. The apparatus further includes an inverting voltage buffer for substantially inverting the input voltage to generate an inverted input voltage. The apparatus further includes a transconductance buffer for receiving the inverted input voltage and for generating a current from a first end of the first capacitor to the output node having a magnitude equal to about the magnitude of the input voltage signal divided by the impedance of the first capacitor.
    Type: Application
    Filed: April 25, 2011
    Publication date: October 25, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Michael St. Germain, Jennifer Lloyd, Kimo Tam
  • DIGITAL PRE-DISTORTION
    Publication number: 20120268191
    Abstract: A pre-distortion circuit that may introduce a pre-distortion signal in a communication channel by determining a harmonic signal of the signal to be output. One or more image correction signals of the signal to be output may be determined. The one or more image correction signals may be complex conjugate signal variations of the signal to be output. The harmonic signal, the one or more image correction signals and the signal to be output may be combined into a combined output signal. The combined output signal may be transmitted to a digital-to-analog converter. The predistortion circuit may be implemented in a FPGA, an ASIC, a digital-to-analog converter, and/or a separate IC package.
    Type: Application
    Filed: June 27, 2012
    Publication date: October 25, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Ganesh Ananthaswamy, Sudheesh A. Somanathan
  • Microphone with voltage pump
    Patent number: 8295512
    Abstract: An integrated circuit configured to provide a microphone output signal, comprising: a preamplifier coupled to receive an input signal, generated by either a first microphone member or a second microphone member, where one of the members is movable relative to the other microphone member; a voltage pump to output a pumped voltage; and a low-pass filter coupled to filter the pumped voltage from the voltage pump and to provide a bias voltage to either microphone member.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: October 23, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Michael Deruginsky, Claus Erdmann Fuerst, Mohammad Shajaan, Daifi Sassene