Patents Assigned to Analog Devices
  • Patent number: 8350626
    Abstract: An amplifier circuit can include a first supply terminal to receive a first reference voltage; a second supply terminal to receive a second reference voltage; a first pair of circuit paths extending between the first and second supply terminals and including a respective output terminal, the first pair of circuit paths including a first pair of transistors, each having a gate connected to a respective one of the input terminals and a source connected to the first supply terminal, and a second pair of transistors, each having a gate connected via a first impedance to a gate of a respective first transistor, and a source coupled to the second supply terminal.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: January 8, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Hajime Shibata
  • Patent number: 8351634
    Abstract: A side-ported MEMS microphone package defines an acoustic path from a side of the package substrate to a microphone die disposed within a chamber defined by the substrate and a lid attached to the substrate. Optionally or alternatively, a circuit board, to which the microphone package is mounted, may define an acoustic path from an edge of the circuit board to a location under the microphone package, adjacent a bottom port on the microphone package. In either case, the acoustic path may be a hollow passage through at least a portion of the substrate or the circuit board. The passage may be defined by holes, channels, notches, etc. defined in each of several layers of a laminated substrate or circuit board, or the passage may be defined by holes drilled, molded or otherwise formed in a solid or laminated substrate or circuit board.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: January 8, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Aleksey S. Khenkin
  • Publication number: 20130001054
    Abstract: An improved micro-machined relay is disclosed. The relay includes a micro-machined beam capable of carrying an electric signal and having a contact point on a closure side of the beam. The beam is electrically coupled to a first electrical transmission path and suspended above a second electrical transmission path. An insulation layer resides on a portion of the closure side of the beam and an electrical conductor is coupled to a least a portion of the insulation layer. A potential creator creates a potential between the electrical conductor and the potential creator that is capable of deflecting the beam, so that the contact point comes into contact with the second electrical transmission path. In such an embodiment, the potential creator need not account for the possible signal in the transmission path because the potential creator, which may be a voltage source, is decoupled from the transmission path.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 3, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Sumit Majumder, Kenneth Skrobis, Richard H. Morrison, Geoffrey Haigh
  • Patent number: 8343716
    Abstract: A method of forming a variable pattern across a wafer using a reticle forms a plurality of first patterns on the wafer. The first pattern is repeated across the wafer and each first pattern has a first readable element. The method also forms a plurality of second patterns on the wafer. The second patterns is repeated across the wafer and each second pattern has a second readable element. The second patterns are positioned relative to the first patterns by aligning a first second pattern relative to one portion of a corresponding first pattern and then incrementally misaligning each successive second pattern in a row or a column relative to its corresponding first pattern. Thus, each corresponding first readable element and second readable element form a corresponding variable pattern.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: January 1, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Lee J. Jacobson, Francis J. McNally, Zualfquar Mohammed, Robert Maher
  • Patent number: 8344487
    Abstract: A packaged microchip has a lead frame with a die directly contacting at least a single, contiguous portion of the lead frame. The portion of the lead frame has a top surface forming a concavity and contacting the die. The packaged microchip also has mold material substantially encapsulating part of the top surface of the portion of the lead frame.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: January 1, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Xin Zhang, Michael Judy, Kevin H. L. Chau, Nelson Kuan, Timothy Spooner, Chetan Paydenkar, Peter Farrell
  • Patent number: 8346021
    Abstract: Embodiments of the present invention are directed to an image processing system. The image processing system may comprise a content detection module having an input to receive a sequence of input pixels and configured to generate an adjustable parameter based on detected differences between adjacent pairs of input pixels, and a digital filter having an input for the sequence of input pixels and a control input coupled to an output of the content detection module. The digital filter may adjust filtering coefficients according to the parameter.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: January 1, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Lin Li, Tianjiang Li, Wei Che, Huide Li
  • Patent number: 8345394
    Abstract: An ESD protection circuit for a switching power converter which includes a high-side switching element connected between a supply voltage and the switching node, and a low-side switching element connected between the switching node and a common node. A current conduction path couples an ESD event that occurs on the switching node to an ESD sense node, and an ESD sensing circuit coupled to the sense node generates a trigger signal when an ESD event is sensed. A first logic gate keeps the high-side switching element off when the trigger signal indicates the sensing of an ESD event, and a second logic gate causes the low-side switching element to turn on when an ESD event is sensed such that the low-side switching element provides a conductive discharge path between the switching node and common node.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: January 1, 2013
    Assignee: Analog Devices, Inc.
    Inventors: James W. Zhao, Reed W. Adams, Kenji Tomiyoshi, Bin Shao, Atsushi Matamura, Yogesh Sharma, Todd Thomas
  • Patent number: 8344924
    Abstract: An approach to converting an analog value based on a partition of an input range produces probabilities that the input is found within each of the regions based, for example, on a noisy version of the input. In some examples, iterative and/or pipelined application of comparison circuitry is used to accumulate a set of analog representations of the output probabilities. The circuitry can be adapted or configured according to the characteristics of the degradation (e.g., according to the variance of an additive noise) and/or prior information about the distribution of the clean input (e.g., a distribution over a discrete set of exemplar values, uniformly distributed etc.).
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: January 1, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Alexander Alexeyev, William Bradley, Theophane Weber
  • Patent number: 8343369
    Abstract: A method of producing a MEMS device removes the bottom side of a device wafer after its movable structure is formed. To that end, the method provides the device wafer, which has an initial bottom side. Next, the method forms the movable structure on the device wafer, and then removes substantially the entire initial bottom side of the device wafer. Removal of the entire initial bottom side effectively forms a final bottom side.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: January 1, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Manolo G. Mena, Elmer S. Lacsamana, William A. Webster, Lawrence E. Felton
  • Patent number: 8339118
    Abstract: In one aspect, a method of reducing power consumption in a circuit by adaptive bias current generation of a bias current configured to bias, at least in part, at least one amplifier of the circuit is provided. The method comprises establishing the bias current based, at least in part, on a reference frequency of a reference clock providing a clock signal to at least one component of the circuit, and changing the bias current in response to a change in the reference frequency of the at least one reference clock, the bias current being change non-linearly with respect to the change in the reference frequency of the at least one reference clock. In another aspect, the method comprises establishing the bias current based, at least in part, on a capacitance of a reference capacitor, and changing the bias current in response to a change in the capacitance of the reference capacitor such that the bias current is changed non-linearly with respect to changes in the capacitance of the reference capacitor.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: December 25, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Ronald A. Kapusta, Jr.
  • Patent number: 8339161
    Abstract: A voltage buffer may include a first signal path extending from an input terminal to an output terminal in which the first signal path further may include a buffer transistor that may have a control terminal, and a first and second current terminals responsive to the control terminal. In the first signal path, the control terminal may be connected to the input terminal, the first current terminal may be connected to the output terminal, and the first signal path may supply a load current to a load device responsive to an input signal at the input terminal. The voltage buffer further may include a second signal path extending from the input terminal to a current source node. The second signal path may include a replica load device. The voltage buffer further may include a current source supplying substantially constant current and coupled to the current source node.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: December 25, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Ahmed Mohamed Abdelatty Ali
  • Patent number: 8339303
    Abstract: An integrated circuit allows for the isolation of the input of an analog-to-digital converter (ADC) from a summing-node (SNS) algorithm. The integrated circuit contains a gating device that is controlled by bits of a flash analog-to-digital converter (ADC) to gate input samples to sub-ranges that are used by the SNS algorithm. A single sub-range is chosen to be used by the SNS algorithm.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: December 25, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Ahmed Mohamed Abdelatty Ali, Huseyin Dinc, Paritosh Bhoraskar
  • Publication number: 20120319241
    Abstract: The resistor segments may be placed in a spatial region of an integrated circuit. Junctions formed between the resistor segments and conductors may be placed at locations such that each junction has a paired counterpart of the same type that is spaced to form respective same junction type centroids (i.e., geometric centers). The different type centroids may be substantially coincident, meaning that the centroids substantially overlap. In this manner, junction voltages (or offset voltages) generated by one pair of junctions may cancel out the junction voltages generated by another pair of junctions in the resistor circuit.
    Type: Application
    Filed: June 14, 2012
    Publication date: December 20, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Yijing LIN, Damien MCCARTNEY
  • Publication number: 20120320483
    Abstract: Apparatus and methods for electronic circuit protection are disclosed. In one embodiment, an actively-controlled protection circuit includes a detector, a timer, a current source and a latch. The detector is configured to generate a detection signal when the detector determines that a transient signal satisfies a first signaling condition. The timer is configured to receive the detection signal, and to generate a current control signal. The current control signal is provided to a current source, which produces a trigger current at least partly in response to the control signal. The trigger current is provided to a node of the latch, thereby enhancing the conductivity modulation of the latch and selectively controlling the activation voltage of the latch.
    Type: Application
    Filed: August 29, 2012
    Publication date: December 20, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Javier A. Salcedo, Colin McHugh
  • Publication number: 20120319879
    Abstract: A process allows for the modification of the least-means-square (LMS) algorithm to remove perturbations associated with measured signals in an analog-to-digital converter (ADC). The process includes measuring the perturbations and determining a coefficient associated with the perturbations. The LMS algorithm is modified in accordance with whether a digital or an analog correction of the inter-stage error of a residue amplifier on the ADC is to be made.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 20, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Ahmed Mohamed Abdelatty ALI, Paritosh BHORASKAR, Huseyin DINC
  • Publication number: 20120319777
    Abstract: An amplifier comprises: an input stage for receiving incoming signals; a high gain stage coupled to the input stage and providing driving signals in response to the incoming signals to an output driver stage; and an output terminal coupled to the output driver stage. The output driver stage comprises a high side driver circuit having a first terminal receiving a first driving signal pdrive from the high gain stage, a second terminal coupled VDD through a first voltage drop, and a third terminal coupled to the output terminal of the amplifier.
    Type: Application
    Filed: September 20, 2011
    Publication date: December 20, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Aidan Cahalane
  • Publication number: 20120321111
    Abstract: The present invention relates to an electret condenser microphone which comprises an exterior sidewall structure attached to a carrier. The exterior sidewall structure comprises a non-conductive base material carrying first and second electrical wiring patterns electrically connected to first and second electrical traces, respectively, of the carrier. A diaphragm holder, carrying a conductive microphone diaphragm is attached to the sidewall structure to establish electrical connection between a conductive microphone diaphragm and one of the first and second electrical wiring patterns of the sidewall structure. A conductive perforated backplate is arranged in spaced relationship to the conductive microphone diaphragm. The conductive perforated backplate is electrically connected to another one of the first and second wiring patterns of the sidewall structure.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 20, 2012
    Applicant: ANALOG DEVICES A/S
    Inventor: Christian LILLELUND
  • Publication number: 20120321100
    Abstract: A microphone system has an output and at least a first transducer with a first dynamic range, a second transducer with a second dynamic range different than the first dynamic range, and coupling system to selectively couple the output of one of the first transducer or the second transducer to the system output, depending on the magnitude of the input sound signal, to produce a system with a dynamic range greater than the dynamic range of either individual transducer. A method of operating a microphone system includes detecting whether a transducer output crosses a threshold, and if so then selectively coupling another transducer's output to the system output. Some embodiments combine the outputs of more than one transducer in a weighted sum during transition from one transducer output to another, as a function of time or as a function of the amplitude of the incident audio signal.
    Type: Application
    Filed: June 22, 2012
    Publication date: December 20, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Olli Haila, Kieran Harney, Gary W. Elko, Robert Adams
  • Publication number: 20120319877
    Abstract: An analog-to-digital converter system that includes a pipeline of successively-cascaded signal converters, each operating alternatively in a first circuit configuration and a second circuit configuration, an error estimator coupled to the pipeline to receive the digitized error for estimating an amplifier gain of the present signal converter stage, and a code aligner/corrector that temporally aligns and corrects the digital codes received from the successively-cascaded signal converters to provide a digital out of the ADC system.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 20, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventor: Ahmed Mohamed Abdelatty ALI
  • Publication number: 20120314811
    Abstract: Apparatus and methods of manufacture for a wideband RF mixer are provided. The RF mixer includes an input, an LO input, and an output. A variable impedance tuner is disposed in an input signal path between the input port and the RF mixer, and a variable impedance tuner is disposed in an output signal path between the output and the RF mixer. The impedances of the variable impedance tuners are controllable for a particular frequency of operation with one or more digital or analog control signals.
    Type: Application
    Filed: June 10, 2011
    Publication date: December 13, 2012
    Applicant: Analog Devices, Inc.
    Inventor: Marc Goldfarb