Patents Assigned to Analog Devices
  • Apparatus and method for adaptive I/Q imbalance compensation
    Patent number: 8363712
    Abstract: An I/Q imbalance compensation block of a RF receiver for compensating an imbalance between an in-phase component and a quadrature component of an RF signal is disclosed. The compensation block includes a conjugation block; an adaptive finite impulse response (FIR) filter; and an adder. The filter use filter coefficients iteratively updated at least partly in response to a compensated digital signal. The filter can have a complex number for at least one, but not all of filter taps, and real numbers for other filter taps. The filter can be provided with adaptation step sizes different from filter tap to filter tap. The filter can also be provided with an adaptation step size(s) varying over time. The filter can also be provided with an adaptation step size(s) divided by the square norm of the compensated signal.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: January 29, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Raju Hormis
  • System and method for correcting programming failures in a programmable fuse array
    Patent number: 8363502
    Abstract: A system for correcting programming failures in an M-bit primary array of programmable fuses. The address of the failed fuse is stored in a secondary fuse array. Correction logic coupled to the primary and secondary arrays propagates the programming states of the good fuses, and corrects the programming state of the failed fuse, if any. The correction logic preferably comprises a decoder coupled to the secondary array which produces a one-hot M-bit word representing the failed fuse, and combinatorial logic arranged to receive the programming states of the primary array fuses and the one-hot M-bit word at respective inputs and to produce the correction logic output. Multiple failures can be accommodated using multiple secondary arrays, each storing the address of a respective failed fuse, or a tertiary array which stores the address of a failed fuse in either the primary or secondary arrays.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: January 29, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Daniel Rey-Losada
  • MEMS microphone with spring suspended backplate
    Patent number: 8363860
    Abstract: A MEMS microphone has a base, a backplate, and a backplate spring suspending the backplate from the base. The microphone also has a diaphragm forming a variable capacitor with the backplate.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: January 29, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Xin Zhang
  • Incremental gain amplifier
    Patent number: 8362836
    Abstract: An amplifier includes an amplifier section having selectable signal paths to provide discrete gain settings, and logic to incrementally select the signal paths. The logic may be configured to increment the gain in response to digital gain control signals or an analog gain control signal. Another amplifier has an input section with one or more input cells and an output section with one or more output cells. Either the input section or the output section includes at least two cells that may be selected to provide discrete gain settings. A loop amplifier is configured in a feedback arrangement with the input section. The input and output sections may have multiple selectable cells to provide coarse and fine gain steps. The gain of the loop amplifier may be coordinated with the gain of the input section to provide constant bandwidth operation.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: January 29, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Barrie Gilbert, John Cowles, Todd C. Weigandt
  • Apparatus and Method of Wafer Bonding Using Compatible Alloy
    Publication number: 20130023082
    Abstract: A method of forming a MEMS device provides first and second wafers, where at least one of the first and second wafers has a two-dimensional array of MEMS devices. The method deposits a layer of first germanium onto the first wafer, and a layer of aluminum-germanium alloy onto the second wafer. To deposit the alloy, the method deposits a layer of aluminum onto the second wafer and then a layer of second germanium to the second wafer. Specifically, the layer of second germanium is deposited on the layer of aluminum. Next, the method brings the first wafer into contact with the second wafer so that the first germanium in the aluminum-germanium alloy contacts the second germanium. The wafers then are heated when the first and second germanium are in contact, and cooled to form a plurality of conductive hermetic seal rings about the plurality of the MEMS devices.
    Type: Application
    Filed: September 20, 2012
    Publication date: January 24, 2013
    Applicant: Analog Devices, Inc.
    Inventor: Analog Devices, Inc.
  • LOW-POWER FREQUENCY DIVIDERS
    Publication number: 20130021070
    Abstract: A bias-shaping circuit for adjusting power consumption in a frequency divider to a temperature-dependent minimum includes a temperature-dependent bias source for producing a temperature-dependent bias. The bias is combined with an input signal to create an output bias. The output bias changes in response to a change in temperature to compensate for at least a portion of a temperature-induced change in the frequency divider, thereby adjusting power consumption in the frequency divider to a temperature-dependent minimum.
    Type: Application
    Filed: September 24, 2012
    Publication date: January 24, 2013
    Applicant: Analog Devices, Inc.
    Inventor: Analog Devices, Inc.
  • INTEGRATOR DISTORTION CORRECTION CIRCUIT
    Publication number: 20130021098
    Abstract: A system and method for reducing gain error and distortion in an operational amplifier due to errors in the second or integrator stage. A correction circuit may replicate an error current and insert the current into the signal stream to preempt the induction of an error at the amplifier's input. A capacitor may sample the error voltage at the input of the integrator stage of the amplifier and generate a replica of the error current in the integration capacitor to feed it into the input of the integrator stage. This eliminates any nonlinearity errors created by error currents in the compensation or integration capacitor at the second or integrator stage of the two-stage amplifier. Feeding the error current to the integrator stage may be facilitated with a unity gain buffer and a current mirror.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 24, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Moshe GERSTENHABER, Sandro HERRERA, Chau Cuong TRAN
  • Methods and apparatus for generating and processing transmitter signals
    Patent number: 8358575
    Abstract: Transmitter signals are modulated with one or more codes which may represent a pulse even though the code(s) are not shaped as pulses. The code(s) may be generated by defining a pulse by its Fourier components, and then adding random phases to the Fourier components. A time-domain signal may then be created, which may serve as the code to be modulated on a carrier wave. Upon reflection of the transmitter signal, the received signal may be processed by a receiver to recover the pulse. The time-of-flight of the transmitter signal can then be determined, enabling distance measurements to be made.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: January 22, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Shrenik Deliwala
  • Microphone with irregular diaphragm
    Patent number: 8358793
    Abstract: A microphone is formed to have a diaphragm that is configured to improve signal to noise ratio. To that end, the microphone has a backplate having a hole therethrough, and a diaphragm movably coupled with the backplate. The diaphragm has a bottom surface (facing the backplate) with a convex portion aligned with the hole in the backplate.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: January 22, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Jason W. Weigold
  • Image rejection calibration system
    Patent number: 8358993
    Abstract: Image rejection calibration includes initializing the calibration mode by applying to quadrature mixers, in place of the wanted RF input, an RF source in the frequency range of the wanted RF input, sensing the power output from the poly-phase filter, developing gain adjust and phase adjust correction values in response to the power output and adjusting in accordance with the correction values the gain of the quadrature signals from the quadrature mixers to the poly-phase filter and the phase of local oscillator quadrature signals from the local oscillator to the quadrature mixers to reduce the power output.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: January 22, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Philip Quinlan, Miguel Chanca, Hyman Shanan, Vincent Foley
  • Bipolar transistor with guard region
    Patent number: 8357985
    Abstract: A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: January 22, 2013
    Assignee: Analog Devices, Inc.
    Inventors: William Allan Lane, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson
  • Method for modifying the LMS algorithm to reduce the effect of correlated perturbations
    Patent number: 8358228
    Abstract: A process allows for the modification of the least-means-square (LMS) algorithm to remove perturbations associated with measured signals in an analog-to-digital converter (ADC). The process includes measuring the perturbations and determining a coefficient associated with the perturbations. The LMS algorithm is modified in accordance with whether a digital or an analog correction of the inter-stage error of a residue amplifier on the ADC is to be made.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: January 22, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Ahmed Mohamed Abdelatty Ali, Huseyin Dinc, Paritosh Bhoraskar
  • Common-Mode Amplifier Step Response
    Publication number: 20130015916
    Abstract: An auto-zero amplifier includes a main amplifier for amplifying an input signal; the main amplifier receives an offset-correction signal for cancelling an offset at a first common-mode level of the input signal. At the first common-mode level, the offset-correction signal is based on a first value stored using a first offset-storage element. When a change is detected in the input common-mode from the first level to a second level, the first offset-storage element is switched out and a second offset-storage element, having a second value based on the second common-mode level, is switched in.
    Type: Application
    Filed: December 14, 2011
    Publication date: January 17, 2013
    Applicant: Analog Devices, Inc.
    Inventors: Quan Wan, Alasdair Alexander
  • APPARATUS AND METHOD FOR REDUCING COMMON-MODE ERROR
    Publication number: 20130015322
    Abstract: Apparatus and methods reduce common-mode error. An integrated circuit includes a plurality of signal channels, a first proxy channel, and a subtraction block. The signal channels are configured to receive a plurality of input signals and to generate a plurality of output signals, and each of the signal channels has a substantially similar circuit topology. The first proxy channel has a substantially similar circuit topology as the plurality of signal channels, and includes an output that can vary in relation to a common-mode error of the signal channels. The subtraction block is configured to generate a plurality of modified output signals by using the output of the first proxy channel to reduce the common-mode error of the plurality of output signal channels.
    Type: Application
    Filed: July 13, 2011
    Publication date: January 17, 2013
    Applicant: Analog Devices, Inc.
    Inventors: Yoshinori KUSUDA, Gary Robert CARREAU, Michael C. COLN
  • SYSTEM AND METHOD FOR POWER TRIMMING A BANDGAP CIRCUIT
    Publication number: 20130015834
    Abstract: Techniques to perform bandgap circuit trimming that maximize the operating range and minimize the trimming time at which the bandgap will be accurate. A bandgap circuit output voltage may be trimmed by heating the circuit, supplying increasing input power to the bandgap circuit, and adjusting operational parameters of the bandgap circuit to generate a constant bandgap circuit output voltage. When the bandgap circuit output voltage may remain constant, a constant input power may be applied to the bandgap circuit and its output voltage may be adjusted to a predetermined voltage level.
    Type: Application
    Filed: July 13, 2011
    Publication date: January 17, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventor: Adam GLIBBERY
  • IMAGE SENSOR WITH A CHARGE-BASED READOUT CIRCUIT
    Publication number: 20130015323
    Abstract: Embodiments of the present invention employ a charged-based readout circuit in an image sensing system that includes a column readout circuit which may perform sampling on signals received from a pixel array and transfer a corresponding correlated double sample (CDS) signal, a differential channel readout circuit that may receive the corresponding CDS signal and amplify the signal using an output amplifier, and an output buffer which may receive the amplified CDS signal and output a corresponding signal out of the system. The output amplifier may be composed of two output amplifier paths so that ping-ponging is possible.
    Type: Application
    Filed: June 13, 2012
    Publication date: January 17, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Mark T. SAYUK, Steven J. DECKER
  • FOUR-QUADRANT BOOTSTRAPPED SWITCH CIRCUIT
    Publication number: 20130009623
    Abstract: A bootstrapped switch circuit includes a first switch transistor to receive an input signal and a second switch transistor to provide an output signal. The sources of the switch transistors may be coupled. A voltage source may be coupled to the sources of the switch transistors and at least one of the gates of the switch transistors. The voltage source may generate a control voltage to activate at least one of the switch transistors based on a bias current. A voltage source driver may be coupled to the voltage source to generate the bias current based on a bias voltage. The bias voltage may include a first voltage approximately corresponding to an overdrive voltage of at least one of the switch transistors and a second voltage approximately corresponding to a threshold voltage of the switch transistors.
    Type: Application
    Filed: July 11, 2012
    Publication date: January 10, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Christian Steffen BIRK, Gerard MORA PUCHALT
  • Bipolar transistor
    Patent number: 8350352
    Abstract: A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: January 8, 2013
    Assignee: Analog Devices, Inc.
    Inventors: William Allan Lane, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson
  • System and method for measuring reactive power
    Patent number: 8350558
    Abstract: A system and method for measuring reactive power which uses a pair of quadrate carriers to add a 90 degree phase shift to a voltage path or a current path in a power meter. The quadrate carriers have the same frequency but are offset in phase from each other by 90 degrees.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: January 8, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Yun [Yale] Ning, Xiuhong [George] Lu
  • Noise mitigating microphone system and method
    Patent number: 8351632
    Abstract: A microphone system has a base coupled with first and second microphone apparatuses. The first microphone apparatus is capable of producing a first output signal having a noise component, while the second microphone apparatus is capable of producing a second output signal. The first microphone apparatus may have a first back-side cavity and the second microphone may have a second back-side cavity. The first and second back-side cavities may be fluidly unconnected. The system also has combining logic operatively coupled with the first microphone apparatus and the second microphone apparatus. The combining logic uses the second output signal to remove at least a portion of the noise component from the first output signal.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: January 8, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Kieran P. Harney, Jason Weigold, Gary Elko