Abstract: An analog to digital converter is provided comprising an array of capacitors for sampling an input, each capacitor having at least one associated switch for controllably connecting a terminal of the capacitor to a first reference voltage or to a second reference voltage; and a sequence generator for generating a sequence of bits, wherein during sampling of the input onto the array of capacitors an output of the sequence generator is supplied to the switches of a first group of capacitors to control whether a given capacitor within the first group is connected by its associated switch to the first reference voltage or to the second reference voltage.

Abstract: Each of a number of resonator masses is split into two separate lobes or masses joined together by a short flexure. The short flexure allows the separate lobes or masses to rotate slightly as they resonate so as to substantially relieve longitudinal stresses in certain resonator structures.

Abstract: An optical modulator structure includes a block that includes electro-optical (EO) materials. A waveguide and electrode structure is formed on a substrate. The block is in close proximity to the waveguide and electrode structure so as to form optical modulation when electric fields in the block are varied.

Abstract: A method of operating a digital to analog converter comprising the steps of operating the converter in a first mode to obtain a first conversion result, operating the converter in a correction mode in which one or more correction conversions are made, and wherein each correction conversion takes the result of a preceding result as a valid starting point.

Abstract: A mode coupler structure includes a discriminating structure that discriminates between various incoming modes from an input optical fiber structure. A waveguide structure is coupled to the discriminating structure that couples light not discriminated by the discriminating structure to an output optical fiber structure.

Abstract: Generators are provided for supplying reference signals that are especially suited to signal conditioning systems such as analog-to-digital converters. They generate reference signals with low output impedances that reduce spurious signals and shorten recovery times. Filters are included to decouple reference structures and thereby reduce noise signals, reduce ringing and dampen resonant circuits that may be formed with the inductance of bond wires and various parasitic chip capacitances. The generators are configured to provide this high performance with a reduced current consumption.

Abstract: An output stage interface circuit (1) comprises a main bipolar transistor (Q1) coupling a data output terminal (5) to a first rail (2) to which the positive of the power supply voltage (VDD) is applied, and a substrate diffusion isolated main NMOS transistor (MN1) coupling the data output terminal (5) to a second rail (3) which is held at ground. Control signals from a data control circuit (6) selectively operate the main bipolar transistor (Q1) and the main MOS transistor (MN1) for determining the logic high and low states of the data output terminal (5) during data output.

Abstract: The invention provides a bandgap voltage reference circuit that is adapted to provide a ?Vbe of sufficiently large value that no amplification is required, and therefore any offset contribution is not gained. Using a stacked arrangement of three pairs of transistors, the invention reduces the requirement for multiple resistors within a circuit and can therefore minimise errors due to resistor matching and value. Internally provided circuitry for reducing voltage curvature is provided with the result that a circuit having low offset sensitivity and curvature correction is provided.

Abstract: A line interface performs echo cancellation without the use of a hybrid filter network and includes a transmit path having a line driver, a single matching network terminating the line, and a single transformer. The transformer uses split windings on both the primary side and the secondary (line) side. Each half of the primary side is tapped to obtain a turns ratio of N1:N2, while each half of the secondary side of the transformer has N windings. The single matching impedance is coupled in parallel between the first winding and the second winding on each half of the primary side. Either the voltage across the matching impedance or the voltage across the receive terminals is bootstrapped to the receive signal through multiple negative feedbacks. The transfer function of the line driver is shaped as a first-order high-pass filter (HPF) to reject any out-of-band noise and distortion components.

Abstract: The invention provides a method of processing a sequence of operands to produce compiled code for a target data processor, the method comprising the steps of: automatically analysing a source code to produce a fist representation of that code in single static assignment form; transforming the first representation into a second representation by unlooping ? nodes within the single static assignment form so as to create code suitable for tree pattern matching to be performed thereon; performing tree pattern matching on the second representation of the code; and re-looping the ? nodes.

Abstract: A method of forming a microphone forms a backplate, and a flexible diaphragm on at least a portion of a wet etch removable sacrificial layer. The method adds a wet etch resistant material, where a portion of the wet etch resistant material is positioned between the diaphragm and the backplate to support the diaphragm. Some of the wet etch resistant material is not positioned between the diaphragm and backplate. The method then removes the sacrificial material before removing any of the wet etch resistant material added during the prior noted act of adding. The wet etch resistant material then is removed substantially in its entirety after removing at least part of the sacrificial material.

Abstract: A bandgap voltage regulator is arranged such that, when a desired output voltage is present between its output and common terminals, current densities in a pair of bipolar transistors having unequal emitter areas are maintained in a fixed ratio. The difference in the transistors' base-emitter voltages is across a resistor, which thus conducts a PTAT current. The regulator also generates a CTAT current, and both the PTAT and CTAT currents are made to flow in another resistor, with the resulting voltages added by superposition. The regulator's resistors are sized such that Vout is an integral or fractional multiple of Vbg, where Vbg is the bandgap voltage for the fabrication process used to make the regulator's transistors, such that Vout is temperature invariant, to a first order. The resistors are preferably realized using unit resistors having a predetermined resistance, or series and/or parallel combinations of unit resistors.

Abstract: A method of forming a microphone having a variable capacitance first deposits high temperature deposition material on a die. The high temperature material ultimately forms structure that contributes to the variable capacitance. The method then forms circuitry on the die after depositing the deposition material. The circuitry is configured to detect the variable capacitance.

Abstract: Resonator structures include a plurality of resonator masses interconnected by a plurality of levers so as to resonate in anti-phase with one another. The levers include a plurality of lever fingers interdigitated with corresponding fixed fingers affixed to an underlying substrate for at least one of driving movement of the levers and sensing movement of the levers relative to the fixed fingers.

Abstract: A sigma-delta digital-to-analog converter comprises a current digital-to-analog converter (IDAC) stage which generates a current depending on an input digital signal. An output current-to-voltage converter converts the generated signal to a voltage on a continuous-time basis. The amplifier used in the output current-to-voltage converter is chopper-stabilized. The converter can be single bit or multi-bit. The IDAC stage can be implemented with a pair of branches, a first branch comprising a first biasing current source and a second branch comprising a second biasing current source. The biasing current sources can be chopper-stabilized by connecting the bias current sources to the output current-to-voltage converter by a set of switches. The switches connect the biasing current sources to the output current-to-voltage converter in a first configuration and a second, reversed, configuration. This modulates flicker noise contributed by the bias current sources to the chopping frequency.

Abstract: An efficient data-directed scrambler is provided for processing digital signals having an unequally-weighted code. The data-directed scrambler includes inputs for receiving unequally-weighted bits of an input signal, outputs for supplying N scrambled bits of an output signal, and two or more scrambler columns connected in series between the inputs and the outputs. One or more of the scrambler columns includes a swapper cell and a digital fanout. Least significant bits in the unequally-weighted code are input to a swapper cell, and higher order bits in the unequally-weighted code are input to respective digital fanouts. In the other embodiments, an efficient data-directed scrambler is provided for processing digital signals having an equally-weighted code.

Abstract: A light conversion apparatus has a germanium-based photodiode, and a polysilicon-based receiving electrode for receiving light to be converted by the photodiode. The receiving electrode is coupled with the photodiode and permits the received light to substantially pass through it to the photodiode. The photodiode is capable of converting the received light into an electrical signal.

Abstract: A method of executing an instruction stream in a pipelined execution unit of depth, p, comprises loading the instruction stream; detecting an iteration of an instruction in the loaded instruction stream; interleaving p steams of instances of the instruction in the pipeline; detecting an end of the iteration; and combining results obtained from the p streams after all programmed iterations have completed. A computational circuit comprises a register which can hold a value representing both an operand and result of an iterative operation; a multiplexer having a first input connected to receive the operand from the register, a second input connected to a source of an identify value for the iterative operation, and an output; and an operator circuit having an input connected to receive a value from the multiplexer output, and an output connected to return thee result to the register.

Abstract: A chopped charge pump with matching up and down pulses including a first pair of current sources, a second pair of current sources, and a switching circuit for switching on in a first phase one current source of each pair to provide up current pulses, and the other current source of each pair to provide down current pulses, and switching on in a second phase the other current source of each pair to provide up current pulses, and the one current source of each pair to provide down current pulses to offset error in the current response of the pairs of current sources.

Abstract: A gain calibration system for an amplifier includes an amplifier having inputs and outputs and an analog to digital converter having inputs and an output. There is a voltage supply for providing a plurality of output voltages. A first switching circuit couples at least one of the output voltages to the inputs of the amplifier in a first phase. A second switching circuit couples the outputs of the amplifier to the inputs of the analog to digital converter in the first phase and couples the sum of all of the at least one output voltages to the input of the analog to digital converter in a second phase. A processor responsive to the outputs of the analog to digital converter in the first and second phases calculates a calibration factor to accommodate for amplifier gain error.