Abstract: An enclosed modular circuit component is immobilized against deleterious movement due to high impact, shock and vibration movement. A two-piece enclosure case for securely immobilizing a wide variety of readily available modular circuit components is easy to fabricate and utilize with the components. The enclosure case comprises two halves each of which has a top and a bottom, respectively, with two oppositely disposed side walls projecting therefrom. At least one half of the case has a ledge upon which the circuit component header, such as an element support board or a printed circuit board, may be supported. The other half of the case is then provided with means to urge the board against the ledge so that when the two halves are placed together the component is sandwiched between them in a secured immobile relationship. The component elements may be maintained spaced from contact with the enclosure interior surfaces.

Abstract: An isolation amplifier comprising three separate, conductively-isolated sections: (1) an input section including an AC modulator, (2) an output section including a demodulator, and (3) an oscillator section. The AC signal from the oscillator section is transformer-coupled to the modulator section to provide the AC carrier excitation for the modulator and also to energize a rectifier power supply circuit to produce DC voltages for the active elements of the input section. The modulated carrier signal developed by the modulator section is transformer-coupled to the demodulator section. Each of the transformers includes two separate cores which are coupled inductively by single-turn windings. Special electrostatic shielding is provided to reduce leakage effects.

Abstract: An analog-to-digital converter of the ramp-integrator type utilizing a special technique to reduce errors due to offset voltages. In a pre-conversion cycle, the integrator first is ramped away from a datum level and then back to that level, by sequential application of opposite-polarity reference signals. A digital net offset error is thereby determined as the difference in clock time between (a) the total time of ramp-up-and-back and (b) a fixed time period set by a clock generator. During the subsequent conversion cycle, the integrator is ramped up by the unknown analog signal and then is ramped back by a reference signal. The time of ramp-up is controlled in accordance with the amount of previously-determined net offset error so as to provide error correction.In the embodiment disclosed, the ramp-up time during the pre-conversion cycle is set at k/2 clock pulses, and the digital offset error is the difference in clock pulse time between the return to datum level and a fixed time of k clock pulses.

Abstract: A digital-to-analog converter of the type formed with a plurality of current source transistors arranged to carry different levels of current according to a predetermined weighting pattern, e.g., a binary weighting pattern. In the converter, a plurality of identically sized current source transistors carry the different levels of current and thus operate at different current densities with different base-to-emitter voltages subject to temperature drift. Stable emitter voltages, providing accurate levels of weighted current, are developed by means of resistances between the bases of successive current source transistors and a current source for developing across the interbase resistances a voltage linearly varying with absolute temperature, corresponding to the difference between base-to-emitter voltages of the successive current source transistors.

Abstract: A digital-to-analog converter utilizing a set of high-speed current switches each comprising a buffer transistor and a switching transistor interconnected with a common resistor in such a fashion that the buffer transistor in the normal "off" state supplies the common resistor with a current of predetermined magnitude to bias the switching transistor to cut-off; a control pulse coupled through an input diode cuts off the buffer transistor, the bias at the switching transistor is thereby eliminated, and the switching transistor immediately conducts.