Abstract: A circuit for controlling the circuit thresholds on an MOS integrated circuit takes advantage of the fact that all MOS devices of a particular type on the same chip have nearly identical characteristics. The circuit thresholds are varied by applying a control voltage to the back gate of an MOS device in each stage to be controlled. The control voltage is generated in a reference stage which utilizes a feedback loop to servo the back gate voltage of an MOS transistor in the loop. A reference voltage equal to the desired circuit threshold votlage is applied to the input of the reference stage. The reference voltage and the reference stage output are applied to an amplifier in the feedback loop. The amplifier applies to the back gate of the MOS transistor in the reference stage a control voltage that tends to equalize or establish a desired offset between the reference voltage and the reference stage output.

Abstract: A system for generating a continuous piece-wise linear approximating function that approximately corresponds to a predetermined function over a preselected domain, the approximating function having a selected number of linear segments, the approximating function at the endpoints of the domain falling on the predetermined function. The system first selects an initial error limit, then identifies the points which define the segments. In defining the segments, the system begins at a low endpoint, extends a test segment from the low point to a high endpoint on the predetermined function, and then tests the error between the test segment and the predetermined function at each point. If the error is less than the error limit, the system selects a new higher point on the predetermined function as the new high endpoint, and repeats the operation until the test segment error between it and the predetermined function by at most the error limit.

Abstract: A new process making it possible to produce stable buried Zener diodes in large-sized wafers where slow ramping of diffusion temperatures is required to avoid crystal damage and other adverse effects. The process includes an initial deep ion implantation of p type dopant (boron). A second ion implantation of n type dopant (arsenic) is made over the p type implantation. Both implantations are driven in to the required degree. An additional p type dopant diffusion is made coincident with the base formation by ion implantation to establish connection to the original deep p-doped region, and an additional n type dopant diffusion is made coincident with the emitter formation to establish connection with the n type dopant implantation.

Abstract: A MOS sense amplifier having a differential input and a single-ended output, and formed of only six MOS transistors. The amplifier's non-inverting input is connected to the gates of first and second MOSFETs. The drains of the first and second MOSFETs are connected to each other and to the gates of third and fourth MOSFETs. The drain of the third MOSFET is connected to the sources of the second and sixth MOSFETs; and the source of the third MOSFET is connected to the positive supply voltage. The drain of the fourth MOSFET is connected to the sources of the first and fifth MOSFETs. The source of the fourth MOSFET is connected to ground. The inverting input of the sense amplifier is connected to the gates of the fifth and sixth MOSFETs. The drains of the fifth and sixth MOSFETs are connected to each other and provide the output terminus of the amplifier. The first, fourth and fifth MOSFETs are n-channel devices, while the second, third and sixth MOSFETs are p-channel devices.

Abstract: An integrated-circuit analog-to-digital converter of the successive-approximation type formed on a single monolithic chip. The converter is made by a diffusion process wherein certain portions of the chip are formed with normal-mode linear transistors, and other portions are formed with inverted mode I.sup.2 L transistors. The normal-mode transistors provide a switchable current-source DAC, a set of three-state output buffers, and a comparator. The inverted mode transistors provide an internal clock and successive-approximation control circuitry for the DAC. The chip also includes a voltage reference to provide for absolute analog-to-digital conversions.

Abstract: A four-quadrant multiplier uses a CMOS digital-to-analog converter (DAC) and just one operational amplifier. The back gates of the CMOS switches in the DAC are biased in the "off" condition during a substantial voltage swing at the output of the DAC. In one embodiment, the back gates of the CMOS switches are held at about -5 V with respect to the output lines, and the logic low level to the off switch also is set at -5 V relative to the output lines. The DAC connections are "reversed" so as to receive the analog input across the terminals intended as the DAC's output, with the inputs of the operational amplifier being connected across the reference voltage terminal and a feedback or output terminal of the DAC.

Abstract: Apparatus and method for performing low-frequency noise measurements on active devices such as operational amplifiers, instrumentation amplifiers and the like. A device under test is settled thermally in a short, controlled interval. The device under test is placed in a test fixture within a closed housing which shields against air flow. A substantial heat sink is urged against the device under test while a pre-heat circuit preheats the device for about 1-2 seconds by forcing it to consume a predetermined amount of energy. The voltage output of the device under test is supplied to a band-pass filter which includes a high-pass filter having a single dominant pole whose frequency may be varied. A control circuit smoothly moves that pole from a first, higher frequency of about 50 Hz to a second, lower frequency of about 0.1 Hz in an interval of only 3 seconds or so, rapidly settling the filter.

Abstract: A monolithic integrated circuit generates a programmable time delay under control of a digital word. The delay is generated by comparing a ramp signal to a threshold determined by the value of the digital word and appears as a time difference between a trigger pulse and a pulse generated when the value of the ramp voltage equals the value of the threshold voltage. The ramp voltage is generated by a simple resistance/capacitance charging circuit whose time constant can be adjusted by the user. The threshold voltage is set by a digital-to-analog converter (DAC) and resistor circuit which converts the digital control word into a variable voltage. In order to stabilize the device against changes in temperature and power supply variations, a voltage coupling circuit forces the threshold voltage to track changes in the ramp voltage caused by temperature and power supply variations.

Abstract: In a semiconductor device fabrication process, the SILO (Sealed Interface Local Oxidation) field oxide formation process is used to provide essentially vertical sidewalls between the field oxide surface and active regions. After field oxide formation and doping of active regions, the device is conformally coated with an oxide layer, which is patterned by a conventional photomasking process to define contact holes. Contact holes are then anisotropically etched through the oxide layer to the active regions. Conformal coating of the vertical sidewalls insures that an oxide sidewall spacer remains where the contact holes intersect the field oxide. Finally, a metal contact layer is deposited in the contact holes. The sidewall spacer automatically spaces the metal contact from the edges of the active region, thereby preventing leakage to the substrate.

Abstract: Apparatus for sampling a repetitive input signal includes a sampling bridge responsive to a sampling strobe for sampling the input signal at an equivalent time point during its cycle, an error-sampled feedback loop for providing a sampling loop output representative of the input signal sample amplitude by determining and storing the difference between the input signal sample and the attenuated loop output, and a timebase circuit for generating the sampling strobe. The timebase circuit includes a circuit for repeating the sampling strobe at least twice at each equivalent time point during succesive cycles of the input signal for reduction of errors in the sampling loop output.

Abstract: A three-state output buffer delivering digital signals to a multi-line bus when in the data state, and presenting a high-impedance to the bus in the third state. The buffer output includes a two-transistor totem pole. Individual control transistor drivers are provided to switch the output transistors off when switching to the third state. The control transistors are actively driven both on and off. One of the output transistors includes an inverted-mode auxiliary collector which reduces base drive and saturation in that transistor, and which serves to hold off the other output transistor. Common control circuitry for all the buffer stages includes special means for reducing saturation effects to speed up control signals.

Abstract: An integrated-circuit analog-to-digital converter of the successive-approximation type formed on a single monolithic chip. The converter is made by a diffusion process wherein certain portions of the chip are formed with normal-mode linear transistors, and other portions are formed with inverted mode I.sup.2 L transistors. The normal-mode transistors provide a switchable current-source DAC, a set of three-state output buffers, and a comparator. The inverted mode transistors provide an internal clock and successive-approximation control circuitry for the DAC. The chip also includes a voltage reference to provide for absolute analog-to-digital conversions.

Abstract: A circuit for measuring the leakage current of an electrometer amplifier 10 determines the leakage currents at both amplifier input terminals simultaneously by a method that eliminates the effects of the amplifier offset voltage as well as of the offset voltages and leakage currents of the amplifiers (22 and 40) used in the measurement. With no amp. under test present in the circuit, measurements are made of the outputs of the two test-circuit amplifiers (22 and 40). This results in quantities that indicate the required compensation for the offset voltages and leakage currents of the test-circuit amplifiers. From then on, measurements are made of the amplifier output voltages with an amp. under test present and the leakage currents at both input terminals of said amplifier 10 under test can be inferred from these second measurements by using the information obtained from the first set of measurements.

Abstract: A guided-wave electrooptic analog-to-digital converter utilizes a multiple wavelength optical source as a sampling source to minimize the number of interferometers needed for conversion of an analog signal with a given resolution. A reduction in the number of interferometers reduces the capacitive impedance of the analog signal input and facilitates driving the converter with conventional R.F. amplifiers. The multiple-wavelength signal consists of a combination of a plurality of signals with wavelengths which are substantially binary multiples of the shortest wavelength. The signals are passed together through a conventional Mach-Zehnder interferometric modulator and the interferometer output is split back into a plurality of output beams each with a single wavelength. Each of the output beams represents a bit of the digitized signal. By increasing the number of different wavelengths in the sampling signal, higher resolutions in the output signal can be obtained with a single interferometric modulator.

Abstract: A technique for enclosing microelectronic circuit elements in hermetically sealed packages comprising a planar ceramic substrate with a box-like ceramic cover sealed thereto by a fused glass coating. The glass sealant is applied to the substrate in the form of a paste which thereafter is fired at high temperature and cooled to produce a smooth glass coating. With the cover in place on the substrate, the glass coating is remelted by heat developed by infra-red radiation developed by four line-focussed radiant heaters at the four sides of the package. The radiation of each heater is focussed at the interface line between the cover and the substrate. Because the radiant heat is concentrated along the interface line, unwanted heat transfer into the package is minimized, and the temperature is prevented from rising sufficiently to damage heat-sensitive elements.

Abstract: A digitally programmable infinite impulse response (IIR) filter particularly useful as a temporal averager. The filter comprises a voltage mode multiplying digital/analog converter (12) and two sample-and-hold circuits (10, 16). The first sample-and-hold circuit receives the input signal to the system and supplies its output signal to the reference voltage input terminal of the DAC. The second sample and hold circuit has its input terminal connected to the voltage output terminal of the DAC and has its output connected to the analog ground terminal of the DAC. A digital input code (D) supplied to the DAC controls its gain and the degree of noise rejection provided by the filter, by altering the frequency response of the filter.

Abstract: A 16-bit D/A converter formed on a single monolithic chip and having two cascaded stages each including a 256-R resistor string DAC. The analog output voltage of the first stage is coupled to the second stage by two buffer amplifiers each formed by a non-epitaxial process using a P-type substrate. The amplifiers include NMOS and PMOS-cascoded bipolar current sources arranged to avoid the use of metallization to provide for electrical interconnections within the source.

Abstract: A system for controlling the flow of semiconductor products and their components through a production facility including assembly and final testing of a large number of different products with multiple product grades. The system stores information on the demand and inventory of all product grades together with grade distribution data giving the yield of all co-products of a product family from testing the common component of that family. The system includes means for calculating the number of common components to be tested to cover the requirements for all co-products of a family. The distribution data also gives the yield of all by-products of a test for particular products, and the system operates to adjust the inventory status for other products corresponding to such by-products, to avoid excess production of such other products in meeting projected demand.

Abstract: A method is disclosed for matching the sensitivities of different-sized resistors to changes in resistance due to changes in width resulting from a systematic manufacturing error. In order to produce sets of resistors which can be deployed in predetermined ratios of resistance, the sensitivities of a matching resistor and a reference resistor are equalized by forming the matching resistor as a plurality of parallel strips as opposed to a unitary rectangular section.

Abstract: A voltage reference source for supplying one or more reference voltages to load circuitry. The reference source comprises an ungrounded voltage reference cell (20) floated between two power supply levels (Vcc and Vee), and an operational amplifier (22) whose non-inverting input (terminal 9) may be connected to sense the voltage of the load circuit's ground node. The inverting input of the op amp (terminal 10) may be connected to various nodes (6, 8, 11) in the reference cell; the voltage on the selected node is forced to match the sensed ground voltage and that node thus becomes an internal ground reference point. The high input impedance of the op amp (22) limits the current in the ground sensing path to a very low value, such as about 10 nA. Consequently, very little voltage is developed in the leads from the load circuit's ground node to the op amp input. The floating reference cell (20) has a resistive divider (48, 50) across its output.