Patents Assigned to Analog Devices
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Patent number: 10256831Abstract: A successive approximation register analog to digital converter (SAR ADC) is provided in which impact of dielectric absorption is reduced with a correction circuit configured to adjust a present digital code value signal based at least in part upon a previous digital code value signal, an acquisition time and temperature.Type: GrantFiled: September 21, 2016Date of Patent: April 9, 2019Assignee: Analog Devices GlobalInventors: Sandeep Monangi, Mahesh Madhavan
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Patent number: 10247600Abstract: Systems and techniques are described for matching the resonance frequencies of multiple resonators. In some embodiments, a resonator generates an output signal reflecting the resonator's response to an input drive signal and an input noise signal. The output signal is then compared to the noise signal to derive a signal representative of the resonance frequency of the resonator. Comparing that signal to the output signal of a second resonator gives an indication of whether there is a difference between the resonance frequencies of the two resonators. If there is, one or both of the resonators may be adjusted. In this manner, the resonance frequencies of resonators may be matched during normal operation of the resonators.Type: GrantFiled: November 10, 2016Date of Patent: April 2, 2019Assignee: Analog Devices, Inc.Inventors: Youn-Jae Kook, Jose Barreiro Silva, Jianrong Chen, Ronald A. Kapusta, Jr.
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Patent number: 10249609Abstract: An integrated circuit device for protecting circuits from transient electrical events is disclosed. An integrated circuit device includes a first bipolar junction transistor (BJT) and a second BJT cross-coupled with the first BJT to operate as a first semiconductor-controlled rectifier (SCR), where a base of the first BJT is connected to a collector of the second BJT, and a base of the second BJT is connected to an emitter or a collector of the first BJT. The integrated circuit device additionally includes a triggering device comprising a first diode having a cathode electrically connected to the base of the first BJT. The integrated circuit device further includes a third BJT cross-coupled with the second BJT to operate as a second SCR, where the third BJT has a collector connected to the base of the second BJT and a base connected to the collector of the second BJT.Type: GrantFiled: August 10, 2017Date of Patent: April 2, 2019Assignee: Analog Devices, Inc.Inventors: Javier Alejandro Salcedo, Linfeng He
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Patent number: 10250194Abstract: An envelope tracking scheme can be used, such as to modulate a supply node of a power amplifier circuit to improve efficiency. For example, a magnitude or amplitude envelope of a signal to be modulated can be scaled and used to drive a node, such as a drain, of the power amplifier circuit. An envelope tracking signal can be generated such as having a bandwidth that is compressed as compared to a full-bandwidth envelope signal. A peak-value “look ahead” technique can be used, for example, so that amplitude compression or clipping of the transmit signal is suppressed when the bandwidth-compressed envelope tracking signal is used to modulate a supply node of the power amplifier used to amplify the transmit signal.Type: GrantFiled: March 30, 2016Date of Patent: April 2, 2019Assignee: Analog Devices GlobalInventors: Patrick Pratt, Joseph Bradford Brannon, Ronald Dale Turner
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Publication number: 20190095298Abstract: Systems and methods are provided for automated analog fault injection including creating a list of fault models for injection to an analog circuit, adding a first fault placeholder to the analog circuit, running fault simulations by replacing the first fault placeholder with a first fault model from the list of fault models, and determining whether the first fault model is detected.Type: ApplicationFiled: September 22, 2017Publication date: March 28, 2019Applicant: Analog Devices Global Unlimited CompanyInventors: Courtney E. FRICANO, Paul P. WRIGHT, David BROWNELL
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Patent number: 10239746Abstract: Capped microelectromechanical systems (MEMS) devices are described. In at least some situations, the MEMS device includes one or more masses which move. The cap may include a stopper which damps motion of the one or more movable masses. In at least some situations, the stopper damps motion of one of the masses but not another mass.Type: GrantFiled: July 14, 2017Date of Patent: March 26, 2019Assignee: Analog Devices, Inc.Inventors: Jinbo Kuang, Gaurav Vohra
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Patent number: 10243443Abstract: Apparatus and methods for a bias supply circuit to support power supply including a switched-mode voltage converter cascaded with an n-channel-based linear regulator are provided. In an example, a cascaded power supply system can include a switched-mode DC-to-DC power converter, including an input voltage node, a first stage output voltage node, and a bootstrapped floating bias voltage node, and a linear regulator circuit. The linear regulator circuit can include an n-channel field-effect transistor (NFET) pass transistor, including a drain terminal coupled to the first stage output voltage node, a gate terminal, and a source terminal configured to provide a second-stage output voltage, and a gate driver circuit, including a driver output coupled to the gate terminal of the NFET pass transistor, and a high side supply node configured to receive a bias voltage generated from the bootstrapped floating bias voltage node.Type: GrantFiled: March 16, 2016Date of Patent: March 26, 2019Assignee: Analog Devices, Inc.Inventors: Jun Zhao, Brandon Day
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Patent number: 10242912Abstract: Integrated device dies and methods for forming one or more of the integrated device dies are disclosed. The integrated device dies can be formed using two step sawing process; a first sawing step partially sawing a substrate comprising metal and a second sawing step sawing through a remaining thickness of the substrate.Type: GrantFiled: June 16, 2017Date of Patent: March 26, 2019Assignee: Analog Devices, Inc.Inventors: Craig Ventola, Robert O. Doherty, Jose A. Santana, John A. McHatton
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Publication number: 20190086244Abstract: Fiber Bragg grating interrogation and sensing used for strain and temperature measurements. A simple, broadband light source is used to interrogate one or more fiber Bragg grating (FBG). Specifically, a packaged LED is coupled to fiber, the light therefrom is reflected off a uniform FBG. The reflected light is subsequently analyzed using a filter and a plurality of Si photodetectors. In particular, the filter is a chirped FBG or an optically coated filter, in accordance with some embodiments. Measurement analysis is performed by ratio of intensities at the plurality of detectors, at least in part.Type: ApplicationFiled: September 19, 2018Publication date: March 21, 2019Applicant: Analog Devices, Inc.Inventor: Shrenik DELIWALA
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Patent number: 10236905Abstract: Techniques to increase a data throughput rate of a filter circuit by preloading selectable memory circuits of the filter circuit with reference data, sampling input data at an input of the filter circuit, combining the sampled input data with the preloaded reference data, and generating a filter output based on the combined sampled input data and preloaded reference data.Type: GrantFiled: February 21, 2018Date of Patent: March 19, 2019Assignee: Analog Devices Global Unlimited CompanyInventors: Andreas Callanan, Adrian Sherry, Gabriel Banarie, Colin G. Lyden
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Patent number: 10236221Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure a pre-formed solid layer of dielectric material is bonded to the substrate over the first transformer coil or capacitive plate. The preformed solid layer is formed from a thick layer of solid dielectric material, which is ground to the required thickness, either prior to being bonded to the circuit substrate, or thereafter. Such techniques result in a thick isolation layer that is formed more quickly and with lower outgassing risk than conventional spin-coating or deposition techniques.Type: GrantFiled: May 19, 2017Date of Patent: March 19, 2019Assignee: Analog Devices GlobalInventor: Alan John Blennerhassett
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Patent number: 10234288Abstract: A BAW gyroscope is configured to operate with two pairs of orthogonal modes instead of a single pair in order to mitigate the impact of changes in gaps (e.g., introduced from external stresses such as thermal gradients, external shocks, mechanical stress/torque, etc.). Specifically, the BAW gyroscope resonator is configured to be simultaneously driven to resonate with a two disparate resonant modes (referred to herein as the “fundamental” mode and the “compound” mode), with the same set of drive electrodes used to drive both resonant modes (i.e., all of the drive electrodes are used to drive the two drive modes). When the sensor experiences external rotation, energy couples from the driven modes of vibration to two corresponding orthogonal sense modes via the Coriolis force. The same set of sense electrodes is used to sense both sense modes (i.e., all of the sense electrodes are used to sense the two sense modes).Type: GrantFiled: September 14, 2015Date of Patent: March 19, 2019Assignee: Analog Devices Global Unlimited CompanyInventors: Siddharth Tallur, Sunil Ashok Bhave
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Patent number: 10236808Abstract: The present disclosure provides a system and method to determine at least one parameter of a motor, such as an inductance. The inductance can be determined, such as based on one or more digitally sampled motor winding currents. A digital filter can be applied to the digital samples such as to determine a slope of the motor winding currents. The digital filter can include a least squares fit that can be applied to the digital samples, such as to determine a slope of the motor winding currents. The least squares fit can be determined based on a computation of central tendencies such as an average value of time, an average value of current, an average value of the square of time, and the average value of the product of time and current. The average values can be determined recursively to provide improved computational speed.Type: GrantFiled: August 25, 2016Date of Patent: March 19, 2019Assignee: Analog Devices, Inc.Inventors: Brendan Aengus Murray, Jens Engen Sorensen
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Publication number: 20190080231Abstract: Systems and methods are provided for reducing power in in-memory computing, matrix-vector computations, and neural networks. An apparatus for in-memory computing using charge-domain circuit operation includes transistors configured as memory bit cells, transistors configured to perform in-memory computing using the memory bit cells, capacitors configured to store a result of in-memory computing from the memory bit cells, and switches, wherein, based on a setting of each of the switches, the charges on at least a portion of the plurality of capacitors are shorted together. Shorting together the plurality of capacitors yields a computation result.Type: ApplicationFiled: September 7, 2018Publication date: March 14, 2019Applicant: Analog Devices, Inc.Inventors: Eric G. NESTLER, Naveen VERMA, Hossein VALAVI
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Publication number: 20190078912Abstract: Various embodiments mitigate the risk of frequency-lock in systems having multiple resonators by dynamically changing the frequency at which at least one of the resonators is driven. More particularly, the drive frequency of at least one of the resonators is changed often enough that the multiple resonators do not have time to achieve frequency lock. Changes in the oscillation of the resonators may be analyzed to determine, for example, acceleration of such systems. Some embodiments implement self-test by assessing expected performance of a system with toggling drive frequencies. More particularly, some embodiments implement self-test by artificially inducing displacement of a movable member of a system.Type: ApplicationFiled: November 8, 2018Publication date: March 14, 2019Applicant: Analog Devices, Inc.Inventors: Gaurav Vohra, William A. Clark, Mehrnaz Motiee
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Patent number: 10229596Abstract: A lidar system can be provided for measuring a clearance of overhead infrastructure, such as a bridge or overpass. The lidar system can alert a vehicle driver or automatically brake the vehicle if the available clearance is smaller than a height of the vehicle. The lidar system can emit rays of light over a range of angles towards a target region where the rays of light can have a vertical span. The lidar system can then receive rays of light reflected or scattered from the target region and can determine a distance traveled by the rays of light by determining a round trip travel time of the rays. A clearance of the overhead infrastructure can then be determined using geometric relationships.Type: GrantFiled: October 5, 2017Date of Patent: March 12, 2019Assignee: Analog Devices, Inc.Inventor: Harvey Weinberg
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Patent number: 10224970Abstract: Various examples are directed to systems and methods for wideband digital predistortion. A digital pre-distortion circuit may be programmed to receive a complex baseband signal and generate a pre-distorted signal. Generating the pre -distorted signal may comprise applying to the complex baseband signal a first correction for an Nth order distortion of a power amplifier at an Ith harmonic frequency zone centered at about an Ith harmonic of a carrier frequency and applying to the complex baseband signal a second correction for the Nth order distortion at a Jth harmonic frequency zone centered at about a Jth harmonic of the carrier frequency different than the Ith harmonic of a carrier frequency.Type: GrantFiled: May 19, 2016Date of Patent: March 5, 2019Assignee: Analog Devices GlobalInventor: Patrick Pratt
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Patent number: 10224474Abstract: An integrated circuit may include a substrate and a dielectric layer formed over the substrate. A plurality of p-type thermoelectric elements and a plurality of n-type thermoelectric elements may be disposed within the dielectric layer that are connected in series while alternating between the p-type and the n-type thermoelectric elements. The integrated circuit may include first and second substrates each having formed thereon a plurality of thermoelectric legs of a respective type of thermoelectric material. The first and second thermoelectric substrates also may have respective conductors, each coupled to a base of an associated thermoelectric leg and forming a mounting pad for coupling to a thermoelectric leg of the counterpart substrate.Type: GrantFiled: November 9, 2015Date of Patent: March 5, 2019Assignee: Analog Devices, Inc.Inventors: Jane Cornett, Baoxing Chen, William Allan Lane, Patrick M. McGuinness, Helen Berney
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Patent number: 10224887Abstract: A transimpedance amplifier (TIA) can include an operational amplifier with a programmable compensation capacitor, such as can be used for compensating first transconductance stage of an operational amplifier circuit that can be used in a TIA configuration. This technique is particularly suitable, for example, for an Optical Time Domain Reflectometer (OTDR) application, which can use variable pulsewidth launch pulses. Based on the pulsewidth of such launch pulses, the bandwidth of an operational amplifier of the TIA can be adjusted, such as to decrease the signal and noise bandwidth when relatively wider pulses are to be used, to improve the noise performance for such wider pulses, and to increase the signal and noise bandwidth when relatively narrower pulses are to be used.Type: GrantFiled: August 4, 2017Date of Patent: March 5, 2019Assignee: Analog Devices, Inc.Inventors: Zoltan Frasch, Mahmoud Belaid
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Patent number: 10224951Abstract: A continuous-time sigma delta modulator circuit includes a scaling circuit that scales an input analog signal by a selectable range of different scaling factors in order to change a range of signal levels of the input analog signal to a desired range of signal levels in a scaled analog signal prior to conversion of the scaled analog signal to a digital signal. The scaling factor is selected based on the range of signal levels of the input analog signal in order to provide signal levels of the scaled signal within a desired range. The scaling circuit maintains current flow of the input analog signal at a substantially constant level regardless of the different scaling factors that are used to scale the input analog signal.Type: GrantFiled: September 26, 2016Date of Patent: March 5, 2019Assignee: Analog Devices GlobalInventors: Venkata Aruna Srikanth Nittala, Avinash Gutta