Patents Assigned to Ansys, Inc.
  • Patent number: 10083267
    Abstract: An example circuit includes: a first clock gating circuit coupled between a first latch and a second latch and configured to provide a first gated clock signal based at least in part on an input clock signal. The first latch is configured to be activated in response to the first gated clock signal being at a first logic level to pass a data input. The second latch is configured to be activated in response to the input clock signal being at a second logic level to pass a first selection signal.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: September 25, 2018
    Assignee: Ansys, Inc.
    Inventors: Ajay Singh Bisht, Allen Baker
  • Patent number: 10083264
    Abstract: Systems and methods are provided for modeling physical objects. Volumetric modeling operations are implemented with implicit surfaces on graphics processing units (GPUs) for Finite Element Analyses. For example, a number of implicit surfaces associated with signed distance fields are determined, and locality information associated with the implicit surfaces is obtained. Whether to blend the implicit surfaces is determined based at least in part on the locality information.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: September 25, 2018
    Assignee: Ansys, Inc.
    Inventors: Gunay Orbay, Joseph Tristano, Vince M. Pajerski
  • Patent number: 10068039
    Abstract: Systems and methods are provided for performing a simulation of an integrated circuit, integrated circuit package, or printed circuit board design. A representation of the design is accessed that includes a plurality of components inside a volume. The volume is discretized into a plurality of volumetric elements. A removable signal transmission element is identified in the volume. The signal transmission element is removed from the volume. An electrical parameter associated with the removed signal transmission element is identified. A finite element method operation is performed to identify a characteristic of the design based on the discretized volume having the signal transmission element removed and the electrical parameter, an electrical impact of the signal transmission element on the package being retained based on the electrical parameter.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: September 4, 2018
    Assignee: Ansys, Inc.
    Inventors: Prakash Vennam, Matthew Stephanson
  • Patent number: 10008036
    Abstract: In a system for facilitating mesh generation corresponding to a volumetric, prismatic object, generalized polyhedrons representing at least a portion of a layer of the volumetric object are transformed into a set of convex polyhedrons based on, at least in part, the prismatic properties of the volumetric object. The convex polyhedrons corresponding to a layer are decomposed into a set of tetrahedrons by accounting for an intersecting and/or overlapping edge of a polyhedron in an adjacent layer, so that the set of tetrahedrons automatically, i.e., without having to enforce any continuity requirements after tetrahedron generation, forms a mesh of that is continuous with tetrahedrons corresponding to the adjacent layer.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: June 26, 2018
    Assignee: Ansys, Inc.
    Inventor: Ravi Sundaram
  • Patent number: 10002164
    Abstract: Systems and methods are provided for providing a context-based search of simulation objects. A computer-readable medium configured for storage of objects and records associated with the objects is accessed, where the objects include a plurality of simulation objects and one or more container objects, where a container object is associated with a context of the engineering simulation, where a record associated its associated container record identifies one or more simulation objects that are associated with the container object. A graphical user interface is provided for display. The graphical user interface includes a first control for identifying a context of the simulation for search and a second control for identifying an object parameter for search. A container object is identified based on the identified context. Object parameters of the simulation objects associated with the identified container object are searched using the identified object parameter to identify matching simulation objects.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: June 19, 2018
    Assignee: Ansys, Inc.
    Inventors: Glyn Jarvis, Tom Shadle
  • Patent number: 9984190
    Abstract: Systems and methods are provided for determining parameters of a power MOSFET model. First data related to characteristics of a semiconductor device in a steady-state operation and second data related to transient-response characteristics of the device are received. Variables of one or more functions are fit to the first data to determine static parameters of a power MOSFET model. A computer simulation is executed to determine transient-response characteristics of the model as configured with a current set of dynamic parameters, where the simulation generates a set of values indicative of the model's transient-response characteristics. An error value indicating a difference between the set of values and the second data is determined. Based on a determination that the error value is greater than the threshold, values of the current set of dynamic parameters are adjusted based on the error value and results of computer simulations.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: May 29, 2018
    Assignee: Ansys, Inc.
    Inventors: Joachim Aurich, Shimeng Huang, Sameer Kher, Torsten Fichtner
  • Patent number: 9892227
    Abstract: Systems, methods and storage media are provided for clock tree power estimation at register transfer level. For example, a physical power model is generated based at least in part on a reference post-layout design. A clock tree is modeled at register transfer level based at least in part on the physical power model. Power estimation is performed for the modeled clock tree at the register transfer level.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: February 13, 2018
    Assignee: Ansys, Inc.
    Inventor: Ajay Singh Bisht
  • Patent number: 9824493
    Abstract: Systems and methods are provided for quadrilateral mesh generation. The system includes one or more data processors and a non-transitory computer-readable storage medium. The data processors are configured to: receive a geometric structure representing a physical object; determine a directional field; determine a size field; select one or more locations from a region of the geometric structure, the locations being associated with local data; and generate one or more quadrilateral mesh elements based at least in part on the directional field, the size field, and the local data. The non-transitory computer-readable storage medium is configured to store data related to the structure, data related to the directional field, data related to the size field, and the local data.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: November 21, 2017
    Assignee: Ansys, Inc.
    Inventors: James Chen, Wa Kwok, Gunay Orbay, Bertrand Pellenard, Shailendra Rawat, Joseph Tristano
  • Patent number: 9715567
    Abstract: Systems and methods are provided for generating an equivalent circuit model. RLGC parameters representing a segment of a layered structure of a specified length are received. The layered structure includes two conductors (also called planes) and at least one trace or a transmission line located between the two conductors. An admittance matrix corresponding to the segment is computed based at least in part on the received RLGC parameters. One or more loading parameters representing a loading of one of the two conductors due to the trace or traces are also computed, and a segment circuit model for the segment of the layered structure based at least in part on the admittance matrix and the one or more loading parameters.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: July 25, 2017
    Assignee: Ansys, Inc.
    Inventors: Xin Xu, J. E. Bracken, Werner Thiel
  • Patent number: 9715570
    Abstract: Systems and methods are provided for analyzing a via. A physical representation of a via intersecting with an upper layer and a lower layer is received, the physical representation comprising: (i) a pair of pad dimensions comprising an upper pad dimension a1 and a lower pad dimension a2, and/or (ii) a pair of anti-pad dimensions comprising an upper anti-pad dimension b1 and a lower anti-pad dimension b2, where at least one of first and second conditions: (A) the first condition being a1 is different than a2, and (B) the second condition being b1 is different than b2, is true. A determination is made as to which, if any, of the conditions are true. At least one model parameter is selected based on the determination. An admittance parameter corresponding to a section of the via located between the upper and lower layers is computed using the selected model parameter.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: July 25, 2017
    Assignee: Ansys, Inc.
    Inventors: Guangran Zhu, Werner Thiel, J. E. Bracken
  • Patent number: 9715571
    Abstract: Systems and methods are provided for simulations of printed circuit boards (PCBs). Geometry data related to a PCB is determined from layout data associated with the PCB. A finite element mesh is generated based at least in part on the geometry data related to the PCB, the finite element mesh including one or more mesh components. One or more conductors passing through the one or more mesh components are identified. A volume fraction of the one or more conductors within the one or more mesh components is computed. One or more physical properties of the one or more mesh components are adjusted based at least in part on the volume fraction.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: July 25, 2017
    Assignee: Ansys, Inc.
    Inventors: Rajiv Lochan Rath, Vamsi Krishna Yaddanapudi, Ankit Adhiya
  • Publication number: 20150032420
    Abstract: A processor-implemented system is provided for creating an engineering model for analyzing a physical object. One or more model operations are performed based at least in part on a computer-assisted-design (CAD) model. An engineering model is generated based at least in part on a mapping data structure that associates the CAD model with the engineering model.
    Type: Application
    Filed: April 11, 2014
    Publication date: January 29, 2015
    Applicant: ANSYS, Inc.
    Inventors: Joseph Tristano, Steven R. Elias, Udo Tremel, Glyn Jarvis, Vivek J. Joshi, Harsh Vardhan, John Svitek
  • Patent number: 6010663
    Abstract: An assaying device and a method of manufacturing same are provided. The assaying device includes a unitary, absorbent membrane having multiple reagent stripes incorporated therein. The reagent stripes display an observable reaction if a sample component is present in a fluid sample being tested. The reagent stripes are deposited simultaneously on a continuous membrane ribbon and individual membranes are die cut therefrom. Each individual membrane includes commonly connected channels having die cut slots therebetween. The channels are preferably disposed perpendicularly with respect to the reagent stripes and provide means for causing contact between the fluid and reagent stripes. The present invention preferably includes a cassette for containing the membrane and for facilitating analysis of test results.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: January 4, 2000
    Assignee: Ansys, Inc.
    Inventor: Steven S. Bachand
  • Patent number: 5906796
    Abstract: A solid phase extraction plate includes a unitary tray having a plurality of spaced-apart discrete upstanding chambers molded therein with each chamber having a top opening and a bottom nozzle with downwardly tapering sidewalls extending between the top opening and the bottom nozzle. A plurality of solid phase extraction disks are provided and one secured in each of the plurality of chambers without the use of frits or retainer rings utilizing instead tapered sidewalls of the chamber for enabling a press fit of the disks therein.
    Type: Grant
    Filed: August 4, 1997
    Date of Patent: May 25, 1999
    Assignee: Ansys, Inc.
    Inventors: Dennis D. Blevins, Stephen K. Schultheis