Abstract: Example systems and methods are disclosed for estimating wire capacitance in an RTL circuit design. In an embodiment, a reference post-layout design is received from a non-transitory storage medium, and gate-level nets within the reference post-layout design are classified as either long nets or short nets based, at least in part, on an average fanout length within the gate-level net. A parasitic model may be generated for each of the gate-level nets, and the gate-level nets and associated parasitic models may be stored within either a long net database or a short net database based on the classification of the gate-level net. A net from the RTL circuit design may be classified as either long or short based, at least in part, on a number of modules crossed by one or more fanouts within the net. If the net from the RTL circuit design is classified as long, then capacitance for the net may be estimated using a parasitic model selected from the long net database.

Abstract: Systems and methods are provided herein for remedying edge and/or face defects of a geometric model. The geometric model of a physical object is received for modeling. The geometric model includes model edges. Each edge is segmented into segments according to a grid having cells overlaid onto the geometric model. A respective centroid of each respective cell is having a segmented edge within the respective cell is determined. A current cell adjacent to an adjacent cell in the grid is identified. The current cell has a segmented edge. A centroid of the current cell is connected with a centroid of the adjacent cell to generate a refined segmented edge. The refined segment is projected onto a corresponding model edge to generate a projected edge. A refined model having one or more projected edges is provided to a graphical user interface for further model characterization of the physical object.

Abstract: Example systems and methods are disclosed for estimating power consumption by a clock tree in a register-transfer level (RTL) circuit design based on a previously generated reference gate-level circuit design. A plurality of regions within the clock tree structure of the reference gate-level circuit design are identified, where the plurality of regions are demarcated by one or more clock gating structures. A region-based clock model is generated that includes at least one clock constraint model for each identified region. The region-based clock model is used to synthesize the clock tree in the RTL circuit design for estimating power consumption.

Abstract: Systems and methods are provided for simulating an integrated circuit system. A file representative of an integrated circuit design is received, the integrated circuit design including a plurality of cells and characteristics of power supply and ground paths to each cell. A vulnerable cell of the integrated circuit design based on a vulnerability metric of the vulnerable cell. A power analysis of a portion of the integrated circuit design is performed to determine a plurality of power and ground levels within a timing window for each of a plurality of cells including the vulnerable cell. A timing analysis of the vulnerable cell is performed, where the timing analysis receives a single power level and single ground level for the vulnerable cell and determines a slack level for the vulnerable cell. An at risk path is identified based on the vulnerable cell slack level, and a dynamic power/ground simulation of one or more cells in the at risk path is performed.

Abstract: Systems and methods are provided for analyzing magnetic hysteresis of anisotropic magnetic materials. Magnetic hysteresis loops associated with a local coordinate of a coordinated system based on a magnetic field successively applied to each principal axis with an isotropic vector play model are determined. A relaxation factor associated with the convergence behaviors of estimated solution points is applied along with a correction, either a magnetic field correction or a flux density correction, to determine target points on magnetic hysteresis loops. An error between magnetic hysteresis loops and the estimated solution points is determined. The iteration process continues up to a preset number of iterations with alternating correction schemes based on the determined error.

Abstract: Systems and methods are provided for generating a tetrahedral mesh representation of a volumetric object. A triangular surface mesh is received that defines a volumetric region. In response to the receiving, a root box is divided into a plurality of partitions with subdivision planes separating adjacent partitions, the triangular surface mesh enclosed within the root box. The plurality of partitions are assigned to different ones of a plurality of mesh processors. A tetrahedral mesh is generated within each of the plurality of partitions. Tetrahedrals that intersect the subdivision planes separating adjacent partitions are deleted to define gap regions, and a conformal tetrahedral mesh representation of the volumetric object is generated, wherein each of the gap regions is filled with an additional tetrahedral mesh.

Abstract: Computer-implemented systems and methods are provided for modeling a charge pump. A relationship between an output voltage of the charge pump and a loading condition is determined. A frequency-domain analysis is performed at multiple frequencies to determine an impedance function representative of the charge pump's impedance at each of the multiple frequencies. A vector-fitting algorithm is applied to approximate the impedance function using a plurality of poles and residues. A circuit is synthesized based on the plurality of poles and residues. A model for the charge pump is generated, where the model includes the synthesized circuit and components that model the relationship between the output voltage and the loading condition.

Abstract: Systems and methods are provided for simulating quantile behavior of a physical system. A plurality of parameter samples to a physical system are accessed and a subset of the parameter samples are identified, each of the plurality of parameter samples including a variation of parameters for the physical system. The physical system is simulated based on the subset of the parameter samples to generate simulation results, each of the subset of the parameter samples corresponding to a respective one of the simulation results. A neural network is trained to predict the simulation results based on the subset of the parameter samples.

Abstract: Systems and methods are provided for the refining and coarsening of a polyhedra mesh. The refinement includes identifying a plurality of polyhedral cells within a polyhedra mesh. A plurality of parent faces having a plurality of parent face edges are extracted for each polyhedral cell within the polyhedra mesh. For each parent face, a plurality of nodes are defined and connected either isotropically or anisotropically. A plurality of non-overlapping child faces are generated with a perimeter defined by a combination of parent face edges and child face edges. A plurality of child cells are generated from the connection of child faces of the plurality of non-overlapping child faces. Subsequent coarsening of the plurality of child cells occurs by the simultaneous agglomeration into each respective parent cell.

Abstract: Systems and methods are provided for receiving, by a simulation model, a thermal gradient and a cooling rate associated with a 3D printing material as inputs for the simulation model. The systems and methods further include generating, by the simulation model executed by a processing system, characteristics associated with the 3D printing material as outputs of the simulation model based on the thermal gradient and the cooling rate associated with the 3D printing material.

Abstract: Computer-implemented systems and methods for updating a polygonal mesh representation of a model are provided. A model comprises a set of topologies, and a meshing state is maintained for each topology of the set of topologies. The meshing state indicates, for a given topology, whether a polygonal mesh exists and is valid. A change made to the model is determined, where the change comprises a modification to a geometry of the model or a modification to mesh settings of a polygonal mesh representation of the model. One or more topologies of the set of topologies that are affected by the change are determined, and the meshing state for the affected one or more topologies is updated. Based on the one or more updated meshing states, a set of meshing operations needed to bring the polygonal mesh representation of the model up-to-date is determined.

Abstract: Systems and methods are provided for identifying a wire of a plurality of wires to be adjusted to mitigate effects of electromigration. A segment electromigration stress value for each segment of a wire is determined for a wire of a circuit in a circuit design. A wire electromigration stress value for the wire is determined as a function of the segment electromigration stress values of segments of the wire. A ranked list of two or more wires of the circuit is displayed according the wire electromigration stress values of the two or more wires.

Abstract: Computer-implemented systems and methods for preparing a virtual three-dimensional (3D) object for 3D printing are provided. A hollowed-out representation of an input model is generated. The input model defines a solid virtual 3D object, and the hollowed-out representation comprises a shell and an internal volume that is a void. The internal volume is meshed to generate a polygonal mesh representation of the internal volume. A lattice microstructure corresponding to the polygonal mesh representation is generated by (i) replacing each edge of the polygonal mesh representation with a solid part, and (ii) uniting the solid parts to form the lattice microstructure. A lightweight representation of the input model is generated, where the lightweight representation comprises the shell and the lattice microstructure.

Abstract: Systems and methods are provided for simulating high-cycle fatigue of a rotating component. A first three-dimensional geometric representation of a rotating component is received, where the first three-dimensional geometric representation is indicative of the rotating component during operation. A three-dimensional fluid flow metric is computed at points of the first three-dimensional geometric representation and stored in a first data structure. A second three-dimensional geometric representation of the rotating component is received, where the second three-dimensional geometric representation is indicative of the rotating component in a still configuration. A static metric is computed at points of the second three-dimensional geometric representation and stored in a second data structure. A combined data structure is populated based on the three-dimensional fluid flow metric from the first data structure and the static metric from the second data structure.

Abstract: Systems and methods are provided for providing real-time interactive design and simulation of a physical system to generate comparisons of varying system configurations under different physical conditions. A display is generated on a graphical user interface that displays a part in a physical system according to characteristic data. An initial simulation of the physical system is executed to determine an initial value for a metric of the initial design. The initial value is displayed on the graphical user interface. A system configuration change is received through a user interface manipulation to a first characteristic of the characteristic data or the environment condition. The simulation of the physical system is recalculated to determine a second value for the metric based on the manipulated first characteristic, the second value for the metric being displayed on the graphical user interface along with initial value in real time relative to the received manipulation.

Abstract: Systems and methods are provided for calculating a power characteristic of an integrated circuit design. For each standard cell of a gate-level netlist, a path length and a set of attributes are computed. For each leaf-level instance of a register-transfer level (RTL) netlist, a path length and a set of attributes are computed. The standard cells are partitioned into first subsets, each of the first subsets containing standard cells with a same path length and a same set of attributes. For each first subset, a relative percentage for each type of standard cell included in the first subset is calculated. The leaf-level instances are partitioned into second subsets. For each pair of corresponding first and second subsets, standard cells are associated with the leaf-level instances of the second subset based on the relative percentages. A power characteristic of the RTL netlist is calculated based on the associated standard cells.

Abstract: Computer-implemented systems and methods for modeling low-dropout (LDO) regulators and charge pumps are provided. A relationship between an output voltage of an LDO regulator or charge pump and a loading condition is determined. A frequency-domain analysis is performed at multiple frequencies to determine an impedance function representative of an impedance of the LDO regulator or charge pump at each of the multiple frequencies. A vector-fitting algorithm is applied to approximate the impedance function using a plurality of poles and residues. A circuit is synthesized based on the plurality of poles and residues. A model for the LDO regulator or charge pump is generated, where the model includes the synthesized circuit and components that model the relationship between the output voltage and the loading condition.

Abstract: Data is received that characterizes an integrated circuit and which includes a plurality of Standard Test Interface Language (STIL) codes and at least one file defining physical and/or logical parameters of the integrated circuit. Thereafter, using the received data, a power integrity analysis of the integrated circuit is performed to estimate power induced noise in a double glitch capture mode. Data is then provided that characterizes the performed double glitch capture mode power integrity analysis of the integrated circuit. Related apparatus, systems, techniques and articles are also described.

Abstract: Systems and methods are provided for reducing processing time of an automated engineering design. A repository of engineering design rule violations and corresponding waiver decisions regarding the design rule violations is accessed. A clustering operation is performed on violations in the repository to form clusters of violations based on one or more characteristics of the violations. Waiver decisions associated with violations in each cluster are evaluated to assign a risk level to each cluster. A plurality of detected engineering design rule violations associated with an engineering design are identified. Each of the detected violations is iterated through to determine which cluster that detected violation belongs. Detected violations associated with low risk clusters are automatically to approve the engineering design.

Abstract: Data is received that characterizes a chip in the package system (CPS) having a plurality of wires and vias. Thereafter, using the received data, a chip power calculation is performed. The chip power calculated is used to generate a thermal-aware power map. Further, package and system level thermal analysis is performed using the power map to generate a tile-based CPS thermal profile. A plurality of chip finite element sub-models are then generated that each correspond to a different tile. A thermal field solution is solved for each sub-model so that, for each wire, wire temperature rises are extracted from the corresponding the chip sub-model analysis and combined with temperature values from the CPS thermal profile. This extracting and combining is then used to generate a back-annotation file covering each metal wire and via in the CPS.