Abstract: Disclosed are approaches for wordline contact formation for 3D NAND devices. Methods may include providing a film stack of alternating first layers and second layers, forming a first lithography mask over the film stack, and performing a first series of alternating lithography and etch processes to form an array of contact opening pairs in the film stack, wherein an opening through the first lithography mask is expanded in a first direction following each etch process, and wherein a depth of the array of contact opening pairs varies in the first direction. The method may further include forming a second lithography mask over the film stack, and performing a second series of alternating lithography and etch processes, wherein an opening through the second lithography mask is expanded in a second direction following each etch process, and wherein the depth of the array of contact opening pairs varies in the second direction.

Abstract: A method for manufacturing a memory device includes depositing a seed layer in a memory hole extending through a memory stack. The seed layer includes particles, such as silicon particles. The seed layer is etched to produce etched particles. The etched particles act as nuclei for the growth of a crystalline channel material in the memory hole.

Abstract: Methods of manufacturing electronic devices are described. Embodiments of the present disclosure advantageously provide methods of manufacturing electronic devices that meet reduced thickness, reduced leakage, lower thermal budget, and Vt requirements (including multi-Vt), and have improved device performance and reliability. The method comprises forming a P-dipole stack and an N-dipole stack on a semiconductor substrate by: depositing an interfacial layer (e.g., silicon oxide (SiOx)) on the top surface of the channel; depositing a hafnium-containing layer comprising hafnium oxide (HfOx) and having a thickness of less than or equal to 5 ? on the interfacial layer; and depositing a dipole layer comprising lanthanum nitride (LaN) on the hafnium-containing layer.

Abstract: Semiconductor processing methods are described for forming low-? dielectric materials. The methods may include providing deposition precursors to a processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-carbon-and-hydrogen-containing precursor. A substrate may be disposed within the processing region. The methods may include forming plasma effluents of the deposition precursors. The methods may include depositing a layer of silicon-containing material on the substrate. The layer of silicon-containing material may be characterized by a dielectric constant of less than or about 4.0.

Abstract: Exemplary semiconductor structures may include a substrate. The structures may include a first layer of silicon-and-oxygen-containing material overlying the substrate. The structures may include a second layer of silicon-and-oxygen-containing material. The structures may include a first layer of metal-and-oxygen-containing material between the first layer of silicon-and-oxygen-containing material and the second layer of silicon-and-oxygen-containing material. The first layer of metal-and-oxygen-containing material may include a first metal. The structures may include a second layer of metal-and-oxygen-containing material disposed within the first layer of metal-and-oxygen-containing material. The second layer of metal-and-oxygen-containing material may include a second metal. The structures may include a gate disposed within the second layer of metal-and-oxygen-containing material.

Abstract: Disclosed are approaches for wordline contact formation for 3D NAND devices. Methods may include providing a film stack of alternating first layers and second layers, forming a first lithography mask over the film stack, and performing a first series of alternating lithography and etch processes to form an array of contact opening pairs in the film stack, wherein an opening through the first lithography mask is expanded in a first direction following each etch process, and wherein a depth of the array of contact opening pairs varies in the first direction. The method may further include forming a second lithography mask over the film stack, and performing a second series of alternating lithography and etch processes, wherein an opening through the second lithography mask is expanded in a second direction following each etch process, and wherein the depth of the array of contact opening pairs varies in the second direction.

Abstract: Processing chambers and methods of use comprising a plurality of processing regions bounded around an outer peripheral edge by one or more vacuum channel. A first processing region has a first vacuum channel with a first outer diameter and a second processing region has a second vacuum channel with a second outer diameter, the first outer diameter being less than the second outer diameter.

Abstract: Methods for depositing an amorphous carbon layer on a substrate and for filling a substrate feature with an amorphous carbon gap fill are described. The method comprises performing a deposition cycle comprising: introducing a hydrocarbon source into a processing chamber; introducing a plasma initiating gas into the processing chamber; generating a plasma in the processing chamber at a temperature of greater than 600° C.; forming an amorphous carbon layer on a substrate with a deposition rate of greater than 200 nm/hr; and purging the processing chamber.

Abstract: Embodiments of the present technology may include semiconductor processing methods. The methods may include providing deposition precursors to a processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-containing precursor and a nitrogen-containing precursor. A substrate including one or more materials may be disposed within the processing region. The substrate may be characterized by a first bowing of the substrate. The methods may include generating plasma effluents of the deposition precursors. The methods may include forming a layer of silicon-and-nitrogen-containing material on the substrate. The layer of silicon-and-nitrogen-containing material may be characterized by a tensile stress. Subsequent forming the layer of silicon-and-nitrogen-containing material, the substrate may be characterized by a second bowing of the substrate that is less than the first bowing of the substrate.

Abstract: Methods and apparatus for cleaning a dielectric tube are described. The dielectric tube is exposed to a cleaning gas comprising a fluorine-containing compound and a microwave plasma is generated. The dielectric tube is cleaned to restore transparency and increase electronic coupling between the microwave waveguide and the plasma through the dielectric tube.

Abstract: An system, method and software for controlling processes of an auto-refill system of an ampoule including one or more sensors configured to determine one or more liquid level heights within the ampoule. The auto-refill system having a state machine configured to control the auto-refill system, the state machine having one or more states for refilling the ampoule.

Abstract: Embodiments of the present disclosure generally relate to a method for forming an electrically conductive feature on a substrate. In one embodiment, the method includes forming a first conductive layer via physical vapor deposition (PVD) in an opening of a substrate. The first conductive layer has a thickness of less than 20 angstroms. The method further includes forming a second conductive layer via PVD on the first conductive layer. The first conductive layer and the second conductive layer are formed at a temperature of less than 50° C. The method further includes annealing at least a portion of the first conductive layer and the second conductive layer.

Abstract: Methods for depositing metal films using a metal halide and metal organic precursors are described. The substrate is exposed to a first metal precursor and a second metal precursor to form the metal film. The exposures can be sequential or simultaneous. The metal films are relatively pure with a low carbon content.

Abstract: A membrane for a CMP carrier head includes a circular lower portion that provides a substrate mounting surface for a central region of a substrate, a first plurality of flaps that extend upward from the circular lower portion to form a plurality of inner chambers, an annular upper portion that provides a lower surface for applying pressure to an annular outer region of the substrate, and a second plurality of flaps that extend upward from the annular upper portion to form a plurality of independently pressurizable outer chambers. The annular upper portion surrounds the circular lower portion and is vertically offset from the circular lower portion such that the lower surface is positioned above a plane defined by the circular lower portion, and the annular upper portion is coupled to an outermost flap of the first plurality of flaps.

Abstract: Disclosed herein are a substrate sorter, an inspection and sorting system having the substrate sorter, and a method for the inspection and sorting system. The substrate sorter includes an annular gripper comprising a rotator and a plurality of vacuum applicators concyclically disposed around an axis, a carrier operable to move a substrate towards the rotator and into a loading region below the rotator, and an actuator coupled with the annular gripper and operable to rotate the rotator about the axis relative to the plurality of vacuum applicators while one or more of the plurality of vacuum applicators hold the substrate against the rotator.

Abstract: A method includes receiving first sensor data associated with a first iteration of a first recipe operation of a substrate processing recipe. The method further includes determining disturbance data, the disturbance data being a difference between the first sensor data and first setpoint data of the first recipe operation. The method further includes determining, based at least in part on the disturbance data, a first actuation value associated with one or more components of a processing chamber. Actuation of the one or more components according to the first actuation value compensates for the disturbance data. The method further includes causing the actuation of the one or more components based on the first actuation value during a subsequent iteration of the first recipe operation of the substrate processing recipe to compensate for the disturbance data.

Abstract: An apparatus with a grating structure and a method for forming the same are disclosed. The grating structure includes forming a recess in a grating layer. A plurality of channels is formed in the grating layer to define slanted grating structures therein. The recess and the slanted grating structures are formed using a selective etch process.

Abstract: A method includes receiving historical time-series data and generating training data comprising a plurality of randomized data points associated with the historical time-series data. The historical time-series data was generated by one or more sensors during one or more processes. The method further includes training a logistic regression classifier based on the training data to generate a trained logistic regression classifier. The trained logistic regression classifier is associated with a logistic regression that indicates a location of a transition pattern from a first data point to a second data point. The transition pattern reflects about a reflection point located on the transition pattern. The trained logistic regression classifier is capable of indicating a probability that new time-series data generated during a new execution of the one or more processes matches the historical time-series data.

Abstract: A method includes measuring a subset of property values within a manufacturing chamber during a process performed on a substrate within the manufacturing chamber. The method further includes determining property values in the manufacturing chamber at locations removed from the locations the measurements are taken. The method further includes performing a corrective action based on the determined properties.

Abstract: Methods of enhancing selective deposition are described. In some embodiments, a blocking layer is deposited on a metal surface before deposition of a dielectric. In some embodiments, a metal surface is functionalized to enhance or decrease its reactivity.