Patents Assigned to Applied Material
  • Publication number: 20220220607
    Abstract: Molybdenum(0) coordination complexes comprising at least one cycloheptatriene ligand and optionally one or more neutral ligands which coordinate to the metal center by carbon, nitrogen or phosphorous are described. Methods for depositing molybdenum-containing films on a substrate are described. The substrate is exposed to a molybdenum precursor and a reactant to form the molybdenum-containing film (e.g., elemental molybdenum, molybdenum oxide, molybdenum carbide, molybdenum silicide, molybdenum nitride). The exposures can be sequential or simultaneous.
    Type: Application
    Filed: January 12, 2021
    Publication date: July 14, 2022
    Applicants: Applied Materials, Inc., National University of Singapore
    Inventors: Andrea Leoncini, Paul Mehlmann, Nemanja Dordevic, Han Vinh Huynh, Doreen Wei Ying Yong
  • Publication number: 20220223409
    Abstract: Exemplary methods of semiconductor processing may include providing a boron-and-carbon-and-nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include generating a capacitively-coupled plasma of the boron-and-carbon-and-nitrogen-containing precursor. The methods may include forming a boron-and-carbon-and-nitrogen-containing layer on the substrate. The boron-and-carbon-and-nitrogen-containing layer may be characterized by a dielectric constant below or about 3.5.
    Type: Application
    Filed: January 8, 2021
    Publication date: July 14, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
  • Publication number: 20220220138
    Abstract: Molybdenum(IV) and molybdenum(III) coordination complexes are described. Methods for depositing molybdenum-containing films on a substrate are described. The substrate is exposed to a molybdenum precursor and a reactant to form the molybdenum-containing film (e.g., elemental molybdenum, molybdenum oxide, molybdenum carbide, molybdenum silicide, molybdenum nitride). The exposures can be sequential or simultaneous.
    Type: Application
    Filed: January 12, 2021
    Publication date: July 14, 2022
    Applicants: Applied Materials, Inc., National University of Singapore
    Inventors: Andrea Leoncini, Paul Mehlmann, Nemanja Dordevic, Han Vinh Huynh, Doreen Wei Ying Yong
  • Publication number: 20220220136
    Abstract: Dinuclear molybdenum coordination complexes are described. Methods for depositing molybdenum-containing films on a substrate are described. The substrate is exposed to a dinuclear molybdenum precursor and a reactant to form the molybdenum-containing film (e.g., elemental molybdenum, molybdenum oxide, molybdenum carbide, molybdenum silicide, molybdenum nitride). The exposures can be sequential or simultaneous.
    Type: Application
    Filed: January 12, 2021
    Publication date: July 14, 2022
    Applicants: Applied Materials, Inc., National University of Singapore
    Inventors: Andrea Leoncini, Paul Mehlmann, Nemanja Dordevic, Han Vinh Huynh, Doreen Wei Ying Yong
  • Publication number: 20220223416
    Abstract: Disclosed herein are methods for reducing MOSFET trench sidewall surface roughness. In some embodiments, a method includes providing a device structure including a well formed in an epitaxial layer, forming a plurality of trenches through the well and the epitaxial layer, and implanting the device structure to form a treated layer along a sidewall of just an upper portion of the device structure within each of the plurality of trenches. The method may further include etching the device structure to remove the treated layer.
    Type: Application
    Filed: January 13, 2021
    Publication date: July 14, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Qintao Zhang, Wei Zou, Hans-Joachim L. Gossmann
  • Publication number: 20220223402
    Abstract: Processing methods may be performed to form a filled contact hole in a mirror layer of a semiconductor substrate. The method may include forming a contact hole through a mirror layer of the semiconductor substrate by an etch process. The method may include filling the contact hole with a fill material. A portion of the fill material may overlie the mirror layer. The method may also include removing a portion of the fill material external to the contact hole by chemical mechanical polishing landing on the mirror layer.
    Type: Application
    Filed: January 14, 2021
    Publication date: July 14, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Lan Yu, Benjamin D. Briggs, Tyler Sherwood, Raghav Sreenivasan, Joseph Salfelder
  • Publication number: 20220223472
    Abstract: A method for forming conductive structures for a semiconductor device includes depositing a reflow material in features, e.g. vias, formed in a dielectric layer. A high melting point material is deposited in the feature and is reflowed and annealed in an ambient comprising one or more of hydrogen molecules, hydrogen ions, and hydrogen radicals at a temperature greater than 300° C. to fill the feature with a reflow material.
    Type: Application
    Filed: January 11, 2021
    Publication date: July 14, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Yi Luo, Rong Tao, Liqi Wu, Mingte Liu, Joung Joo Lee, Avgerinos V. Gelatos
  • Patent number: 11384838
    Abstract: A seal member includes a bottom portion, a first side wall portion, a second side wall portion, and an outer wall portion. At least one of the first side wall portion and the second side wall portion is provided to be outwardly widened from the bottom portion toward the outer wall portion with respect to a virtual plane perpendicular to an axis. The outer wall portion has a recessed portion recessed toward a bottom portion side, between the first side wall portion and the second side wall portion, and the outer wall portion forms a first lip region in a region including the first side wall portion, and forms a second lip region in a region including the second side wall portion, with the recessed portion being sandwiched therebetween.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Ippei Nakagawa, Nobuhiro Yoshida, Hamid Noorbakhsh
  • Patent number: 11388822
    Abstract: Methods for forming circuit boards and circuit boards using an adhesion layer are described. A substrate with two surfaces is exposed to a bifunctional organic compound to form an adhesion layer on the first substrate surface. A resin layer is then deposited on the adhesion layer and the exposed substrate surfaces. Portions of the resin layer may be removed to expose metal pads for contacts.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Tapash Chakraborty, Steven Verhaverbeke, Han-Wen Chen, Chintan Buch, Prerna Goradia, Giback Park, Kyuil Cho
  • Patent number: 11387085
    Abstract: A physical vapor deposition (PVD) chamber and a method of operation thereof are disclosed. Chambers and methods are described that provide a chamber comprising one or more of contours that reduce particle defects, temperature control and or measurement and and/or voltage particle traps to reduce processing defects.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: July 12, 2022
    Assignee: Applied Materials Inc.
    Inventors: Sanjay Bhat, Vibhu Jindal, Kamatchigobinath Manoharan
  • Patent number: 11384428
    Abstract: Embodiments of the present disclosure generally relate to a method for forming an opening using a mask. In one embodiment, a method includes forming a mask on a feature layer. The method includes forming a first opening in the mask to expose a portion of the feature layer. The method further includes forming a carbon layer on the mask and the exposed portion of the feature layer. The method also includes removing portions of the carbon layer and a portion of the exposed portion of the feature layer in order to form a second opening in the feature layer.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Mang-Mang Ling, Thomas Kwon, Jong Mun Kim, Chentsau Chris Ying
  • Patent number: 11387073
    Abstract: A system and method that is capable of measuring the incident angle of an ion beam, especially an ion beam comprising heavier ions, is disclosed. In one embodiment, X-rays, rather than ions, are used to determine the channeling direction. In another embodiment, the workpiece is constructed, at least in part, of a material having a high molecular weight such that heaver ion beams can be measured. Further, in another embodiment, the parameters of the ion beam are measured across an entirety of the beam, allowing components of the ion implantation system to be further tuned to create a more uniform beam.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Frank Sinclair, Jonathan Gerald England, Joseph C. Olson
  • Patent number: 11385536
    Abstract: An extreme ultraviolet reflective element comprising a multilayer stack of absorber layers on a multilayer stack of reflective layers. The element comprises spacing layer and phase tuning layer. Methods of manufacturing extreme ultraviolet reflective elements and lithography systems including extreme ultraviolet reflective elements are also described.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Wen Xiao, Vibhu Jindal
  • Patent number: 11387122
    Abstract: Embodiments disclosed herein include a sensor wafer. In an embodiment, the sensor wafer comprises a substrate, wherein the substrate comprises a first surface, a second surface opposite the first surface, and an edge surface between the first surface and the second surface. In an embodiment, the sensor wafer further comprises a plurality of sensor regions formed along the edge surface, wherein each sensor region comprises a self-referencing capacitive sensor.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Charles Potter, Eli Mor
  • Patent number: 11388810
    Abstract: An apparatus, system and method. An apparatus may include an RF power assembly, arranged to output an RF signal; a resonator, coupled to receive the RF signal, the resonator comprising a first output end and a second output end, and a drift tube assembly, configured to transmit an ion beam, and coupled to the resonator. As such, the drift tube assembly may include a first AC drift tube electrode, coupled to the first output end, and a second AC drift tube electrode, coupled to the second output end and separated from the first AC drift tube by a first gap. The RF power assembly may be switchable to switch output from a first Eigenmode frequency to a second Eigenmode frequency.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Peter F. Kurunczi, David T. Blahnik, Frank Sinclair
  • Patent number: 11387135
    Abstract: Embodiments of the present disclosure generally relate to a lift pin assembly used for de-chucking substrates. The lift pin assembly includes a base and one or more lift pin holders. Each lift pin holder includes a first portion and a second portion. The first portion is coupled to the base by a metal connector and the second portion is coupled to the first portion by a metal connector. A resistor is disposed in the first portion of the lift pin holder. The second portion includes a lift pin support for supporting a lift pin. The lift pin, the lift pin support, and the metal connectors are electrically conductive. The base is connected to a reference voltage, such as the ground, forming a path for the residual electrostatic charge in the substrate from the substrate to the reference voltage.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Roberto Cesar Cotlear, Michael D. Willwerth
  • Patent number: 11386539
    Abstract: A system and method for specimen examination, the system comprising a processing and memory circuitry (PMC) for: obtaining an image of at least a part of a specimen, the image acquired by an examination tool; receiving one or more characteristics of a defect of interest and a location of interest associated therewith; modifying within the image one or more pixels corresponding to the location of interest, wherein the modification is provided in accordance with a characteristic of the defect of interest, thereby planting the defect of interest into the image; processing the modified image to detect locations of potential defects of the specimen in accordance with a detection recipe; and determining whether the detected locations include the location of interest. Subject to the location of interest not being detected, modifying the detection recipe to enable detecting the planted defect of interest at the location of interest.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: July 12, 2022
    Assignee: Applied Materials Israel Ltd.
    Inventors: Elad Cohen, Yuri Feigin, Lior Katz, Eyal Neistein
  • Patent number: 11385628
    Abstract: A method includes identifying a bottleneck operation of a plurality of operations in a sequence recipe. The plurality of operations are associated with transporting and processing a plurality of substrates in a substrate processing system. The method further includes determining, based on the bottleneck operation, a takt time for the plurality of substrates. The takt time is an amount of time between a first substrate entering the substrate processing system and a second substrate entering the substrate processing system. The method further includes determining a plurality of queue times. Each of the plurality of queue times corresponds to a respective operation of the plurality of operations. The method further includes causing, based on the takt time and the plurality of queue times, the plurality of substrates to be processed by the substrate processing system.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventor: Chongyang Wang
  • Publication number: 20220216058
    Abstract: Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.
    Type: Application
    Filed: January 6, 2021
    Publication date: July 7, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Jialiang Wang, Susmit Singha Roy, Abhijit Basu Mallick, Nitin K. Ingle
  • Publication number: 20220216048
    Abstract: Exemplary methods of forming semiconductor structures may include forming a silicon oxide layer from a silicon-containing precursor and an oxygen-containing precursor. The methods may include forming a silicon nitride layer from a silicon-containing precursor, a nitrogen-containing precursor, and an oxygen-containing precursor. The silicon nitride layer may be characterized by an oxygen concentration greater than or about 5 at. %. The methods may also include repeating the forming a silicon oxide layer and the forming a silicon nitride layer to produce a stack of alternating layers of silicon oxide and silicon nitride.
    Type: Application
    Filed: January 6, 2021
    Publication date: July 7, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Tianyang Li, Deenesh Padhi, Xinhai Han, Hang Yu, Chuan Ying Wang