Patents Assigned to Applied Material
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Publication number: 20210398814Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.Type: ApplicationFiled: June 15, 2021Publication date: December 23, 2021Applicant: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes F. Swenberg
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Publication number: 20210394144Abstract: Apparatus and methods for providing high velocity gas flow showerheads for deposition chambers are described. The showerhead has a faceplate in contact with a backing plate that has a concave portion to provide a plenum between the backing plate and the faceplate. A plurality of thermal elements is within the concave portion of the backing plate and extends to contact the faceplate.Type: ApplicationFiled: September 3, 2021Publication date: December 23, 2021Applicant: Applied Materials, Inc.Inventors: Jared Ahmad Lee, Sanjeev Baluja, Joseph AuBuchon, Dhritiman Subha Kashyap, Michael Rice
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Publication number: 20210398823Abstract: Gas distribution apparatus to provide uniform flows of gases from a single source to multiple processing chambers are described. A valve upstream of a shared volume is controlled by at least two pressurizing sequences during a process it the processing chamber. The first pressurizing sequence opens and closes the upstream valve a first number of cycles and the second pressurizing sequence opens and closes the upstream valve less frequently after the first number of cycles. The open/close timing of the second pressurizing sequence occurs less frequently than the open/close timing of the first pressurizing sequence.Type: ApplicationFiled: June 18, 2020Publication date: December 23, 2021Applicant: Applied Materials, Inc.Inventors: Mauro Cimino, Arkaprava Dan, Paul Z. Wirth
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Publication number: 20210395892Abstract: Process chamber lids, processing chambers and methods using the lids are described. The lid includes a pumping liner with a showerhead, blocker plate and gas funnel positioned therein. A liner heater is positioned on the pumping liner to control temperature in the pumping liner. Gas is flowed into the gas funnel using a dead-volume free one-way valve with a remote plasma source.Type: ApplicationFiled: June 17, 2021Publication date: December 23, 2021Applicant: Applied Materials, Inc.Inventors: Muhannad Mustafa, Muhammad M. Rasheed, Mario D. Sanchez, Srinivas Gandikota, Wei V. Tang
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Publication number: 20210398850Abstract: Methods for pre-cleaning substrates having metal and dielectric surfaces are described. A temperature of a pedestal comprising a cooling feature on which a substrate is located is set to less than or equal to 100° C. The substrate is exposed to a plasma treatment to remove chemical residual and/or impurities from features of the substrate including a metal bottom, dielectric sidewalls, and/or a field of dielectric and/or repair surface defects in the dielectric sidewalls and/or the field of the dielectric. The plasma treatment may be an oxygen plasma, for example, a direct oxygen plasma. Processing tools and computer readable media for practicing the method are also described.Type: ApplicationFiled: June 22, 2020Publication date: December 23, 2021Applicant: Applied Materials, Inc.Inventors: Yi Xu, Yufei Hu, Kazuya Daito, Geraldine M. Vasquez, Da He, Jallepally Ravi, Yu Lei, Dien-Yeh Wu
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Patent number: 11205119Abstract: There are provided system and method of examining a semiconductor specimen. The method comprises: upon obtaining a Deep Neural Network (DNN) trained for a given examination-related application within a semiconductor fabrication process, processing together one or more fabrication process (FP) images using the obtained trained DNN, wherein the DNN is trained using a training set comprising ground truth data specific for the given application; and obtaining examination-related data specific for the given application and characterizing at least one of the processed one or more FP images. The examination-related application can be, for example, classifying at least one defect presented by at least one FP image, segmenting the at least one FP image, detecting defects in the specimen presented by the at least one FP image, registering between at least two FP images, regression application enabling reconstructing the at least one FP image in correspondence with different examination modality, etc.Type: GrantFiled: December 19, 2016Date of Patent: December 21, 2021Assignee: Applied Materials Israel Ltd.Inventors: Leonid Karlinsky, Boaz Cohen, Idan Kaizerman, Efrat Rosenman, Amit Batikoff, Daniel Ravid, Moshe Rosenweig
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Patent number: 11203816Abstract: Exemplary methods of electroplating may include delivering a current from a power supply through a plating bath of an electroplating chamber for a first period of time. The current delivered may be or include a pulsed current at a duty cycle of less than or about 50%. The methods may include plating a first amount of metal on a substrate within the plating bath. The substrate may define a via within the substrate. The methods may include, subsequent the first period of time, transitioning the power supply to a continuous DC current delivery for a second period of time. The methods may include plating a second amount of metal on the substrate.Type: GrantFiled: October 23, 2020Date of Patent: December 21, 2021Assignee: Applied Materials, Inc.Inventors: Marvin L. Bernt, James C. Burnham, Robert Mikkola
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Patent number: 11205978Abstract: Embodiments of the present disclosure generally relate to substrate support assemblies for retaining a surface of a substrate having one or more devices disposed on the surface without contacting the one or more devices and deforming the substrate, and a system having the same. In one embodiment, the substrate support assembly includes an edge ring coupled to a body of the substrate support assembly. A controller is coupled to actuated mechanisms of a plurality of pixels coupled to the body of the substrate support assembly such that portions of pixels corresponding to a portion of the surface of a substrate to be retained are positioned to support the portion without contacting one or more devices disposed on the surface of the substrate to be retained on the support surface.Type: GrantFiled: December 13, 2019Date of Patent: December 21, 2021Assignee: Applied Materials, Inc.Inventors: Wayne McMillan, Visweswaren Sivaramakrishnan, Joseph C. Olson, Ludovic Godet, Rutger Meyer Timmerman Thijssen, Naamah Argaman
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Patent number: 11205593Abstract: Disclosed are approaches for forming finFET devices having asymmetric fins achieved via fin trimming. In some embodiments, a method may include providing a substrate within a process chamber, the substrate including a plurality of fins, and forming a capping layer over the plurality of fins, wherein the capping layer extends along a first sidewall and a second sidewall of each of the plurality of fins. The method may further include removing a portion of the capping layer to expose a target area of the first sidewall of each of the plurality of fins, and trimming the target area of the first sidewall of each of the plurality of fins to reduce a lateral width of an upper section of each of the plurality of fins.Type: GrantFiled: May 20, 2020Date of Patent: December 21, 2021Assignee: Applied Materials, Inc.Inventors: Min Gyu Sung, Johannes M. van Meer
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Patent number: 11203153Abstract: A powder bin for an additive manufacturing apparatus has a plurality of walls forming an annular body to surround a build plate. The plurality of walls include an annular outer wall and an annular inner wall that are separated by a cavity, and a gap between a top edge of the inner wall and a top edge of the outer wall is configured to receive powder between the top edges of the outer walls and the inner walls. The annular body has an aperture that extends laterally through the inner wall and outer wall. A base is connected to a bottom edge of the outer wall and a bottom edge of the inner wall, and the base includes one or more ports. A sloped barrier is positioned in the cavity configured to direct powder around the aperture to the one or more ports in the base.Type: GrantFiled: October 15, 2019Date of Patent: December 21, 2021Assignee: Applied Materials, Inc.Inventors: Erez Shmuel, Mahendran Chidambaram
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Publication number: 20210391155Abstract: A processing system may include a plasma chamber operable to generate a plasma, and an extraction assembly, arranged along a side of the plasma chamber. The extraction assembly may include an extraction plate including an extraction aperture, the extraction plate having a non-planar shape, and generating an extracted ion beam at a high angle of incidence with respect to a perpendicular to a plane of a substrate, when the plane of the substrate is arranged parallel to the side of the plasma chamber.Type: ApplicationFiled: January 27, 2021Publication date: December 16, 2021Applicant: Applied Materials, Inc.Inventors: Christopher Campbell, Costel Biloiu, Peter F. Kurunczi, Jay R. Wallace, Kevin M. Daniels, Kevin T. Ryan, Minab B. Teferi, Frank Sinclair, Joseph C. Olson
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Publication number: 20210391176Abstract: Embodiments of the disclosure relate to methods for enlarging the opening width of substrate features by reducing the overhang of deposited films. Some embodiments of the disclosure utilize a highly energetic bias pulse to etch the deposited film near the opening of the substrate feature. Some embodiments of the disclosure etch the deposited film without damaging the underlying substrate.Type: ApplicationFiled: June 16, 2020Publication date: December 16, 2021Applicant: Applied Materials, Inc.Inventors: Bencherki Mebarki, Komal S. Garde, Kishor Kalathiparambil, Joung Joo Lee, Xianmin Tang
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Publication number: 20210388499Abstract: Methods for plasma enhanced atomic layer deposition (PEALD) of low-K films are described. A method of depositing a film comprises exposing a substrate to a silicon precursor having the general formula (I) wherein R1, R2, R3, R4, R5, and R6 are independently selected from hydrogen (H), substituted alkyl, or unsubstituted alkyl; purging the processing chamber of the silicon precursor; exposing the substrate to a carbon monoxide (CO) plasma to form one or more of a silicon oxycarbide (SiOC) or silicon oxycarbonitride (SiOCN) film on the substrate; and purging the processing chamber.Type: ApplicationFiled: June 10, 2020Publication date: December 16, 2021Applicant: Applied Materials, Inc.Inventors: Shuaidi Zhang, Ning Li, Mihaela Balseanu
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Publication number: 20210391215Abstract: Apparatuses and methods to provide fully self-aligned first metallization lines, M1, via, and second metallization lines, M2, are described. A first metallization line comprises a set of first conductive lines extending along a first direction on a first insulating layer on a substrate; a second metallization line comprising a set of second conductive lines on an etch stop layer above the first metallization line, the set of second conductive lines extending along a second direction that crosses the first direction at an angle; and at least one via between the first metallization line and the second metallization line, the at least one via comprising a via metallization layer, wherein the at least one via is self-aligned along the second direction to one of the first metallization lines and the at least one via is self-aligned along the first direction to one of the second metallization lines, the second direction crossing the first direction at an angle.Type: ApplicationFiled: June 1, 2021Publication date: December 16, 2021Applicant: Applied Materials, Inc.Inventors: Lili Feng, Yuqiong Dai, Madhur Sachan, Regina Freed, Ho-yung David Hwang
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Publication number: 20210388495Abstract: Exemplary semiconductor processing chambers may include a chamber body including sidewalls and a base. The chambers may include a substrate support extending through the base of the chamber body. The substrate support may include a support platen configured to support a semiconductor substrate. The substrate support may include a shaft coupled with the support platen. The chambers may include a foreline conduit offset from a center of the base for exhausting a gas from the chamber body, and an exhaust volume coupled to the foreline conduit. The chambers may include a pumping plate comprising a central aperture through which the shaft extends, and further comprising exit apertures for directing at least a portion of the gas from the chamber body to the exhaust volume. The exit apertures may be disposed at locations opposite the foreline conduit so as to reduce nonuniformity in gas flow.Type: ApplicationFiled: June 16, 2020Publication date: December 16, 2021Applicant: Applied Materials, Inc.Inventors: Akshay Gunaji, Mayur Govind Kulkarni
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Publication number: 20210388497Abstract: Methods of depositing thin films for an electronic device, for example a semiconductor device include applying a first pulsed plasma with or without a reactant and a second continuous plasma with a reactant.Type: ApplicationFiled: June 10, 2021Publication date: December 16, 2021Applicant: Applied Materials, Inc.Inventors: Cong Trinh, Maribel Maldonado-Garcia, Mihaela A. Balseanu, Alexander V. Garachtchenko, Tsutomu Tanaka
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Patent number: 11199605Abstract: A first resistivity value and a correlation function relating thickness of a conductive layer having the first resistivity value to a signal from an in-situ monitoring system are stored. A second resistivity value for a conductive layer on a substrate is received. A sequence of signal values that depend on thickness of the conductive layer is received from an in-situ electromagnetic induction monitoring system that monitors the substrate during polishing. A sequence of thickness values is generated based on the sequence of signal values and the correlation function. For at least some thickness values of the sequence of thickness values adjusted thickness values are generated that compensate for variation between the first resistivity value and the second resistivity value to generate a sequence of adjusted thickness values. A polishing endpoint is detected or an adjustment for a polishing parameter is determined based on the sequence of adjusted thickness values.Type: GrantFiled: January 10, 2018Date of Patent: December 14, 2021Assignee: Applied Materials, Inc.Inventors: Kun Xu, Ingemar Carlsson, Shih-Haur Shen, Boguslaw A. Swedek, Tzu-Yu Liu
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Patent number: 11198936Abstract: A multi-component coating composition for a surface of a chamber component comprising at least one first film layer of a yttrium oxide coated onto the surface of the chamber component using an atomic layer deposition process and at least one second film layer of zirconium oxide coated onto the surface of the chamber component using an atomic layer deposition process, wherein the multi-component coating comprises YZrxOy.Type: GrantFiled: December 19, 2017Date of Patent: December 14, 2021Assignee: Applied Materials, Inc.Inventors: David Fenwick, Jennifer Y. Sun
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Patent number: 11198937Abstract: A multi-component coating composition for a surface of a semiconductor process chamber component comprising at least one first film layer of a yttrium oxide or a yttrium fluoride coated onto the surface of the semiconductor process chamber component using an atomic layer deposition process and at least one second film layer of an additional oxide or an additional fluoride coated onto the surface of the semiconductor process chamber component using an atomic layer deposition process, wherein the multi-component coating composition is selected from the group consisting of YOxFy, YxAlyO, YxZryO and YxZryAlzO.Type: GrantFiled: May 14, 2019Date of Patent: December 14, 2021Assignee: Applied Materials, Inc.Inventors: David Fenwick, Jennifer Y. Sun
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Patent number: 11199506Abstract: There is provided a system and method of generating a training set usable for examination of a semiconductor specimen. The method comprises: obtaining a simulation model capable of simulating effect of a physical process on fabrication process (FP) images depending on the values of parameters of the physical process; applying the simulation model to an image to be augmented for the training set and thereby generating one or more augmented images corresponding to one or more different values of the parameters of the physical process; and including the generated one or more augmented images into the training set. The training set can be usable for examination of the specimen using a trained Deep Neural Network, automated defect review, automated defect classification, automated navigation during the examination, automated segmentation of FP images, automated metrology based on FP images and other examination processes that include machine learning.Type: GrantFiled: February 20, 2019Date of Patent: December 14, 2021Assignee: Applied Materials Israel Ltd.Inventors: Ohad Shaubi, Assaf Asbag, Boaz Cohen