Patents Assigned to Applied Material
  • Publication number: 20090272641
    Abstract: In the present invention a sub-stoichiometric ceramic ZnOx:Al target, with 0.3<x<1, is used for depositing a ZnO:Al layer in a reactive sputtering process. The process is carried out in an Ar/O2 atmosphere. The diagram depicts the deposition rate R depending on the oxygen flow in a sputtering process according to the present invention compared with a conventional sputter process using a stoichiometric ZnO target. The upper line x<1 indicates the deposition rate R when using the inventive target and process. The lower line x=1, for comparison only, indicates the deposition rate R when using a stoichiometric ceramic ZnO target. It can be seen from the diagram that both processes are quite stable as there are no steep slopes when varying the oxygen flow. However, the line x<1 is above the line x=1. Therefore, a working point P may be selected which has a higher deposition rate R than a corresponding working point P of a corresponding ceramic target.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 5, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Joachim Mueller, Daniel Severin, Markus Kress
  • Publication number: 20090272492
    Abstract: A gas distribution assembly for the ceiling of a plasma reactor includes a center fed hub and an equal path length distribution gas manifold underlying the center fed hub.
    Type: Application
    Filed: June 20, 2008
    Publication date: November 5, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Dan Katz, David Palagashvili, Brain K. Hatcher, Theodoros Panagopoulos, Valentin N. Todorow, Edward P. Hammond, IV, Alexander M. Paterson, Rodolfo P. Belen
  • Patent number: 7611400
    Abstract: A method and apparatus for monitoring polishing pad conditioning mechanisms is provided. In one embodiment, a semiconductor substrate polishing system includes a rinse station, a polishing surface, a conditioning element, and a conditioning mechanism. The conditioning mechanism selectively positions the conditioning element over the polishing surface and over the rinse station. At least one sensor is provided and is configured to detect a first position and a second position of the conditioning element when disposed over the rinse station.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: November 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Alpay Yilmaz, Lakshmanan Karuppiah
  • Patent number: 7611976
    Abstract: Embodiments of the invention generally provide a method for forming a doped silicon-containing material on a substrate. In one embodiment, the method provides depositing a polycrystalline layer on a dielectric layer and implanting the polycrystalline layer with a dopant to form a doped polycrystalline layer having a dopant concentration within a range from about 1×1019 atoms/cm3 to about 1×1021 atoms/cm3, wherein the doped polycrystalline layer contains silicon or may contain germanium, carbon, or boron. The substrate may be heated to a temperature of about 800° C. or higher, such as about 1,000° C., during the rapid thermal anneal. Subsequently, the doped polycrystalline layer may be exposed to a laser anneal and heated to a temperature of about 1,000° C. or greater, such within a range from about 1,050° C. to about 1,400° C., for about 500 milliseconds or less, such as about 100 milliseconds or less.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: November 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Yi Ma, Khaled Z. Ahmed, Kevin L. Cunningham, Robert C. McIntosh, Abhilash J. Mayur, Haifan Liang, Mark Yam, Toi Yue Becky Leung, Christopher Olsen, Shulin Wang, Majeed Foad, Gary Eugene Miner
  • Patent number: 7611975
    Abstract: An implanter provides two-dimensional scanning of a substrate relative to an implant beam so that the beam draws a raster of scan lines on the substrate. The beam current is measured at turnaround points off the substrate and the current value is used to control the subsequent fast scan speed so as to compensate for the effect of any variation in beam current on dose uniformity in the slow scan direction. The scanning may produce a raster of non-intersecting uniformly spaced parallel scan lines and the spacing between the lines is selected to ensure appropriate dose uniformity.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: November 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Adrian Murrell, Peter Michael Banks, Matthew Peter Dobson, Peter Kindersley, Takao Sakase, Marvin Farley, Shu Satoh, Geoffrey Ryding
  • Patent number: 7611319
    Abstract: In at least one aspect, a system is provided that includes (1) a substrate carrier having first docking features; and (2) a loadport having second docking features. The second docking features are adapted to block docking of substrate carriers that do not include the first docking features and to allow docking of substrate carriers that include the first docking features. Numerous other aspects are provided.
    Type: Grant
    Filed: June 16, 2005
    Date of Patent: November 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Vinay Shah, Martin R. Elliott, Jeffrey C. Hudgens, Eric Andrew Englhardt
  • Patent number: 7612491
    Abstract: A lamp assembly adapted for use in a substrate thermal processing chamber to heat the substrate to temperatures up to at least about 1100° C. is disclosed. In one embodiment, the lamp assembly comprises a bulb enclosing at least one radiation generating filament attached to a pair of leads, a lamp base configured to receive the pair of leads, a sleeve having a wall thickness of at least about 0.013 inches and a potting compound having a thermal conductivity greater than about 100 W/(K-m).
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: November 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Joseph M. Ranish, Khurshed Sorabji
  • Patent number: 7611996
    Abstract: Embodiments in accordance with the present invention relate to multi-stage curing processes for chemical vapor deposited low K materials. In certain embodiments, a combination of electron beam irradiation and thermal exposure steps may be employed to control selective outgassing of porogens incorporated into the film, resulting in the formation of nanopores. In accordance with one specific embodiment, a low K layer resulting from reaction between a silicon-containing component and a non-silicon containing component featuring labile groups, may be cured by the initial application of thermal energy, followed by the application of radiation in the form of an electron beam.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: November 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Francimar Schmitt, Yi Zheng, Kang Sub Yim, Sang H. Ahn, Lester A. D'Cruz, Dustin W. Ho, Alexandros T. Demos, Li-Qun Xia, Derek R. Witty, Hichem M'Saad
  • Patent number: 7611217
    Abstract: Methods and apparatus for inkjet inkjet drop positioning are provided. A first method includes determining an intended deposition location of an ink drop on a substrate, depositing the ink drop on the substrate using an inkjet printing system, detecting a deposited location of the deposited ink drop on the substrate, comparing the deposited location to the intended location, determining a difference between the deposited location and the intended location, and compensating for the difference between the deposited location and the intended location by adjusting a parameter of an inkjet printing system. Numerous other aspects are provided.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: November 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Bassam Shamoun, Janusz Jozwiak, Eugene Mirro, Quanyuan Shang, Shinichi Kurita, John M. White
  • Patent number: 7611990
    Abstract: Embodiments as described herein provide a method for depositing barrier layers and tungsten materials on substrates. In one embodiment, a method for depositing materials is provided which includes forming a barrier layer on a substrate, wherein the barrier layer contains a cobalt silicide layer and a metallic cobalt layer, exposing the barrier layer to a soak gas containing a reducing gas during a soak process, and forming a tungsten material over the barrier layer. In one example, the barrier layer may be formed by depositing a cobalt-containing material on a dielectric surface of the substrate and annealing the substrate to form the cobalt silicide layer from a lower portion of the cobalt-containing material and the metallic cobalt layer from an upper portion of the cobalt-containing material.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: November 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Ki Hwan Yoon, Yonghwa Chris Cha, Sang Ho Yu, Hafiz Farooq Ahmad, Ho Sun Wee
  • Patent number: 7611318
    Abstract: In a first aspect, a first apparatus is provided for use in supporting a substrate carrier. The first apparatus includes an overhead transfer flange adapted to couple to a substrate carrier body and an overhead carrier support. The overhead transfer flange has a first side and a second side opposite the first side that is wider than the first side. Numerous other aspects are provided.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: November 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Michael R. Rice, Martin R. Elliott, Robert B. Lowrance, Jeffrey C. Hudgens, Eric A. Englhardt
  • Publication number: 20090269878
    Abstract: A method of fabricating a detector that involves: forming a trench in a substrate, the substrate having an upper surface; forming a first doped semiconductor layer on the substrate and in the trench; forming a second semiconductor layer on the first doped semiconductor layer and extending into the trench, the second semiconductor layer having a conductivity that is less than the conductivity of the first doped semiconductor layer; forming a third doped semiconductor layer on the second semiconductor layer and extending into the trench; removing portions of the first, second and third layers that are above a plane defined by the surface of the substrate to produce an upper, substantially planar surface and expose an upper end of the first doped semiconductor layer in the trench; forming a first electrical contact to the first semiconductor doped layer; and forming a second electrical contact to the third semiconductor doped layer.
    Type: Application
    Filed: April 8, 2009
    Publication date: October 29, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Francisco A. Leon, Lawrence C. West, Yuichi Wada, Gregory L. Wojcik, Stephen Moffatt
  • Publication number: 20090269930
    Abstract: A thermal anneal process for preventing formation of certain BPSG surface defects following an etch or silicon clean step using a fluorine and hydrogen chemistry. The thermal anneal process is carried out while protecting the wafer from moisture, by heating the wafer to a sufficiently high temperature for a sufficient duration of time to thermally diffuse boron and/or phosphorus materials separated from silicon near the surface of the doped glass layer into the bulk of the layer. The thermal anneal process is completed by cooling the wafer to a sufficiently low temperature to fix the distribution of the boron and/or phosphorus materials in bulk of the doped glass layer.
    Type: Application
    Filed: July 15, 2008
    Publication date: October 29, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Haichun Yang, Chien-Teh Kao, Xinliang Lu, Mei Chang
  • Publication number: 20090269922
    Abstract: We disclose a method of depositing a metal seed layer on a wafer substrate comprising a plurality of recessed device features. The method comprises depositing a first portion of the metal seed layer on the wafer via plasma deposition at a sufficient ratio of wafer substrate bias to DC source power that bottom coverage is achieved while resputtering of surfaces of the recessed device features is inhibited. The method also comprises depositing a second portion of the metal seed layer at a ration of substrate RF bias to DC source power such that resputtering is not inhibited.
    Type: Application
    Filed: June 25, 2009
    Publication date: October 29, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang
  • Publication number: 20090269934
    Abstract: Formation of BPSG surface defects upon exposure to atmosphere is prevented by a plasma treatment method for converting boron and/or phosphorus materials separated from silicon near the surface of the doped glass layer to gas phase compounds. The treatment plasma is generated from a treatment process gas containing one of (a) a fluorine compound or (b) a hydrogen compound.
    Type: Application
    Filed: July 15, 2008
    Publication date: October 29, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Chien-Teh Kao, Haichun Yang, Xinliang Lu, Mei Chang
  • Patent number: 7608173
    Abstract: A retaining ring for electrochemical mechanical processing is described. The ring has a conductive portion having an upper surface and a lower surface and an insulating portion. The insulating portion has one or more openings extending therethrough, exposing the lower surface of the conductive portion. An upper surface of the insulating portion contacts the lower surface of the conductive portion. In an electrochemical mechanical polishing process, the retaining ring can be biased separately from a substrate being polished.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: October 27, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Antoine P. Manens, Feng Q Liu, Paul D. Butterfield, Alain Duboust, Rashid Mavliev
  • Patent number: 7607881
    Abstract: An improved apparatus and method is provided for storing semiconductor wafer carriers, and for loading wafers or wafer carriers to a fabrication tool. The apparatus preferably provides an elevated port for receipt of wafer carriers from an overhead factory transport, allows for local interconnection among a plurality of the inventive apparatuses, and enables independent loading of the factory load port and the tool load port. An inventive wafer handling method which divides a lot of wafers into sublots and distributes the sublots among tools configured to perform the same process is also provided.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: October 27, 2009
    Assignee: Applied Materials, Inc.
    Inventor: Robert Z. Bachrach
  • Patent number: 7608300
    Abstract: A variety of techniques may be employed alone or in combination to reduce the incidence of defects arising in dielectric stack structures formed by chemical vapor deposition (CVD). Incidence of a first defect type attributable to reaction between an unreacted species of a prior CVD step and reactants of a subsequent CVD step, is reduced by exposing a freshly-deposited dielectric layer to a plasma before any additional layers are deposited. Incidence of a second defect type attributable to the presence of incompletely vaporized CVD liquid precursor material, is reduced by exposing the freshly-deposited dielectric layer to a plasma, and/or by continuing the flow of carrier gas through an injection valve for a period beyond the conclusion of the CVD step.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: October 27, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Christopher Dennis Bencher, Lee Luo
  • Publication number: 20090261276
    Abstract: An apparatus for An apparatus for generating excimer radiation is provided. The apparatus includes a housing having a housing wall. An electrode is configured within the housing. A tubular body is around the electrode. The tubular body includes an outer wall and an inner wall. At least one inert gas is between the outer wall and the inner wall, wherein the housing wall and the electrode are configured to excite the inert gas to illuminate an excimer light for curing.
    Type: Application
    Filed: April 22, 2008
    Publication date: October 22, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Dmitry LUBOMIRSKY, Muhammad M. RASHEED, Ellie Y. YIEH
  • Publication number: 20090263594
    Abstract: A substrate processing system has a housing that defines a process chamber. A substrate holder disposed within the process chamber supports a substrate during substrate processing. A gas-delivery system introduces a gas into the process chamber. A pressure-control system maintains a selected pressure within the process chamber. A high-density plasma generating system forms a plasma having a density greater than 1011 ions/cm3 within the process chamber. A radio-frequency bias system generates an electrical bias on the substrate at a frequency less than 5 MHz. A controller controls the gas-delivery system, the pressure-control system, the high-density plasma generating system, and the radio-frequency bias system.
    Type: Application
    Filed: June 29, 2009
    Publication date: October 22, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Rongping Wang, Canfeng Lai, Yuri Trachuk, Siamak Salimian