Abstract: Embodiments of the invention generally provide an annealing apparatus and method for a semiconductor processing platform. The annealing apparatus includes a plurality of isolated annealing chambers, wherein each of the annealing chambers has a heating plate positioned in a sealed processing volume, a cooling plate positioned in the processing volume, and a substrate transfer mechanism positioned in the processing volume and configured to transfer substrates between the heating plate and the cooling plate. The annealing system further includes a gas supply source selectively in communication with each of the individual annealing chambers.

Abstract: The present invention concerns a thin-film encapsulation structure for electronic devices with organic substances, especially OLEDs or other organic optoelectronic devices as well as corresponding components and a process for the production with a primary, inorganic barrier layer (5), which is directly arranged on the device or the surface to be encapsulated; a planarization layer (6) arranged on the primary, inorganic barrier layer, the thickness of said planarization layer selected such that it is thicker than the simple value of the distance between highest peak and deepest valley of the surface of the primary barrier layer or the surface of the device under the primary barrier layer or the surface to be encapsulated, as well as a secondary barrier layer (14) arranged on the planarization layer.

Abstract: Methods of forming a 3D structure in a substrate are disclosed. A layer of resist is deposited on the substrate. The layer of resist is patterned to define an edge at a predetermined location. The resist is reflowed to form a tapered region extending from the etch. Both the reflowed resist and the substrate are concurrently etched to transfer the tapered profile of the reflowed resist into the underlying substrate to form an angled surface. The etching is discontinued before all of the resist is consumed by the etching.

Abstract: A system to form a dielectric layer on a substrate from a plasma of dielectric precursors is described. The system may include a deposition chamber, a substrate stage in the deposition chamber to hold the substrate, and a remote plasma generating system coupled to the deposition chamber, where the plasma generating system is used to generate a dielectric precursor having one or more reactive radicals. The system may also include a radiative heating system to heat the substrate that includes at least one light source, where at least some of the light emitted from the light source travels through the top side of the deposition chamber before reaching the substrate. The system may also include a precursor distribution system to introduce the reactive radical precursor and additional dielectric precursors to the deposition chamber. An in-situ plasma generating system may also be included to generate the plasma in the deposition chamber from the dielectric precursors supplied to the deposition chamber.

Abstract: Simulated aerial images for an optical system are made by forming a reference aerial image of a first mask used in connection with the optical system, and then capturing and processing the reference aerial image to generate a set of expansion functions representative of the optical system. The expansion functions account for aberrations and misalignment of the optical system, as well as any aberrations or other defects of a camera therein. The expansion functions are then used to compute simulated aerial images of other masks projected by the optical system. Thus, the expansion functions implicitly represent a calibration of the optical system for purposes of aerial image simulation, obviating the need for direct measurement of the actual aberrations and misalignment. Hence, a simulated aerial image of a second mask for the optical system can be computed by applying the expansion functions to a design of the second mask.

Abstract: A process for forming low dielectric constant dielectric films for the production of microelectronic devices. A dielectric layer is formed on a substrate by chemical vapor depositing a monomeric or oligomeric dielectric precursor in a chemical vapor deposit apparatus, or a reaction product formed from the precursor in the apparatus, onto a substrate, to form a layer on a surface of a substrate. After optionally heating the layer at a sufficient time and temperature to dry the layer, the layer is then exposed to electron beam radiation, for a sufficient time, temperature, electron beam energy and electron beam dose to modify the layer. The electron beam exposing step is conducted by overall exposing the dielectric layer with a wide, large beam of electron beam radiation from a large-area electron beam source.

Abstract: A process of selectively etching a sacrificial light absorbing material (SLAM) over a dielectric material, such as carbon doped oxide, on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a hydrofluorocarbon gas, an optional hydrogen-containing gas, an optional fluorine-rich fluorocarbon gas, a nitrogen gas, an oxygen gas, and an inert gas. The process could provide a SLAM to a dielectric material etching selectivity ratio greater than 10:1.

Abstract: A semiconductor device includes a substrate having regions filled with an additive that forms a source/drain for a MOS device, a gate dielectric layer deposited over the substrate, the gate dielectric layer electrically isolates the substrate from subsequently deposited layers, a gate electrode deposited over the gate dielectric layer, an oxide liner formed along laterally opposite sidewalls of the gate electrode, a nitride layer formed along the oxide liner extending above the gate electrode, and wherein the additive and the nitride layer enclose the gate electrode.

Abstract: A method for fabricating a semiconductor device with adjacent PMOS and NMOS devices on a substrate includes forming a PMOS gate electrode with a PMOS hardmask on a semiconductor substrate with a PMOS gate dielectric layer in between, forming an NMOS gate electrode with an NMOS hardmask on a semiconductor substrate with an NMOS gate dielectric layer in between, forming an oxide liner over a portion of the PMOS gate electrode and over a portion of the NMOS gate electrode, forming a lightly doped N-Halo implant, depositing a nitride layer over the oxide liner, depositing photoresist on the semiconductor substrate in a pattern that covers the NMOS device, etching the nitride layer from the PMOS device, wherein the etching nitride layer leaves a portion of the nitride layer on the oxide liner, etching semiconductor substrate to form a Si recess, and depositing SiGe into the Si recesses, wherein the SiGe and the nitride layer enclose the oxide liner.

Abstract: Embodiments of the invention relate generally to an ultraviolet (UV) cure chamber for curing a dielectric material disposed on a substrate and to methods of curing dielectric materials using UV radiation. A substrate processing tool according to one embodiment comprises a body defining a substrate processing region; a substrate support adapted to support a substrate within the substrate processing region; an ultraviolet radiation lamp spaced apart from the substrate support, the lamp configured to transmit ultraviolet radiation to a substrate positioned on the substrate support; and a motor operatively coupled to rotate at least one of the ultraviolet radiation lamp or substrate support at least 180 degrees relative to each other.

Abstract: In determining an endpoint of etching a substrate, light that is directed toward the substrate is reflected from the substrate. A wavelength of the light is selected to locally maximize the intensity of the reflected light at an initial time point of the etching process. The reflected light is detected to determine an endpoint of the substrate etching process.

Abstract: Methods and apparatus for providing a chemical mechanical polishing pad. The pad includes a polishing layer having a top surface and a bottom surface. The pad includes an aperture having a first opening in the top surface and a second opening in the bottom surface. The top surface is a polishing surface. The pad includes a window that includes a first portion made of soft plastic and a crystalline or glass like second portion. The window is transparent to white light. The window is situated in the aperture so that the first portion plugs the aperture and the second portion is on a bottom side of the first portion, wherein the first portion acts a slurry-tight barrier.

Abstract: A polishing layer of a polishing has a window member with a top surface positioned a predetermined distance below the polishing surface. A transparent layer can be positioned below the polishing layer arid supporting the window member.

Abstract: Methods of filling a gap on a substrate with silicon oxide are described. The methods may include the steps of introducing an organo-silicon precursor and an oxygen precursor to a deposition chamber, reacting the precursors to form a first silicon oxide layer in the gap on the substrate, and etching the first silicon oxide layer to reduce the carbon content in the layer. The methods may also include forming a second silicon oxide layer on the first layer, and etching the second layer to reduce the carbon content in the second layer. The silicon oxide layers are annealed after the gap is filled.

Abstract: Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.

Abstract: A system to form a dielectric layer on a substrate from a plasma of dielectric precursors is described. The system may include a deposition chamber, a substrate stage in the deposition chamber to hold the substrate, and a remote plasma generating system coupled to the deposition chamber, where the plasma generating system is used to generate a dielectric precursor having one or more reactive radicals. The system may also include a precursor distribution system comprising a dual-channel showerhead positioned above the substrate stage. The showerhead may have a faceplate with a first set of openings through which the reactive radical precursor enters the deposition chamber, and a second set of openings through which a second dielectric precursor enters the deposition chamber. An in-situ plasma generating system may also be included to generate the plasma in the deposition chamber from the dielectric precursors supplied to the deposition chamber.

Abstract: A system to form a dielectric layer on a substrate from a plasma of dielectric precursors is described. The system may include a deposition chamber, a substrate stage in the deposition chamber to hold the substrate, and a remote plasma generating system coupled to the deposition chamber, where the plasma generating system is used to generate a dielectric precursor having one or more reactive radicals. The system may also include a precursor distribution system that includes at least one top inlet and a plurality of side inlets. The top inlet may be positioned above the substrate stage and the side inlets may be radially distributed around the substrate stage. The reactive radical precursor may be supplied to the deposition chamber through the top inlet. An in-situ plasma generating system may also be included to generate the plasma in the deposition chamber from the dielectric precursors supplied to the deposition chamber.

Abstract: A method of sputtering a copper seed layer and the target used therewith. The copper included in the sputtering target includes a first dopant reactive with copper and a second dopant unreactive with copper. Examples of the first dopant include Ti, Mg, and Al. Examples of the second dopant include Pd, Sn, In, Ir, and Ag. The amount of the first dopant may be determined by testing stress migration and that of the second dopant by testing electromigration.

Abstract: A method of plasma etching tungsten silicide over polysilicon particularly useful in fabricating flash memory having both a densely packed area and an open (iso) area requiring a long over etch due to microloading. Wafer biasing is decreased in the over etch. The principal etchant include NF3 and Cl2. Argon is added to prevent undercutting at the dense/iso interface. Oxygen and nitrogen oxidize any exposed silicon to increase etch selectivity and straightens the etch profile. SiCl4 may be added for additional selectivity.

Abstract: A method of plasma etching tungsten silicide over polysilicon particularly useful in fabricating flash memory having both a densely packed area and an open (iso) area requiring a long over etch due to microloading. Wafer biasing is decreased in the over etch. The principal etchant include NF3 and Cl2. Argon is added to prevent undercutting at the dense/iso interface. Oxygen and nitrogen oxidize any exposed silicon to increase etch selectivity and straightens the etch profile. SiCl4 as an example of a silicon and chlorine containing passivating gas may be added for additional selectivity.