Patents Assigned to Applied Material
-
Publication number: 20070256635Abstract: Systems are disclosed for fabricating compound nitride semiconductor structures. The systems include a housing defining a processing chamber, a substrate holder disposed within the processing chamber, an NH3 source, a group-III precursor source, an ultraviolet source, and a CVD showerhead disposed over the substrate holder. The showerhead has a first plenum fluidicly coupled with the NH3 source, with the first plenum having channels fluidicly coupled with an interior of the processing chamber. The first plenum is optically coupled with the ultraviolet light source at an ultraviolet wavelength to receive light transmitted by the ultraviolet light source within the first plenum. The CVD showerhead also has a second plenum fluidicly coupled with the group-III precursor source, with the second plenum having channels fluidicly coupled with the interior of the processing chamber.Type: ApplicationFiled: May 2, 2006Publication date: November 8, 2007Applicant: Applied Materials, Inc. A Delaware corporationInventors: David Bour, Lori Washington, Sandeep Nijhawan, Ronald Stevens, Jacob Smith
-
Publication number: 20070259504Abstract: In accordance with the present invention, improved methods for reducing the dislocation density of nitride epitaxial films are provided. Specifically, an in-situ etch treatment is provided to preferentially etch the dislocations of the nitride epitaxial layer to prevent threading of the dislocations through the nitride epitaxial layer. Subsequent to etching of the dislocations, an epitaxial layer overgrowth is performed. In certain embodiments, the etching of the dislocations occurs simultaneously with growth of the epitaxial layer. In other embodiments, a dielectric mask is deposited within the etch pits formed at the dislocations prior to the epitaxial layer overgrowth.Type: ApplicationFiled: May 5, 2006Publication date: November 8, 2007Applicant: Applied Materials, Inc.Inventors: David Bour, Sandeep Nijhawan, Jacob Smith, Lori Washington
-
Publication number: 20070259502Abstract: A method of suppressing parasitic particle formation in a metal organic chemical vapor deposition process is described. The method may include providing a substrate to a reaction chamber, and introducing an organometallic precursor, a particle suppression compound and at least a second precursor to the reaction chamber. The second precursor reacts with the organometallic precursor to form a nucleation layer on the substrate. Also, a method of suppressing parasitic particle formation during formation of a III-V nitride layer is described. The method includes introducing a group III metal containing precursor to a reaction chamber. The group III metal precursor may include a halogen. A hydrogen halide gas and a nitrogen containing gas are also introduced to the reaction chamber. The nitrogen containing gas reacts with the group III metal precursor to form the Ill-V nitride layer on the substrate.Type: ApplicationFiled: May 5, 2006Publication date: November 8, 2007Applicant: Applied Materials, Inc.Inventors: David Bour, Jacob Smith, Sandeep Nijhawan, Lori Washington, David Eaglesham
-
Patent number: 7292428Abstract: A lift pin assembly for use in a reactor for processing a workpiece includes plural lift pins extending generally parallel with a lift direction, each of the plural lift pins having a top end for supporting a workpiece and a bottom end. A lift table faces the bottom ends of the pins and is translatable in a direction generally parallel with the lift direction. A small force detector senses a force exerted by the lift pins that is sufficiently large to indicate a chucked wafer and sufficiently small to avoid dechucking a wafer. A large force detector senses a force exerted by the lift pins in a range sufficient to de-chuck the wafer.Type: GrantFiled: April 26, 2005Date of Patent: November 6, 2007Assignee: Applied Materials, Inc.Inventors: Hiroji Hanawa, Andrew Nguyen, Kenneth S. Collins, Kartik Ramaswamy, Biagio Gallo, Amir Al-Bayati
-
Patent number: 7291545Abstract: A method of ion implanting a species in a workpiece to a selected ion implantation profile depth includes placing a workpiece having a semiconductor material on an electrostatic chuck in or near a processing region of a plasma reactor chamber and applying a chucking voltage to the electrostatic chuck. The method further includes introducing into the chamber a precursor gas including a species to be ion implanted in the workpiece and applying an RF bias to the electrostatic chuck, the RF bias having a bias level corresponding to the ion implantation profile depth.Type: GrantFiled: November 21, 2005Date of Patent: November 6, 2007Assignee: Applied Materials, Inc.Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo, Gonzalo Antonio Monroy
-
Patent number: 7292045Abstract: Method and apparatus for detecting or suppressing electrical arcing or other abnormal change in the electrical impedance of a load connected to a power source. Preferably the load is a plasma chamber used for manufacturing electronic components such as semiconductors and flat panel displays. Arcing is detected by monitoring one or more sensors. Each sensor either responds to a characteristic of the electrical power being supplied by an electrical power source to the plasma or is coupled to the plasma chamber so as to respond to an electromagnetic condition within the chamber. Arcing is suppressed by reducing the power output for a brief period. Then the power source increases its power output, preferably to its original value. If the arcing resumes, the power source repeats the steps of reducing and then restoring the power output.Type: GrantFiled: June 10, 2005Date of Patent: November 6, 2007Assignee: Applied Materials, Inc.Inventors: Suhail Anwar, Remegio Manacio, Chung-Hee Park, Dong-Kil Yim, Soo Young Choi
-
Patent number: 7290976Abstract: According to one aspect of the present invention, a passive substrate gripper, including first and second segments, is provided. The second segment may be connected to the first segment, and the first and second segments may jointly form a substrate support. The substrate support may be shaped to support a substrate in first position within the substrate support when the substrate support is in a first angular orientation. The substrate may be removable from substrate support in a first direction when in the first position. The substrate may move into a second position when the substrate support is moved into a second angular orientation. The substrate may not be removable in the first direction when in the second position within the substrate support. The passive substrate gripper may also include a support ledge extending from opposing inner surfaces of the first and second segments, on which the substrate is supported.Type: GrantFiled: June 28, 2005Date of Patent: November 6, 2007Assignee: Applied Materials, Inc.Inventors: Ralph M. Wadensweiler, Rick R. Endo, Alexander S. Ko
-
Patent number: 7291360Abstract: A chemical vapor deposition process is carried out in a reactor chamber having a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower process region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, each orifice being oriented in a non-parallel direction relative to a surface plane of the respective ion shower grid. A workpiece is placed in the process region, so that a workpiece surface of the workpiece is generally facing a surface plane of the nearest one of the ion shower grids, and a gas mixture comprising a deposition precursor species is furnished into the ion generation region. The process region is evacuated at an evacuation rate sufficient to create a pressure drop across the plural ion shower grids between the ion generation and process regions whereby the pressure in the ion generation region is several times the pressure in the process region.Type: GrantFiled: June 22, 2004Date of Patent: November 6, 2007Assignee: Applied Materials, Inc.Inventors: Hiroji Hanawa, Tsutomu Tanaka, Kenneth S. Collins, Amir Al-Bayati, Kartik Ramaswamy, Andrew Nguyen
-
Publication number: 20070254491Abstract: A semiconductor stack having a protective layer formed into a low k dielectric material is provided. The method for forming the protective layer in a low k dielectric material may include plasma etching the low k dielectric material to form Si—OH bonds on a surface of the low k dielectric material, exposing the Si—OH bonds to a silicon containing fluid solution, and replacing the Si—OH bonds with Si—Si bonds generated by the silicon containing fluid solution to form a protective layer on the surface of the low k dielectric material.Type: ApplicationFiled: April 29, 2006Publication date: November 1, 2007Applicant: Applied Materials, Inc.Inventor: Robin Cheung
-
Publication number: 20070254494Abstract: The present invention relates to a thermal unit comprising a faceplate with rapid temperature change capabilities. The methods and components of the present invention may be used in post-exposure bake processes where varied temperatures are used. In accordance with the advantages of the present invention, the thermal units and faceplates of the invention can reach temperature equilibration within a short duration of time, thereby allowing quicker processing times. The faceplates of the invention are configured so as achieve a heat up and cool down temperature delta equilibrium with a bakeplate within a semiconductor thermal unit in, e.g., less than about three minutes, each respectively.Type: ApplicationFiled: April 27, 2006Publication date: November 1, 2007Applicant: Applied Materials, Inc.Inventors: Harald Herchen, Lue Brian, Quach David, Anzhong Chang
-
Publication number: 20070254458Abstract: Methods are disclosed for fabricating a compound nitride semiconductor structure. An amorphous buffer layer that includes nitrogen and a group-III element is formed over a substrate disposed within a substrate processing chamber at a first temperature. The temperature within the chamber is increased to a second temperature at which the amorphous buffer layer coalesces into crystallites over the substrate. The substrate is exposed to a corrosive agent to destroy at least some of the crystallites. A crystalline nitride layer is formed over the substrate at a third temperature using the crystallites remaining after exposure to the corrosive agent as seed crystals. The third temperature is greater than the first temperature. The crystalline nitride layer also includes nitrogen and a group-III element.Type: ApplicationFiled: April 27, 2006Publication date: November 1, 2007Applicant: Applied Materials, Inc.Inventors: David Bour, Jacob Smith, Sandeep Nijhawan
-
Publication number: 20070254094Abstract: A method of dispensing a photolithography chemical onto a substrate in a track lithography tool includes determining the volume for each of a number of target volumes for a photolithography process. A pump control parameter is calculated for each target volume, as determined by a fitting a characteristic function to incremental volume-based characteristic factors as a function of the target volume, then determining the appropriate control parameter for a given target volume. In one embodiment, the control parameter is a number of drive pulses to be applied to a displacement pump motor to displace a selected volume of chemical and thus obtain the desired volume target. Control parameters also can be determined for each step of a multiple step dispense process. The method further includes providing a control signal to the dispense pump to control accurate delivery of the photolithography chemical to the substrate.Type: ApplicationFiled: April 27, 2006Publication date: November 1, 2007Applicant: Applied Materials, Inc.Inventor: Y. Lin
-
Publication number: 20070254100Abstract: Methods and systems permit fabricating structures using liquid sources without active temperature control. A substrate is disposed within a substrate processing chamber. A liquid source of a group-III precursor is provided in a bubbler. A push gas is applied to the liquid source to drive the group-III precursor into a vaporizer. A carrier gas is flowed into the vaporizer. A flow of vaporized group-III precursor carried by the carrier gas is injected from the vaporizer into the processing chamber. A nitrogen precursor is flowed into the processing chamber. A group-III nitride layer is deposited over the substrate with a thermal chemical vapor deposition within the processing chamber using the vaporized group-III precursor and the nitrogen precursor.Type: ApplicationFiled: April 26, 2006Publication date: November 1, 2007Applicant: Applied Materials, Inc.Inventors: Sandeep Nijhawan, Lori Washington, Jacob Smith, Gary Kwong, David Bour, David Eaglesham
-
Publication number: 20070254390Abstract: Nitride optoelectronic devices that have asymmetric double-sided structures and methods fabricating such structures are disclosed. Two n-type III-N layers are formed simultaneously over opposite sides of a substrate with substantially the same composition. Thereafter, a p-type III-N active layer is formed over one of the n-type III-N layers but not over the other.Type: ApplicationFiled: April 28, 2006Publication date: November 1, 2007Applicant: Applied Materials, Inc.Inventors: David Bour, Jacob Smith, Jie Su, Sandeep Nijhawan
-
Publication number: 20070251939Abstract: The present invention relates generally to control schemes for controlling the temperature of a heater plate of a thermal unit, e.g., of a track lithography tool. In accordance with certain embodiments of the invention, a cold wafer compensation offset value is added to an initial target heater plate temperature setpoint, and this setpoint plus offset is used to control the temperature of the heater plate prior to placement of a semiconductor wafer, e.g., via Proportional-Integral-Derivative (PID) control. Further, in accordance with certain embodiments, upon cold wafer placement, the temperature control is turned off until the temperature of the heater plate reaches the initial target heater plate temperature setpoint. The temperature control (e.g., PID control) is then reinstated, and the heater plate and wafer are controlled to steady state.Type: ApplicationFiled: April 27, 2006Publication date: November 1, 2007Applicant: Applied Materials, Inc.Inventors: Alex Minkovich, Natarajan Ramanan, Eehern Wong
-
Publication number: 20070254493Abstract: An integrated thermal unit comprising a housing; a bake station positioned within the housing, the bake station comprising a bake plate configured to heat a substrate supported on a surface of the bake plate; a chill station positioned within the housing, the chill station comprising a chill plate configured to cool a substrate supported on a surface of the chill plate; and a substrate receiving station positioned within the housing, the substrate receiving station configured to hold a substrate; wherein the bake station, chill station and substrate receiving station are arranged in a vertical stack within the housing. In some embodiments the integrated thermal unit further comprises a substrate transfer shuttle positioned within the housing and adapted to transfer substrates between the substrate receiving station, bake station and chill stations.Type: ApplicationFiled: April 28, 2006Publication date: November 1, 2007Applicant: Applied Materials, Inc.Inventors: Martin Salinas, Natarajan Ramanan, Leon Volfovski
-
Publication number: 20070254093Abstract: Methods and systems permit fabricating structures using liquid sources without active temperature control. A liquid or solid source of the precursor is provided in a bubbler. A carrier gas source is flowed into the source to generate a flow of precursor vapor carried by the carrier gas. A relative concentration of the precursor vapor to the carrier gas of the flow is measured. A mass flow rate of the precursor in the flow is determined from the measured relative concentration. A flow rate of the carrier gas into the source is changed to maintain the mass flow rate at a defined value or within a defined range.Type: ApplicationFiled: April 26, 2006Publication date: November 1, 2007Applicant: Applied Materials, Inc.Inventors: Sandeep Nijhawan, Lori Washington, Jacob Smith, Garry Kwong, David Bour, David Eaglesham
-
Patent number: 7288205Abstract: Methods and apparatus are provided for processing a substrate with a hermetic dielectric layer. In one aspect, the invention provides a method for processing a substrate including providing the substrate to a processing chamber, introducing a processing gas comprising a reducing agent, an oxygen containing compound, and an organosilicon compound, into the processing chamber, generating a plasma from a dual frequency RF power source, and depositing a dielectric material comprising silicon, carbon, and oxygen. The dielectric material may be used as an etch stop, an anti-reflective coating, or a passivation layer.Type: GrantFiled: July 9, 2004Date of Patent: October 30, 2007Assignee: Applied Materials, Inc.Inventors: Annamalai Lakshmanan, Albert Lee, Ju-Hyung Lee, Bok Hoen Kim
-
Patent number: 7288165Abstract: In a first aspect, a first apparatus is provided for a chemical mechanical polishing (CMP) process. The first apparatus includes (1) a rotatable member; (2) an end effector adapted to receive and retain a conditioning disk; and (3) an elastic device disposed between the rotatable member and the end effector. The elastic device is (a) adapted to rotate the end effector via a torque from the rotatable member, and (b) flexibly extensible so as to impart a force to the end effector while permitting the end effector to deviate from a perpendicular alignment with the rotatable member in order for a conditioning surface of the conditioning disk to conform to an irregular polishing surface of a pad being conditioned. Numerous other aspects are provided, including methods and apparatus for using liquid or gas to deter polishing slurry or debris from entering the conditioning head.Type: GrantFiled: October 21, 2004Date of Patent: October 30, 2007Assignee: Applied Materials, Inc.Inventors: Alexander S Polyak, Avi Tepman
-
Patent number: 7288491Abstract: One method of performing plasma immersion ion implantation on a workpiece in a plasma reactor chamber includes initially depositing a seasoning film on the interior surfaces of the plasma reactor chamber before the workpiece is introduced, by introducing a seasoning film precursor gas into the chamber and generating a plasma within the chamber, performing plasma immersion ion implantation on the workpiece by introducing an implant species precursor gas into the chamber and generating a plasma, and then removing the workpiece from the chamber and removing the seasoning film from the chamber interior surfaces.Type: GrantFiled: January 28, 2005Date of Patent: October 30, 2007Assignee: Applied Materials, Inc.Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo