Abstract: Exemplary methods of semiconductor processing may include etching a first portion of a feature in a substrate disposed within a processing region of a semiconductor processing chamber. The first portion of the feature may at least partially extend through one or more layers of material formed on the substrate. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The methods may include generating plasma effluents of the carbon-containing precursor. The methods may include contacting the substrate with the plasma effluents of the carbon-containing precursor. The methods may include forming a carbon-containing material on the substrate. The carbon-containing material may line the first portion of the feature at least partially extending through the one or more layers of material formed on the substrate. The carbon-containing material may be formed in the same chamber where the feature is etched.

Abstract: An apparatus may include a drift tube assembly having a plurality of drift tubes to conduct an ion beam along a beam propagation direction. The plurality of drift tubes may define a multi-gap configuration corresponding to a plurality of acceleration gaps, wherein at least one powered drift tube of the drift tube assembly is coupled to receive an RF voltage signal. The apparatus may also include a DC electrode assembly that includes a conductor line, arranged within a resonator coil that is coupled to receive a DC voltage signal into the at least one powered drift tube. The DC electrode assembly may also include a DC electrode arrangement, connected to the conductor line and disposed within the at least one powered drift tube.

Abstract: Physical vapor deposition methods for reducing the particulates deposited on the substrate are disclosed. The pressure during sputtering can be increased to cause agglomeration of the particulates formed in the plasma. The agglomerated particulates can be moved to an outer portion of the process chamber prior to extinguishing the plasma so that the agglomerates fall harmlessly outside of the diameter of the substrate.

Abstract: Described herein is a method of depositing a conformal, optically transparent coating onto a surface of one or more internal components that are enclosed within an assembled device using a non-line-of-sight deposition process without altering a structure of the assembled device or impacting functionality of the assembled device. Also described is an assembled device including one or more internal components enclosed within the assembled device and a coating deposited onto a surface of the internal components enclosed within the assembled device, where the coating is a conformal, optically transparent coating that is resistant to corrosion by at least one of fluorine-, chlorine-, sulfur-, hydrogen-, bromine-, or nitrogen-based acids and that does not negatively impact functionality of the internal components.

Abstract: Apparatus for processing a substrate are provided herein. In some embodiments, a lid for a substrate processing chamber includes: a lid plate comprising an upper surface and a contoured bottom surface, the upper surface having a central opening and the contoured bottom surface having a first portion that extends downwardly and outwardly from the central opening to a peripheral portion of the lid plate and a second portion that extends radially outward along the peripheral portion of the lid plate; an upper flange extending radially outward from the lid plate; and one or more channels formed through the lid plate from the upper surface of the lid plate to the second portion of the contoured bottom surface.

Abstract: A method of chemical mechanical polishing includes rotating a polishing pad about an axis of rotation, positioning a substrate against the polishing pad, the polishing pad having a groove that is concentric with the axis of rotation, oscillating the substrate laterally across the polishing pad such that a central portion of the substrate and an edge portion of the substrate are positioned over a polishing surface of the polishing pad for a first duration, and holding the substrate substantially laterally fixed in a position such that the central portion of the substrate is positioned over the polishing surface of the polishing pad and the edge portion of the substrate is positioned over the groove for a second duration.

Abstract: A polishing apparatus includes a polishing station to hold a polishing pad, a carrier head to hold a substrate in contact with a polishing pad at the polishing station, a camera positioned to capture an image of a lower surface of a consumable part when the consumable part moves away from the polishing pad, and a controller configured to perform an image processing algorithm on the image to determine whether the consumable part is damaged. The consumable part can be a retaining ring on a carrier head, or a conditioner disk on a conditioner head.

Abstract: Disclosed is a coated chamber component comprising a body having a reduced metal surface such that the reduced metal surface has less metal oxide as compared to an amount of metal oxide on a metal surface that has not been reduced. The metal surface may be reduced by pulsing a reducing alcohol thereon. The reduced metal surface may be coated with a corrosion resistant film that may be deposited onto the reduced metal surface by a dry atomic layer deposition process.

Abstract: Silyl pseudohalides having a general formula of R4-nSiXn, where n is a range of 1-4, each R is independently selected from H, alkyl, alkenyl, aryl, amino, alkyl amino, alkoxide, and phosphine groups, and each X is a pseudohalide selected from nitrile, cyanate, isocyanate, thiocyanate, isothiocyanate, selenocyanate and isoselenocyanate are disclosed. Further, some embodiments of the disclosure provide methods for depositing silicon-containing films using silyl pseudohalides.

Abstract: A carrier head includes a housing, a support assembly having a support plate flexibly connected to the housing so as to be vertically movable, a plurality of fluid-impermeable barriers projecting from a bottom of the support plate to define a plurality of recesses that are open at bottom sides thereof, and pneumatic control lines. A volume between the support plate and the housing includes one or more independently pressurizable first chambers to apply pressure on a top surface of the support plate in one or more first zones. The barriers are positioned and configured such that when a planar substrate is loaded into the carrier head the barriers contact the substrate and divide a volume between the support plate and the substrate into a plurality of second chambers. The pneumatic control lines are coupled to the plurality of recesses to provide a plurality of independently pressurizable second zones.

Abstract: A method and apparatus for applying an electric field and/or a magnetic field to a photoresist layer without air gap intervention during photolithography processes is provided herein. The method and apparatus include a transfer device and a plurality of modules. The transfer device is configured to rotate a plurality of substrates between each of the modules, wherein one module includes a heating pedestal and another module includes a cooling pedestal. One module is utilized for inserting and removing the substrates from the system. At least the heating module is able to be sealed and filled with a process volume before applying the electric field.

Abstract: A method includes machining a raw surface of a metal component to remove first native oxide from a metal base of the metal component to generate an as-machined surface of the metal component. A second native oxide is formed on the metal base of the as-machined surface of the metal component subsequent to the machining. The method further includes, subsequent to the machining, performing operations to generate a finished surface of the metal component. The operations include a surface machining of the as-machined surface of the metal component to remove the second native oxide.

Abstract: Embodiments of the present disclosure generally relate to planarization of surfaces on substrates and on layers formed on substrates. More specifically, embodiments of the present disclosure relate to planarization of surfaces on substrates for advanced packaging applications, such as surfaces of polymeric material layers. In one implementation, the method includes mechanically grinding a substrate surface against a polishing surface in the presence of a grinding slurry during a first polishing process to remove a portion of a material formed on the substrate; and then chemically mechanically polishing the substrate surface against the polishing surface in the presence of a polishing slurry during a second polishing process to reduce any roughness or unevenness caused by the first polishing process.

Abstract: A process kit comprises a shield and ring assembly for positioning about a substrate support in a processing chamber to reduce deposition of process deposits on internal chamber components and an overhang edge of the substrate. The shield comprises a cylindrical band having a top wall configured to surround a sputtering target and a sloped portion of a bottom wall having a substantially straight profile with gas conductance holes configured to surround the substrate support. The ring assembly comprises a cover ring having a bulb-shaped protuberance about the periphery of the ring. The bulb-shaped protuberance of the cover ring is able to block a line-of-sight between the gas conductance holes on the shield and an entrance to a chamber body cavity in the processing chamber.

Abstract: Exemplary deposition methods may include delivering a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the boron-containing precursor and the nitrogen-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the boron-containing precursor or the nitrogen-containing precursor may be greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-nitrogen material on a substrate disposed within the processing region of the semiconductor processing chamber.

Abstract: Methods and apparatus bonding chiplets to substrates are provided herein. In some embodiments, a multi-chamber processing tool for processing a substrate includes: an equipment front end module (EFEM) having one or more loadports for receiving one or more types of substrates; and a plurality of automation modules coupled to each other and having a first automation module coupled to the EFEM, wherein each of the plurality of automation modules include a transfer chamber and one or more process chambers coupled to the transfer chamber, wherein the transfer chamber includes a buffer configured to hold a plurality of the one or more types of substrates, and wherein the transfer chamber includes a transfer robot configured to transfer the one or more types of substrates between the buffer, the one or more process chambers, and a buffer disposed in an adjacent automation module of the plurality of automation modules.

Abstract: Systems and methods disclosed are generally related to masklessly developing connections between a chip-group and a design connection point on a substrate. In placement of the chip-group on the substrate, according to certain embodiments the chip-group may be dispositioned relative to an expected position per a substrate layout design, causing a connection misalignment with the design connection point. According to certain embodiments, a machine learning (ML) model is trained on historical and simulated pixel models of chip-group connections and design connection points. Upon determining the chip-group misalignment by a metrology measurement, the trained ML model determines a pixel model to connect the misaligned chip-group, and causes the pixel model to be exposed to a substrate with a digital lithography tool, thereby connecting the dispositioned chip-group to the design connection point.

Abstract: Apparatus and methods for calibrating a height-adjustable edge ring are described herein. In one example, a calibration jig for positioning an edge ring relative to a reference surface is provided that includes a transparent plate, a plurality of sensors coupled to a first side of the transparent plate, and a plurality of contact pads coupled to an opposing second side of the transparent plate.

Abstract: Methods and apparatus for bonding chiplets to substrates are provided herein. In some embodiments, a multi-chamber processing tool for processing substrates, includes: a first equipment front end module (EFEM) having one or more loadports for receiving one or more types of substrates, a second EFEM having one or more loadports; and a plurality of atmospheric modular mainframes (AMMs) coupled to each other and having a first AMM coupled to the first EFEM and a last AMM coupled to the second EFEM, wherein each of the plurality of AMMs include a transfer chamber and one or more process chambers coupled to the transfer chamber, wherein the transfer chamber includes a buffer, and wherein the transfer chamber includes a transfer robot, the one or more process chambers, and a buffer disposed in an adjacent AMM of the plurality of AMMs.

Abstract: Embodiments described herein relate to methods of forming layers using maskless based lithography. In these embodiments, the methods implement ladders of dose change such that a geometric shape can be divided into overlaying sections. The overlaying sections can include a different dose of each section such that taper control can be achieved. The taper can be achieved by manipulating the geometry “mask data” into overlaying sections that are exposed by various doses controlled by pixel blending (PB) exposure techniques. To perform the methods described herein, a maskless lithography tool is used. The maskless lithography tool includes a controller that performs software based “mask data” manipulation.