Patents Assigned to Applied Materials
  • Patent number: 10957567
    Abstract: A system, computer program product and a method for detecting manufacturing process defects, the method may include: obtaining multiple edge measurements of one or more structural elements after a completion of each one of multiple manufacturing phases; generating spatial spectrums, based on the multiple edge measurements, for each one of the multiple manufacturing phases; determining relationships between bands of the spatial spectrums; and identifying at least one of the manufacturing process defects based on the relationships between the bands of the spatial spectrums.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: March 23, 2021
    Assignee: Applied Materials Israel Ltd.
    Inventors: Moshe Amzaleg, Ofer Adan
  • Patent number: 10957565
    Abstract: Embodiments include systems, devices, and methods for monitoring etch or deposition rates, or controlling an operation of a wafer fabrication process. In an embodiment, a processing tool includes a processing chamber having a liner wall around a chamber volume, and a monitoring device having a sensor exposed to the chamber volume through a hole in the liner wall. The sensor is capable of measuring, in real-time, material deposition and removal rates occurring within the chamber volume during the wafer fabrication process. The monitoring device can be moved relative to the hole in the liner wall to selectively expose either the sensor or a blank area to the chamber volume through the hole. Accordingly, the wafer fabrication process being performed in the chamber volume may be monitored by the sensor, and the sensor may be sealed off from the chamber volume during an in-situ chamber cleaning process. Other embodiments are also described and claimed.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: March 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Shimin Mao, Simon Huang, Ashish Goel, Anantha Subramani, Philip Allan Kraus
  • Patent number: 10957512
    Abstract: A carrier proximity mask and methods of assembling and using the carrier proximity mask may include providing a first carrier body, second carrier body, and set of one or more clamps. The first carrier body may have one or more openings formed as proximity masks to form structures on a first side of a substrate. The first and second carrier bodies may have one or more contact areas to align with one or more contact areas on a first and second sides of the substrate. The set of one or more clamps may clamp the substrate between the first carrier body and the second carrier body at contact areas to suspend work areas of the substrate between the first and second carrier bodies. The openings to define edges to convolve beams to form structures on the substrate.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: March 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Morgan Evans, Charles T. Carlson, Rutger Meyer Timmerman Thijssen, Ross Bandy
  • Patent number: 10957590
    Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits, and more particularly, to methods for forming a layer. The layer may be a mask used in lithography process to pattern and form a trench. The mask is formed over a substrate having at least two distinct materials by a selective deposition process. The edges of the mask are disposed on an intermediate layer formed on at least one of the two distinct materials. The method includes removing the intermediate layer to form a gap between edges of the mask and the substrate and filling the gap with a different material than the mask or with the same material as the mask. By filling the gap with the same or different material as the mask, electrical paths are improved.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: March 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Wenhui Wang, Huixiong Dai, Christopher S. Ngai, Liqi Wu, Wenyu Zhang, Yongmei Chen, Hao Chen, Keith Tatseun Wong, Ke Chang
  • Patent number: 10957849
    Abstract: Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ a first pinning layer and a second pinning layer with a synthetic anti-ferrimagnetic layer disposed therebetween. The first pinning layer in contact with the seed layer can contain a single layer of platinum or palladium, alone or in combination with one or more bilayers of cobalt and platinum (Pt), nickel (Ni), or palladium (Pd), or combinations or alloys thereof, The first pinning layer and the second pinning layer can have a different composition or configuration such that the first pinning layer has a higher magnetic material content than the second pinning layer and/or is thicker than the second pinning layer. The MTJ stacks discussed herein maintain desirable magnetic properties subsequent to high temperature annealing.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: March 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Lin Xue, Chi Hong Ching, Rongjun Wang, Mahendra Pakala
  • Patent number: 10957509
    Abstract: An ion source with an insertable target holder for holding a solid dopant material is disclosed. The insertable target holder includes a hollow interior into which the solid dopant material is disposed. The target holder has a porous surface at a first end, through which vapors from the solid dopant material may enter the arc chamber. The porous surface inhibits the passage of liquid or molten dopant material into the arc chamber. The target holder is also constructed such that it may be refilled with dopant material when the dopant material within the hollow interior has been consumed. The porous surface may be a portion of a perforated crucible, a portion of a perforated retention cap, or a porous insert.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: March 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Graham Wright, Daniel Alvarado, Shreyansh P. Patel, Daniel R. Tieger
  • Patent number: 10954129
    Abstract: A method of fabricating a semiconductor structure is described. The method comprises forming at least one mandrel on a substrate, the at least one mandrel comprising a diamond-like carbon and having a top and two opposing sidewalls, the diamond-like carbon comprising at least 40% sp3 hybridized carbon atoms. The mandrel may be used in Self-Aligned Multiple Patterning (SAMP) processes.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: March 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Takehito Koshizawa, Eswaranand Venkatasubramanian, Pramit Manna, Chi Lu, Chi-I Lang, Nancy Fung, Abhijit Basu Mallick
  • Publication number: 20210082665
    Abstract: Exemplary semiconductor processing systems may include a pedestal configured to support a semiconductor substrate. The pedestal may be operable as a first plasma-generating electrode. The systems may include a lid plate defining a radial volume. The systems may include a faceplate supported with the lid plate. The faceplate may be operable as a second plasma-generating electrode. A plasma processing region may be defined between the pedestal and the faceplate within the radial volume defined by the faceplate. The faceplate may define a plurality of first apertures. The systems may include a showerhead positioned between the faceplate and the pedestal. The showerhead may define a plurality of second apertures comprising a greater number of apertures than the plurality of first apertures.
    Type: Application
    Filed: September 10, 2020
    Publication date: March 18, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Greg Toland, Kenneth D. Schatz, Laksheswar Kalita, Dmitry Lubomirsky
  • Publication number: 20210082732
    Abstract: Exemplary deposition methods may include electrostatically chucking a semiconductor substrate at a first voltage within a processing region of a semiconductor processing chamber. The methods may include performing a deposition process. The deposition process may include forming a plasma within the processing region of the semiconductor processing chamber. The methods may include halting formation of the plasma within the semiconductor processing chamber. The methods may include, simultaneously with the halting, increasing the first voltage of electrostatic chucking to a second voltage. The methods may include purging the processing region of the semiconductor processing chamber.
    Type: Application
    Filed: September 8, 2020
    Publication date: March 18, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Madhu Santosh Kumar Mutyala, Sanjay Kamath, Deenesh Padhi
  • Patent number: 10950477
    Abstract: Embodiments of the present disclosure provide an improved electrostatic chuck for supporting a substrate. The electrostatic chuck comprises a chuck body coupled to a support stem, the chuck body having a substrate supporting surface, a plurality of tabs projecting from the substrate supporting surface of the chuck body, wherein the tabs are disposed around the circumference of the chuck body, an electrode embedded within the chuck body, the electrode extending radially from a center of the chuck body to a region beyond the plurality of tabs, and an RF power source coupled to the electrode through a first electrical connection.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: March 16, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Xing Lin, Jianhua Zhou, Zheng John Ye, Jian Chen, Juan Carlos Rocha-Alvarez
  • Patent number: 10950476
    Abstract: A load port includes a panel including a back surface configured to face a front side of a housing of a factory interface. A groove formed in the back surface extends along an outer portion of the panel. The groove includes a flared base region and a neck region that extends to the flared base region. The load port further includes a seal seated in the groove. The seal is configured to engage the front side of the housing responsive to the panel being coupled to the front side of the housing.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: March 16, 2021
    Assignee: Applied Materials, Inc.
    Inventor: Luke W. Bonecutter
  • Patent number: 10948353
    Abstract: Examples described herein generally relate to apparatus and methods for rapid thermal processing (RTP) of a substrate. In one or more embodiments, a process chamber includes chamber body, a window disposed on a first portion of the chamber body, a chamber bottom, and a shield disposed on a second portion of the chamber body. The shield has a flat surface facing the window to reduce reflected radiant energy to a back side of a substrate disposed in the process chamber during operation. The process chamber further includes an edge support for supporting the substrate and a cooling member disposed on the chamber bottom. The cooling member is disposed in proximity of the edge support to cool the edge support during low temperature operation in order to improve the temperature uniformity of the substrate.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: March 16, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Lara Hawrylchak, Samuel C. Howells, Wolfgang R. Aderhold, Leonid M. Tertitski, Michael Liu, Dongming Iu, Norman L. Tam, Ji-Dih Hu
  • Patent number: 10947621
    Abstract: A method and apparatus for delivering gases to a semiconductor processing system are provided. In some embodiments, the apparatus includes a gas inlet line having an inlet valve; a gas outlet line having an outlet valve; a gas flow controller arranged to control the flow through the inlet valve; an orifice contained within at least one of the gas outlet line, the outlet valve, a chemical ampoule outlet valve, or outlet isolation valve; a chemical ampoule fluidly coupled to at least one of the gas inlet line and the gas outlet line; and a processing chamber. In some embodiments, the apparatus further includes a check valve, one or more orifices, and/or a heated divert line.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: March 16, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Adib Khan, Qiwei Liang, Srinivas D. Nemani, Tobin Kaufman-Osborn
  • Patent number: 10948834
    Abstract: Embodiments described provide dynamic imaging systems that compensates for pattern defects resulting from distortion caused by warpage of the substrate. The methods and apparatus described are useful to create compensated exposure patterns. The dynamic imaging system includes an inspection system configured to provide 3D profile measurements and die shift measurements of the first substrate to the interface configured to provide compensated pattern data to the digital lithography system configured to receive the compensated pattern data from the interface and expose the photoresist with a compensated pattern.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: March 16, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Ching-Chang Chen, Chien-Hua Lai, Wei-Chung Chen, Shih-Hao Kuo, Hsiu-Jen Wang
  • Patent number: 10948900
    Abstract: A method to assist in identifying a spectral feature and a characteristic of the selected spectral feature to monitor during polishing includes polishing a test substrate and measuring a sequence of spectra of light reflected from a substrate while the substrate is being polished, where at least some of the spectra of the sequence differ due to material being removed during the polishing. The sequence of spectra are visually displayed as a contour plot.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: March 16, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey Drue David, Harry Q. Lee, Dominic J. Benvegnu, Boguslaw A. Swedek
  • Patent number: 10950445
    Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for depositing metal silicide layers on substrates and chamber components. In one embodiment, a method of forming a hardmask includes positioning the substrate having a target layer within a processing chamber, forming a seed layer comprising metal silicide on the target layer and depositing a tungsten-based bulk layer on the seed layer, wherein the metal silicide layer and the tungsten-based bulk layer form the hardmask. In another embodiment, a method of conditioning the components of a plasma processing chamber includes flowing an inert gas comprising argon or helium from a gas applicator into the plasma processing chamber, exposing a substrate support to a plasma within the plasma processing chamber and forming a seasoning layer including metal silicide on an aluminum-based surface of the substrate support.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: March 16, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Prashant Kumar Kulshreshtha, Jiarui Wang, Kwangduk Douglas Lee, Milind Gadre, Xiaoquan Min, Paul Connors
  • Patent number: 10950698
    Abstract: Embodiments of the disclosure provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a method for processing a substrate in a processing region of a process chamber is provided. The method includes generating and flowing plasma species from a remote plasma source to a delivery member having a longitudinal passageway, flowing plasma species from the longitudinal passageway to an inlet port formed in a sidewall of the process chamber, wherein the plasma species are flowed at an angle into the inlet port to promote collision of ions or reaction of ions with electrons or charged particles in the plasma species such that ions are substantially eliminated from the plasma species before entering the processing region of the process chamber, and selectively incorporating atomic radicals from the plasma species in silicon or polysilicon regions of the substrate.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: March 16, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Matthew Scott Rogers, Roger Curtis, Lara Hawrylchak, Canfeng Lai, Bernard L. Hwang, Jeffrey Tobin, Christopher S. Olsen, Malcolm Bevan
  • Patent number: 10950430
    Abstract: Embodiments of the present disclosure relate to methods for in-situ deposition and treatment of a thin film for improved step coverage. In one embodiment, the method for processing a substrate is provided. The method includes forming a dielectric layer on patterned features of the substrate by exposing the substrate to a gas mixture of a first precursor and a second precursor simultaneously with plasma present in a process chamber, wherein the plasma is formed by a first pulsed RF power, exposing the dielectric layer to a first plasma treatment using a gas mixture of nitrogen and helium in the process chamber, and performing a plasma etch process by exposing the dielectric layer to a plasma formed from a gas mixture of a fluorine-containing precursor and a carrier gas, wherein the plasma is formed in the process chamber by a second pulsed RF power.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: March 16, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Vinayak Veer Vats, Hang Yu, Deenesh Padhi, Changling Li, Gregory M. Amico, Sanjay G. Kamath
  • Publication number: 20210074523
    Abstract: An apparatus, methods and controllers for electrostatically chucking varied substrate materials are disclosed. Some embodiments of the disclosure provide electrostatic chucks with variable polarity and/or voltage. Some embodiments of the disclosure provide electrostatic chucks able to operate as monopolar and bipolar electrostatic chucks. Some embodiments of the disclosure provide bipolar electrostatic chucks able to compensate for substrate bias and produce approximately equal chucking force at different electrodes.
    Type: Application
    Filed: September 4, 2020
    Publication date: March 11, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Vinodh Ramachandran, Ananthkrishna Jupudi, Sarath Babu
  • Publication number: 20210074526
    Abstract: System and methods of improving dynamic pressure response during recipe step transitions. An exemplary method may include changing at least one of a plurality of recipe parameters in accordance with a processing recipe while running the processing recipe on a semiconductor substrate in a processing chamber. The method may further include measuring a pressure response in the processing chamber responsive to the changing of the at least one of the plurality of recipe parameters, and determining a response error based on the pressure response and a model pressure response calculated based on the processing recipe. The method may further include, in response to determining that the response error may be greater than a threshold value, calculating an adjustment to an operation of a valve downstream of the processing chamber when changing the at least one of the plurality of recipe parameters in accordance with the processing recipe in subsequent runs.
    Type: Application
    Filed: September 6, 2019
    Publication date: March 11, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Tina Dhekial-Phukan, Michael Nichols