Abstract: Values are selected for a plurality of controllable parameters of a chemical mechanical polishing system that includes a carrier head with a plurality of zones to apply independently controllable pressures on a substrate. Data is stored relating variation in removal profile on a front surface of the substrate to variation in the controllable parameters, the data including removal at a plurality of positions on the front surface of the substrate, there being a greater number of positions than chambers. A value is determined for each parameter of the plurality of controllable parameters to minimize a difference between a target removal profile and an expected removal profile calculated from the data relating variation in removal profile on a front surface of the substrate to variation in the parameters. The value for each parameter of the plurality of controllable parameters is stored.

Abstract: A depth measuring apparatus includes (1) a camera and lens assembly that captures image data for a sequence of images of a target including a plurality of depth levels; (2) a motion stage on which the camera and lens assembly or the target is positioned; (3) a motor connected to the motion stage that causes relative movement between the camera and lens assembly and the target at defined incremental values; (4) a position sensor that captures position data on the camera and lens assembly or the target at each of the defined incremental values; and (5) a controller that processes the captured image data and captured position data using an image gradient method and optimal focal distance to determine depths of the plurality of depth levels. Numerous other aspects are provided.

Abstract: Exemplary cleaning or etching methods may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. Methods may include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor. The methods may also include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region, and the substrate may include a region of exposed oxide and a region of exposed metal. Methods may also include providing a hydrogen-containing precursor to the processing region. The methods may further include removing at least a portion of the exposed oxide.

Abstract: Methods for etching a bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) to form high aspect ratio features using an etch process are provided. The methods described herein advantageously facilitate profile and dimension control of features with high aspect ratios through a proper sidewall and bottom management scheme during the bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) open process.

Abstract: Precursors, such as interhalogens and/or compounds formed of noble gases and halogens, may be supplied in a gaseous form to a semiconductor processing chamber at a predetermined amount, flow rate, pressure, and/or temperature in a cyclic manner such that atomic layer etching of select semiconductor materials may be achieved in each cycle. In the etching process, the element of the precursor that has a relatively higher electronegativity may react with select semiconductor materials to form volatile etching byproducts. The element of the precursor that has a relatively lower electronegativity may form a gas that may be recycled to re-form an precursor with one or more halogen-containing materials using a plasma process.

Abstract: Embodiments of the present technology may include an electroplating system. The electroplating system may include a vessel. The system may also include a wafer holder configured for holding a wafer in the vessel. The system may further include an anode in the vessel. In addition, the method may include a plurality of thief electrodes. For each thief electrode of the plurality of thief electrodes, a thief current channel may be defined by a channel wall. The channel wall for each thief electrode may define an aperture adjacent to the wafer holder. The thief current channel may extend from each thief electrode to the aperture. The system may include a current control system in electrical communication with the plurality of thief electrodes. The current control system may be configured such that an amount of current delivered to each thief electrode can be adjusted independently.

Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications, particularly for spin-orbit-torque magnetic random access memory (SOT MRAM) applications. In one embodiment, a magnetic tunnel junction (MTJ) device structure includes a magnetic tunnel junction (MTJ) pillar structure disposed on a substrate, and a gap surrounding the MTJ pillar structure. In yet another embodiment, a magnetic tunnel junction (MTJ) device structure includes a spacer layer surrounding a patterned reference layer and a tunneling barrier layer disposed on a patterned free layer, and a gap surrounding the patterned free layer.

Abstract: Embodiments presented herein provide techniques for generating and optimizing a plan in a manufacturing environment. The techniques begins by receiving a plurality of demands for a plan, wherein each demand of the plurality of demands has parameters specifying a set of operations, a due date, user specified business logic and priority. The demands are ranked based on the parameters and the user specified business logic. The plurality of demands is broken into sets of demands based on the a predefined number and the demand rank. The demands in a first set of demands are optimized to generate a strategy for fulfilling the demands in the first set of demands. One or more constraints are applied to the first set of demands to ensure the first set of demands is fulfilled in preference to the remaining sets of demands.

Abstract: Susceptor assemblies comprising a susceptor with a top surface with a plurality of recesses and a bottom surface are described. A heater is positioned below the susceptor to heat the susceptor. A shield is positioned between the bottom surface of the susceptor and the heater. The shield increases deposition uniformity across the susceptor.

Abstract: A system includes a process chamber, a housing that defines a waveguide cavity, and a first conductive plate within the housing. The first conductive plate faces the process chamber. The system also includes one or more adjustment devices that can adjust at least a position of the first conductive plate, and a second conductive plate, coupled with the housing, between the waveguide cavity and the process chamber. Electromagnetic radiation can propagate from the waveguide cavity into the process chamber through apertures in the second conductive plate. The system also includes a dielectric plate that seals off the process chamber from the waveguide cavity, and one or more electronics sets that transmit the electromagnetic radiation into the waveguide cavity. A plasma forms when at least one process gas is within the chamber, and the electromagnetic radiation propagates into the process chamber from the waveguide cavity.

Abstract: An electrostatic chuck assembly with improved thermal uniformity and stability is disclosed herein. The electrostatic chuck assembly includes a puck having a chucking electrode disposed therein and a cooling base connected to the puck. The cooling base is formed a first material and includes a top surface, a first cooling channel, a second cooling channel configured to flow coolant therethrough independent of flow through the first cooling channel, and a first thermal spreading element aligned with the first cooling channel and disposed between the first cooling channel and the puck. The first thermal spreading element is formed from a second material that has a thermal conductivity higher than a thermal conductivity of the first material.

Abstract: Embodiments of the present technology may include a method of forming a stack of semiconductor layers. The method may include depositing a first silicon oxide layer on a substrate. The method may also include depositing a first silicon layer on the first silicon oxide layer. The method may further include depositing a first silicon nitride layer on the first silicon layer. Depositing the first silicon nitride layer or a stress layer may include reducing stress in at least one of the first silicon layer, the first silicon oxide layer, or the substrate. In addition, the method may include depositing a second silicon layer on the first silicon nitride layer. The operations may form the stack of semiconductor layers, where the stack includes the first silicon oxide layer, the first silicon layer, the first silicon nitride layer, and the second silicon layer.

Abstract: Methods for depositing a film comprising exposing a substrate surface to a metal precursor and a hydrazine derivative to form a metal containing film are described.

Abstract: In an embodiment, a plasma source includes a first electrode, configured for transfer of one or more plasma source gases through first perforations therein; an insulator, disposed in contact with the first electrode about a periphery of the first electrode; and a second electrode, disposed with a periphery of the second electrode against the insulator such that the first and second electrodes and the insulator define a plasma generation cavity. The second electrode is configured for movement of plasma products from the plasma generation cavity therethrough toward a process chamber. A power supply provides electrical power across the first and second electrodes to ignite a plasma with the one or more plasma source gases in the plasma generation cavity to produce the plasma products. One of the first electrode, the second electrode and the insulator includes a port that provides an optical signal from the plasma.

Abstract: A substrate carrier is described that uses a proportional thermal fluid delivery system. In one example the apparatus includes a heat exchanger to provide a thermal fluid to a fluid channel of a substrate carrier and to receive the thermal fluid from the fluid channel, the thermal fluid in the fluid channel to control the temperature of the carrier during substrate processing. A proportional valve controls the rate of flow of thermal fluid from the heat exchanger to the fluid channel. A temperature controller receives a measured temperature from a thermal sensor of the carrier and controls the proportional valve in response to the measured temperature to adjust the rate of flow.

Abstract: Processing methods comprising exposing a substrate to an optional nucleation promoter followed by sequential exposure of a first reactive gas comprising a metal oxyhalide compound and a second reactive gas to form a metal film on the substrate.

Abstract: A chemical mechanical polishing apparatus includes a platen to support a polishing pad, and an in-situ acoustic emission monitoring system including an acoustic emission sensor supported by the platen, a waveguide configured to extending through at least a portion of the polishing pad, and a processor to receive a signal from the acoustic emission sensor. The in-situ acoustic emission monitoring system is configured to detect acoustic events caused by deformation of the substrate and transmitted through the waveguide, and the processor is configured to determine a polishing endpoint based on the signal.

Abstract: An illumination module that includes a pair of anamorphic prisms that comprises a first anamorphic prism and a second anamorphic prism; wherein the pair of anamorphic prisms is configured to (a) receive a first radiation beam that propagates along a first optical axis, and (b) asymmetrically magnify the first radiation beam to provide a second radiation beam that propagates along a second optical axis that is parallel to the first optical axis; and a rectangular prism that is configured to receive the second radiation beam and perform a lateral shift of the second radiation beam to provide a third radiation beam; and a rotating mechanism that is configured to change an asymmetrical magnification of the pair of anamorphic prisms by rotating at least one of the first anamorphic prism and the second anamorphic prism.

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: A method of forming conformal amorphous metal films is disclosed. A method of forming crystalline metal films with a predetermined orientation is also disclosed. An amorphous nucleation layer is formed on a substrate surface. An amorphous metal layer is formed from the nucleation layer by atomic substitution. A crystalline metal layer is deposited on the amorphous metal layer by atomic layer deposition.