Patents Assigned to Applied Materials
  • Selective deposition for simplified process flow of pillar formation
    Patent number: 10636659
    Abstract: Methods comprising depositing a film material to form an initial film in a trench in a substrate surface are described. The film is treated to expand the film to grow beyond the substrate surface.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: April 28, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Yihong Chen, Ziqing Duan, Yong Wu, Abhijit Basu Mallick, Srinivas Gandikota
  • Method for forming brace structures for additive manufacturing
    Patent number: 10625338
    Abstract: Additive manufacturing of an object includes dispensing a plurality of successive layers of powder over a top surface of a platform, fusing an object region in each of the plurality of successive layers to form the object, and fusing a brace region in a particular layer from the plurality of layers to form a brace structure to inhibit lateral motion of the powder. The brace structure is spaced apart from the particular object region by a gap of unfused powder.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Hou T. Ng, Nag B. Patibandla, Ajey M. Joshi, Bharath Swaminathan, Ashavani Kumar, Eric Ng, Bernard Frey, Kasiraman Krishnan
  • Method and device for shallow trench isolation in a fin type field effect transistors
    Patent number: 10629741
    Abstract: A method of forming a semiconductor device may include providing a semiconductor device structure. The semiconductor device structure may include semiconductor fins pitched at a fin pitch on a substrate. The semiconductor device structure may include an isolation oxide layer on the substrate and between the semiconductor fins and a mask. The mask may be disposed over the isolation oxide layer and the mask may define at least one opening. The method may further comprise directing hot ions into the at least one opening, to implant hot ions in a volume of isolation oxide in the isolation oxide layer. The volume may be adjacent to at least one of the semiconductor fins.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Min Gyu Sung, Johannes Van Meer
  • Gate all-around device
    Patent number: 10629752
    Abstract: Gate all-around devices are disclosed in which an angled channel including a semiconducting nanostructure is located between a source and a drain. The angled channel has an axis that is oriented at an angle to the top surface of the substrate at an angle in a range of about 1° to less than about 90°. The gate all-around device is intended to meet design and performance criteria for the 7 nm technology generation.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Russell Chin Yee Teo, Benjamin Colombeau
  • Plasma abatement solids avoidance by use of oxygen plasma cleaning cycle
    Patent number: 10625312
    Abstract: Embodiments disclosed herein include a plasma abatement process that takes effluent from a processing chamber and reacts the effluent with water vapor reagent within a plasma source placed in a foreline by injecting the water vapor reagent into the foreline or the plasma source. The materials present in the effluent as well as the water vapor reagent are energized by the plasma source, converting the materials into gas species such as HF that is readily scrubbed by typical water scrubbing abatement technology. An oxygen containing gas is periodically injected into the foreline or the plasma source relative to the water vapor injection to reduce or avoid the generation of solid particles. The abatement process has good destruction removal efficiency (DRE) with minimized solid particle generation.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventor: Colin John Dickinson
  • Bottom-up growth of silicon oxide and silicon nitride using sequential deposition-etch-treat processing
    Patent number: 10626495
    Abstract: Methods for gapfill of high aspect ratio features are described. A first film is deposited on the bottom and upper sidewalls of a feature. The first film is etched from the sidewalls of the feature and the first film in the bottom of the feature is treated to form a second film. The deposition, etch and treat processes are repeated to fill the feature.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Rui Cheng, Abhijit Basu Mallick, Pramit Manna
  • Footing removal for nitride spacer
    Patent number: 10629473
    Abstract: Processing methods may be performed to remove unwanted materials from a substrate, such as an oxide footing. The methods may include forming an inert plasma within a processing region of a processing chamber. Effluents of the inert plasma may be utilized to modify a surface of an exposed material on a semiconductor substrate within the processing region of the semiconductor chamber. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified surface of the exposed material from the semiconductor substrate.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Jungmin Ko, Tom Choi
  • Method of forming self-aligned via
    Patent number: 10629484
    Abstract: Electronic devices and methods to form electronic devices having a self-aligned via are described. An adhesion enhancement layer is utilized to promote adhesion between the conductive material and the sidewalls of the at least one via opening. The self-aligned vias decrease via resistance and reduce the potential to short to the wrong metal line.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: April 21, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Suketu Arun Parikh, Mihaela Balseanu
  • SYSTEMS AND METHODS FOR HAFNIUM-CONTAINING FILM REMOVAL
    Publication number: 20200118829
    Abstract: Exemplary etching methods may include flowing a halogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The halogen-containing precursor may be characterized by a gas density greater than or about 5 g/L. The methods may include contacting a substrate housed in the substrate processing region with the halogen-containing precursor. The substrate may define an exposed region of a hafnium-containing material. The methods may also include removing the hafnium-containing material.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 16, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Zhenjiang Cui, Hanshen Zhang, Daniella Holm
  • SYSTEMS AND METHODS FOR IMPROVED SEMICONDUCTOR ETCHING AND COMPONENT PROTECTION
    Publication number: 20200118845
    Abstract: Semiconductor systems and methods may include a semiconductor processing chamber having a gas box defining an access to the semiconductor processing chamber. The chamber may include a spacer characterized by a first surface with which the gas box is coupled, and the spacer may define a recessed ledge on an interior portion of the first surface. The chamber may include a support bracket seated on the recessed ledge that extends along a second surface of the spacer. The chamber may also include a gas distribution plate seated on the support bracket.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 16, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Tien Fak Tan, Lok Kee Loh, Dmitry Lubomirsky, Soonwook Jung, Martin Yue Choy, Soonam Park
  • Methods for wordline separation in 3D-NAND devices
    Patent number: 10622251
    Abstract: Methods of wordline separation in semiconductor devices (e.g., 3D-NAND) are described. A metal film is deposited in the wordlines and on the surface of a stack of spaced oxide layers. The metal film is removed by high temperature oxidation and etching of the oxide or low temperature atomic layer etching by oxidizing the surface and etching the oxide in a monolayer fashion. After removal of the metal overburden, the wordlines are filled with the metal film.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: April 14, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Yihong Chen, Ziqing Duan, Abhijit Basu Mallick, Kelvin Chan
  • Electrostatic chuck with independent zone cooling and reduced crosstalk
    Patent number: 10622229
    Abstract: An electrostatic chuck is described with independent zone cooling that leads to reduced crosstalk. In one example, the chuck includes a puck to carry a substrate for fabrication processes, and a cooling plate fastened to and thermally coupled to the ceramic puck, the cooling plate having a plurality of different independent cooling channels to carry a heat transfer fluid to transfer heat from the cooling plate.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: April 14, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Vijay Parkhe, Konstantin Makhratchev
  • Methods of etching metal oxides with less etch residue
    Patent number: 10622221
    Abstract: Processing methods to etch metal oxide films with less etch residue are described. The methods comprise etching a metal oxide film with a metal halide etchant, and exposing the etch residue to a reductant to remove the etch residue. Some embodiments relate to etching tungsten oxide films. Some embodiments utilize tungsten halides to etch metal oxide films. Some embodiments utilize hydrogen gas as a reductant to remove etch residues.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: April 14, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Amrita B. Mullick, Abhijit Basu Mallick, Srinivas Gandikota, Susmit Singha Roy, Yingli Rao, Regina Freed, Uday Mitra
  • Method and apparatus for determining when to perform or trigger events in semi-conductor processing equipment
    Patent number: 10620620
    Abstract: Techniques are disclosed for methods and apparatuses for determining when to perform or trigger events. The technique comprises determining a first cost of false positives and a second cost of missed true positives. A Receive Operating Characteristic (ROC) of a prediction model is determined for the occurrence of one or more events. The operational area on the ROC is determined based on the first costs and second costs. A threshold is determined from the ROC and is applied to a detection or prediction function. An event is triggered based on the threshold.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: April 14, 2020
    Assignee: Applied Materials, Inc.
    Inventor: James R. Moyne
  • System for measuring level of a precursor in a container
    Patent number: 10620031
    Abstract: An apparatus for the detecting the amount of material remaining in a container is disclosed. This apparatus may be beneficial when used with a semiconductor processing device, especially when the material is in the solid phase. The apparatus measures the impedance between an electrode disposed in the container, and the outside of the container to make a determination regarding how full the container may be. In certain embodiments, only the magnitude of the impedance is used for this calculation. In other embodiments, the magnitude and phase of the impedance are used. This may be used to determine the topology of the material within the container.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: April 14, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Kazuya Daito, Vijay Venugopal
  • Bulk sintered solid solution ceramic which exhibits fracture toughness and halogen plasma resistance
    Patent number: 10622194
    Abstract: A bulk, sintered solid solution-comprising ceramic article useful in semiconductor processing, which is resistant to erosion by halogen-containing plasmas and provides advantageous mechanical properties. The solid solution-comprising ceramic article is formed from a combination of yttrium oxide and zirconium oxide. The bulk, sintered solid solution-comprising article is formed from zirconium oxide at a molar concentration ranging from about 96 mole % to about 94 mole %, and yttrium oxide at a molar concentration ranging from about 4 mole % to about 6 mole %.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: April 14, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Jennifer Y. Sun, Ren-Guan Duan, Jie Yuan, Li Xu, Kenneth S. Collins
  • PLASMA ETCHING SYSTEMS AND METHODS WITH SECONDARY PLASMA INJECTION
    Publication number: 20200111643
    Abstract: An apparatus for plasma processing includes a first plasma source, a first planar electrode, a gas distribution device, a plasma blocking screen and a workpiece chuck. The first plasma source produces first plasma products that pass, away from the first plasma source, through first apertures in the first planar electrode. The first plasma products continue through second apertures in the gas distribution device. The plasma blocking screen includes a third plate with fourth apertures, and faces the gas distribution device such that the first plasma products pass through the plurality of fourth apertures. The workpiece chuck faces the second side of the plasma blocking screen, defining a process chamber between the plasma blocking screen and the workpiece chuck. The fourth apertures are of a sufficiently small size to block a plasma generated in the process chamber from reaching the gas distribution device.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Toan Q. Tran, Soonam Park, Zilu Weng, Dmitry Lubomirsky
  • Methods for gapfill in high aspect ratio structures
    Patent number: 10615050
    Abstract: Methods for seam-less gapfill comprising depositing a film in a feature, treating the film to change some film property and selectively etching the film from the top surface are described. The deposition, treatment and etching are repeated to form a seam-less gapfill in the feature.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: April 7, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Rui Cheng, Abhijit Basu Mallick, Pramit Manna, Yihong Chen
  • Plasma reactor with non-power-absorbing dielectric gas shower plate assembly
    Patent number: 10615007
    Abstract: A gas distribution plate for a plasma reactor has a dielectric front plate and a dielectric back plate bonded together, with gas injection orifices extending through the front plate and gas supply channels in the surface of front plate facing the back plate. The back plate is joined to a heat reflective plate, or the back plate itself is formed of a heat reflective material, such as Beryllium Oxide.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: April 7, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Michael W. Stowell, Qiwei Liang
  • Methods and materials for modifying the threshold voltage of metal oxide stacks
    Patent number: 10615041
    Abstract: Methods of modifying the threshold voltage of metal oxide stacks are discussed. These methods utilize materials which provide larger shifts in threshold voltage while also being annealed at lower temperatures.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: April 7, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Siddarth Krishnan, Rajesh Sathiyanarayanan, Atashi Basu, Paul F. Ma