Abstract: A method of forming a silicon oxide layer on a substrate. The method includes providing a substrate and forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species. The method further includes exposing the first silicon oxide layer to a plurality of silicon-containing species to form a plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer. Additionally, the method includes annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate. At least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer and unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.

Abstract: A method of fabricating multilayer interconnect structures on a semiconductor wafer begins by roughening the interior surface of a metal lid to a surface roughness in excess of SA 2000 with a reentrant surface profile, and installing the metal lid as the ceiling of a plasma clean reactor chamber having a wafer pedestal facing the interior surface of the ceiling.

Abstract: An electrode assembly 12 for a PECVD (Plasma Enhanced Chemical Vapour Deposition) coating installation comprises a base plate 13, a separation plate 14 and an electrode plate 15. The electrode plate 15 includes frame members 16. Fixing elements 17 are provided for fixing the electrode plate 15 to the base plate 13. Furthermore, the electrode assembly 12 comprises a plurality of gas distribution elements 2 that distribute process gas to provide a homogeneous plasma P above the surface of a substrate 19. In this way a uniform coating can be deposited on the substrate 19. The gas distribution elements 2 are modules having a similar or identical construction. Therefore, they may be manufactured in particular machines and handled easily before being integrated in an electrode assembly according to the present invention.

Abstract: According to a first aspect, a first conveyor system is provided that is adapted to deliver substrate carriers within a semiconductor device manufacturing facility. The first conveyor system includes a ribbon that forms a closed loop along at least a portion of the semiconductor device manufacturing facility. The ribbon is adapted to (1) be flexible in a horizontal plane and rigid in a vertical plane; and (2) transport a plurality of substrate carriers within at least a portion of the semiconductor device manufacturing facility. Numerous other aspects are provided, as are systems, methods and computer program products in accordance with these and other aspects.

Abstract: A method, a system and a computer readable medium for three dimensional packaging with wafer-level bonding and chip-level repair. A first wafer is provided having a first plurality of chips. A second wafer is provided having a second plurality of chips. At least one chip is removed from the second wafer while retaining the relative alignment of the remaining chips in the second wafer. The first and second wafers are aligned and joined with wafer-to-wafer techniques. Where a bad chip having a relative physical position within the second wafer corresponding to a relative physical position within the first wafer of a good chip is removed, a good chip may be aligned and bonded to the first wafer using die-to-wafer techniques.

Abstract: An apparatus and a method of controlling an electroless deposition process by directing electromagnetic radiation towards the surface of a substrate and detecting the change in intensity of the electromagnetic radiation at one or more wavelengths reflected off features on the surface of the substrate. In one embodiment the detected end of an electroless deposition process step is measured while the substrate is moved relative to the detection mechanism. In another embodiment multiple detection points are used to monitor the state of the deposition process across the surface of the substrate. In one embodiment the detection mechanism is immersed in the electroless deposition fluid on the substrate. In one embodiment a controller is used to monitor, store, and/or control the electroless deposition process by use of stored process values, comparison of data collected at different times, and various calculated time dependent data.

Abstract: A method and apparatus for testing a plurality of electronic devices formed on a large area substrate is described. In one embodiment, the apparatus performs a test on the substrate in one linear axis in at least one chamber that is slightly wider than a dimension of the substrate to be tested. Clean room space and process time is minimized due to the smaller dimensions and volume of the system.

Abstract: A method for focusing a charged particle beam, the method includes: (a) altering a focal point of a charged particle beam according to a first focal pattern while scanning a first area of a sample and collecting a first set of detection signals; (b) altering a focal point of a charged particle bean according to a second focal pattern while scanning a second area that is ideally identical to the first area and collecting a second set of detection signals; and (c) processing the first and second set of detection signals to determine a focal characteristic; whereas the first focal pattern and the second focal pattern differ by the location of an optimal focal point.

Abstract: Methods are disclosed of fabricating a compound nitride semiconductor structure. A substrate is disposed over a susceptor in a processing chamber, with the susceptor in thermal communication with the substrate. A group-III precursor and a nitrogen precursor are flowed into the processing chamber. The susceptor is heated with a nonuniform temperature profile to heat the substrate. A nitride layer is deposited over the heated substrate with a thermal chemical vapor deposition process within the processing chamber using the group-III precursor and the nitrogen precursor.

Abstract: An apparatus for providing a short return current path for RF current between a process chamber wall and a substrate support is provided. The RF grounding apparatus, which is RF grounded and is place above the substrate transfer port, establishes electrical contact with the substrate support only during substrate processing, such as deposition, to provide return current path for the RF current. One embodiment of the RF grounding apparatus comprises one or more low impedance flexible curtains, which are electrically connected to the grounded chamber wall, and to one or more low impedance blocks, which make contacts with the substrate support during substrate processing. Another embodiment of the RF grounding apparatus comprises a plurality of low impedance flexible straps, which are electrically connected to the grounded chamber wall, and to one or more low impedance blocks, which make contacts with the substrate support during substrate processing.

Abstract: A substrate is maintained beneath a substrate mounting surface with a retaining ring that includes a generally annular lower portion having a bottom surface for contacting the polishing surface during polishing, and a generally annular upper portion having a bottom surface joined to the lower portion and a top surface fixed to and abutting the base. The lower portion is made of a plastic and the upper lower portion is made of a metal which is more rigid than the plastic.

Abstract: A gas mixing system for a semiconductor wafer processing chamber is described. The mixing system may include a gas mixing chamber concentrically aligned with a gas transport tube that extends to a blocker plate. The gas mixing chamber and the transport tube are separated by a porous barrier that increases a duration of gas mixing in the gas mixing chamber before processes gases migrate into the transport tube. The system may also include a gas mixing insert having a top section with a first diameter and a second section with a second diameter smaller than the first diameter and concentrically aligned with the top section. The processes gases enter the top section of the insert and follow channels through the second section that cause the gases to mix and swirl in the gas mixing chamber. The second section extends into the gas mixing chamber while still leaving space for the mixing and swirling around the sidewalls and bottom of the mixing chamber.

Abstract: The present invention comprises an electrode arrangement for a coating device with a stationary first electrode (3) and a second movable electrode (18), whose principle surfaces are opposing each other during coating, wherein the second electrode (18) may be moved along a plane parallel to the opposing principle surfaces, wherein at least one end face of an electrode running transversely to the principal surface an electrical shield (12, 19, 13) is provided, which extends at least partially parallel to the end face of one electrode, wherein at least one part (14) of the shield is formed so as to be movable.

Abstract: Substrate processing systems are described. The systems may include a processing chamber, and a substrate support assembly at least partially disposed within the chamber. The substrate support assembly is rotatable by a motor yet still allows electricity, cooling fluids, gases and vacuum to be transferred from a non-rotating source outside the processing chamber to the rotatable substrate support assembly inside the processing chamber. Cooling fluids and electrical connections can be used to raise or lower the temperature of a substrate supported by the substrate support assembly. Electrical connections can also be used to electrostatically chuck the wafer to the support assembly. A rotary seal or seals (which may be low friction O-rings) are used to maintain a process pressure while still allowing substrate assembly rotation. Vacuum pumps can be connected to ports which are used to chuck the wafer.

Abstract: A semiconductor processing system is described. The system includes a processing chamber having an interior capable of holding an internal chamber pressure below ambient atmospheric pressure. The system also includes a pumping system coupled to the chamber and adapted to remove material from the processing chamber. The system further includes a substrate support pedestal, where the substrate support pedestal is rigidly coupled to a substrate support shaft extending through a wall of the processing chamber. A bracket located outside the processing chamber is provided which is rigidly and sometimes rotatably coupled to the substrate support shaft. A motor coupled to the bracket can be actuated to vertically translate the substrate support pedestal, shaft and bracket from a first position to a second position closer to a processing plate.

Abstract: An exhaust foreline for purging fluids from a semiconductor fabrication chamber is described. The foreline may include a first, second and third ports independently coupled to the chamber. A semiconductor fabrication system is also described that includes a substrate chamber that has a first, second and third interface port. The system may also include a multi-port foreline that has a first, second and third port, where the first foreline port is coupled to the first interface port, the second foreline port is coupled to the second interface port, and the third foreline port is coupled to the third interface port. The system may further include an exhaust vacuum coupled to the multi-port foreline.

Abstract: A method of forming a dielectric stack on a pre-treated surface. The method comprises pre-cleaning a semiconductor wafer to remove native oxide, such as by applying hydrofluoric acid to form an HF-last surface, pre-treating the HF-last surface with ozonated deionized water, forming a dielectric stack on the pre-treated surface and providing a flow of NH3 in a process zone surrounding the wafer. Alternately, the method includes pre-treating the HF-last surface with NH3, forming the stack after the pre-treating, and providing a flow of N2 in a process zone surrounding the wafer after the forming. The method also includes pre-treating the HF-last surface using an in-situ steam generation process, forming the stack on the pre-treated surface, and annealing the wafer after the forming.

Abstract: A magnetic arrangement for a planar magnetron, in which an initial magnetic pole encompasses a second magnetic pole. This magnetic arrangement is moved linear in longitudinal direction to a target by a specific value and then moved back in opposite direction by the same value. In one version, an additional perpendicular motion is effected. The magnet arrangement is designed so that north and south pole interlock and waviform racetracks are generated. This enables constant sputtering from the entire target surface.

Abstract: Techniques for attaching a retaining ring to a carrier head so that the bottom surface of the retaining ring is orthogonal to a central rotational axis of the carrier head are described.