Patents Assigned to Applied Materials
  • Patent number: 7531469
    Abstract: The present invention generally provides methods and apparatus for controlling ion dosage in real time during plasma processes. In one embodiment, ion dosages may be controlled using in-situ measurement of the plasma from a mass distribution sensor combined with in-situ measurement from an RF probe.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: May 12, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Seon-Mee Cho, Tsutomu Tanaka, Majeed A. Foad
  • Patent number: 7532952
    Abstract: In one aspect, improved methods and apparatus for pressure control in an electronic device manufacturing system are provided. The method includes acquiring information related to a current state of the electronic device manufacturing system, determining a desired value of a first parameter of the electronic device manufacturing system based on the acquired information and adjusting at least one parameter of a pump to obtain the desired value of the first parameter of the electronic device manufacturing system.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: May 12, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Mark W. Curry, Sebastien Raoux, Peter Porshnev
  • Publication number: 20090117491
    Abstract: Methods and systems are disclosed that provide multiple lithography exposures on a wafer, for example, using interference lithography and optical photolithography. Various embodiments may balance the dosage and exposure rates between the multiple lithography exposures to provide the needed exposure on the wafer. Other embodiments provide for assist features and/or may apply resolution enhancement to various exposures. In a specific embodiment, a wafer is first exposed using optical photolithography and then exposed using interference lithography.
    Type: Application
    Filed: August 27, 2008
    Publication date: May 7, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Rudolf Hendel, Zhilong Rao, Kuo-Shih Liu, Chris A. Mack, John S. Petersen, Shane Palmer
  • Publication number: 20090114528
    Abstract: A magnet/target assembly 1 comprises a target 2 consisting of a plurality of (virtual) segments 2.1, 2.2, 2.3, 2.4, 2.5, 2.6 arranged side by side, each of them extending along the longitudinal axis x of the target 2. Each of the plurality of target segments 2.1, 2.2, 2.3, 2.4, 2.5, 2.6 has a magnet system 3.1, 3.2, 3.3, 3.4, 3.5, 3.6 attributed to the respective target segment. In an embodiment of the target/magnet assembly 1 according to the present invention the magnet systems 3.1, 3.2, 3.3, 3.4, 3.5, 3.6 are arranged mutually offset relative to their respective adjacent magnet systems 3.1, 3.2, 3.3, 3.4, 3.5 and 3.6, respectively, while scanning the target segments 2.1, 2.2, 2.3, 2.4, 2.5 and 2.6, respectively. Particularly, the first magnet system 3.1, the third magnet system 3.3 and the fifth magnet system 3.5 are a first group of magnet systems moving parallel and synchronously with each other, and the second magnet system 3.2, the forth magnet systems 3.4 and the sixth magnet system 3.
    Type: Application
    Filed: November 7, 2007
    Publication date: May 7, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Ralph Lindenberg, Marcus Bender, Tobias Stolley, Andreas Kloeppel, Andreas Lopp, Christoph Moelle
  • Publication number: 20090113684
    Abstract: Techniques for a door system for sealing an opening between two chambers in a semiconductor processing system are described. The opening has at least one angled corner. The door system includes a door, actuator, and sealing member. The door is moveable in the plane and has at least one angled corner to align the door with the opening. The actuator moves the door to selectively open and close the opening. The sealing member seals the opening when the door is in a closed position. The door is sized to apply substantially uniform seal compression to the sealing member when in the closed position.
    Type: Application
    Filed: October 17, 2008
    Publication date: May 7, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Won B. Bang, Yen-Kun Victor Wang, Lawrence Chung-Lai Lei
  • Patent number: 7527141
    Abstract: In a semiconductor fabrication facility, a conveyor transports substrate carriers. The substrate carriers are unloaded from the conveyor and loaded onto the conveyor without stopping the conveyor. A load and/or unload mechanism lifts the substrate carriers from the conveyor during unloading operations, while matching the horizontal speed of the conveyor. Similarly, during loading operations, the load/unload mechanism lowers a substrate carrier into engagement with the conveyor while matching the horizontal speed of the conveyor. Individual substrates, without carriers, may be similarly loaded and/or unloaded from a conveyor.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Michael Robert Rice, Robert B. Lowrance, Martin R. Elliott, Jeffrey C. Hudgens, Eric A. Englhardt
  • Patent number: 7527694
    Abstract: In one embodiment, a substrate centering apparatus for centering a substrate on a substrate support is provided. In one embodiment, the invention comprises an apparatus that is mounted to an underside of a substrate support and includes a lever that projects upward through a support surface of the substrate support. The lever may be biased toward a center of the substrate support to contact an edge of a substrate. A mechanism is coupled to the lever and moves the lever radially outward to release the substrate. In one embodiment, the mechanism is actuated as the substrate support moves downward to a position that facilitates substrate handoff.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Inc.
    Inventor: Satish Sundar
  • Patent number: 7528940
    Abstract: A system and method for inspecting an object. The system includes: a traveling lens acousto-optic device adapted to generate a traveling lens that propagates through an active region of the traveling lens acousto-optic device; a first scanner, adapted to direct a beam of light towards the traveling lens while the traveling lens propagates; a first beam splitter, adapted to receive a beam formed by the traveling lens; and to split the scanned beam to multiple illuminating light beams; multiple detectors; and an objective lens; adapted to receive the multiple illuminating light beams, direct the multiple illuminating light beams towards multiple areas of the object, receive multiple collected light beams from the multiple areas of the object, and direct the multiple collected light beams towards the multiple detectors; wherein each detector is associated with an area of the multiple areas.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Israel, Ltd.
    Inventors: Alexander Veis, Yoram Saban
  • Patent number: 7528357
    Abstract: A circuit including: an optical detector for detecting an optical pulse and generating therefrom a current pulse on an output; a pulse detector circuit having an input electrically connected to the optical detector and having an output for outputting a detection pulse in response to detecting the current pulse on its input, said pulse detector circuit including: a resettable amplifier including an input for receiving the current pulse from the optical detector, a reset terminal for resetting the amplifier after the amplifier detects the current pulse on its input, and an output for outputting a signal from which the detection pulse is derived; and a reset delay chain feeding back to the reset terminal of the resettable amplifier a feedback signal derived from the output signal of the resettable amplifier.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Behzad Razavi, Lawrence C. West, Bryan D. Ackland
  • Patent number: 7529421
    Abstract: Methods and apparatus for correcting defects, such as rounded corners and line end shortening, in patterns formed via lithography are provided. Such defects are compensated for “post-rasterization” by manipulating the grayscale values of pixel maps.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Robert J. Beauchaine, Thomas E. Chabreck, Samuel C. Howells, John J. Hubbard, Asher Klatchko, Peter Pirogovsky, Robin L. Teitzel
  • Patent number: 7528051
    Abstract: A method of fabricating a semiconductor device, where the method includes forming a transistor on a substrate, where the transistor includes a channel region configured to conduct charge between a source region and a drain region, forming a trench adjacent to the transistor, depositing a material on the substrate and within the trench, and annealing the material, where the material is tensile following the annealing and creates a tensile stress in the channel region. Also, a method of forming a trench isolation in a semiconductor device, where the method includes forming a trench in a substrate, forming a material within the trench at a lower deposition rate, forming the material on the substrate at a higher deposition rate after the depositing of the material within the trench, and annealing the material, where after the annealing the material in the trench is tensile.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Reza Arghavani, Zheng Yuan, Ellie Y. Yieh, Shankar Venkataraman, Nitin K. Ingle
  • Patent number: 7528614
    Abstract: A method for electrically testing a wafer that includes: receiving a wafer having a first layer that is at least partly conductive and a second layer formed over the first layer, following production of openings in the second layer; directing towards the wafer a first set of beams of charged particles that are oriented at a first set of angles in relation to the wafer, wherein each angle of the first set of angles deviates substantially from normal, so as to pre-charge an area of the second layer without substantially pre-charging the first layer; scanning the area of the wafer by a second set of beams of charged particles that are oriented at a second set of angles in relation to the wafer, and collecting charged particles scattered from the area wafer.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Inc.
    Inventor: Eugene Thomas Bullock
  • Patent number: 7527271
    Abstract: The present invention relates to an apparatus and method for improving and speeding up substrate loading process. One embodiment provides a method for vacuum chucking a substrate. The method comprises venting a center chamber of a flexible membrane configured for mounting the substrate, moving the substrate such that a backside of the substrate is in full contact with the flexible membrane, and vacuuming the center chamber to vacuum chuck the backside of the substrate to the flexible membrane.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Jeonghoon Oh, Andrew Nagengast, Steven M. Zuniga, Hung Chih Chen
  • Patent number: 7527713
    Abstract: A quadruple electromagnetic coil array coaxially arranged in a rectangular array about a chamber axis outside the sidewalls of a plasma sputter reactor, preferably in back of an RF coil within the chamber. The coil currents can be separately controlled to produce different magnetic field distributions, for example, between a sputter deposition mode in which the sputter target is powered to sputter target material onto a wafer and a sputter etch mode in which the RF coil supports the gas sputtering the wafer. The coil array may include a tubular magnetic core, particularly useful for suppressing stray fields. A water cooling coil may be wrapped around the coil array to cool all the coils. The electromagnets can be powered in different relative polarities in a multi-step process.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Tza-Jing Gung, Mark A. Perrin, Andrew Gillard
  • Patent number: 7529435
    Abstract: An optical signal distribution network including a semiconductor substrate including a waveguide formed therein to carry an optical signal; and a plurality of detectors within the waveguide and serially arranged along its length, each of the detectors being capable of detecting the optical signal passing through it and sufficiently transparent to the optical signal to enable the optical signal to reach and be detected by all of the plurality of detectors.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: May 5, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Lawrence C. West, Dan Mayden
  • Publication number: 20090111056
    Abstract: Methods and systems are disclosed that provide multiple lithography exposures on a wafer, for example, using interference lithography and optical photolithography. Various embodiments may balance the dosage and exposure rates between the multiple lithography exposures to provide the needed exposure on the wafer. Other embodiments provide for assist features and/or may apply resolution enhancement to various exposures. In a specific embodiment, a wafer is first exposed using optical photolithography and then exposed using interference lithography.
    Type: Application
    Filed: August 27, 2008
    Publication date: April 30, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Rudolf Hendel, Zhilong Rao, Kuo-Shih Liu, Chris A. Mack, John S. Petersen, Shane Palmer
  • Publication number: 20090110518
    Abstract: An electronic device manufacturing system is disclosed. The system includes a processing tool having one or more processing chambers each adapted to perform an electronic device manufacturing process on one or more substrates; a substrate carrier adapted to couple to the system and carry one or more substrates; and a component adapted to create a sealed environment relative to at least a portion of the substrate carrier and to substantially equalize the sealed environment with an environment within the substrate carrier. Methods of the invention are described as are numerous other aspects.
    Type: Application
    Filed: October 23, 2008
    Publication date: April 30, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Michael Robert Rice, Jeffrey C. Hudgens
  • Patent number: 7524762
    Abstract: In one embodiment, a method for forming a tantalum-containing material on a substrate is provided which includes heating a liquid tantalum precursor containing tertiaryamylimido-tris(dimethylamido) tantalum (TAIMATA) to a temperature of at least 30° C. to form a tantalum precursor gas and exposing the substrate to a continuous flow of a carrier gas during an atomic layer deposition process. The method further provides exposing the substrate to the tantalum precursor gas by pulsing the tantalum precursor gas into the carrier gas and adsorbing the tantalum precursor gas on the substrate to form a tantalum precursor layer thereon. Subsequently, the tantalum precursor layer is exposed to at least one secondary element-containing gas by pulsing the secondary element-containing gas into the carrier gas while forming a tantalum barrier layer on the substrate.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: April 28, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Christophe Marcadal, Rongjun Wang, Hua Chung, Nirmalya Maity
  • Patent number: 7524750
    Abstract: A process is provided for depositing an silicon oxide film on a substrate disposed in a process chamber. A process gas that includes a halogen source, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The silicon oxide film is deposited over the substrate with a halogen concentration less than 1.0%. The silicon oxide film is deposited with the plasma using a process that has simultaneous deposition and sputtering components. The flow rate of the halogen source to the process chamber to the flow rate of the silicon source to the process chamber is substantially between 0.5 and 3.0.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: April 28, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Srinivas D. Nemani, Young S. Lee, Ellie Y. Yieh, Anchuan Wang, Jason Thomas Bloking, Lung-Tien Han
  • Patent number: 7524374
    Abstract: Embodiments of the present invention are directed to an apparatus for generating a precursor for a semiconductor processing system (320). The apparatus includes a canister (300) having a sidewall (402), a top portion and a bottom portion. The canister (300) defines an interior volume (438) having an upper region (418) and a lower region (434). In one embodiment, the apparatus further includes a heater (430) partially surrounding the canister (300). The heater (430) creates a temperature gradient between the upper region (418) and the lower region (434). Also claimed is a method of forming a barrier layer from purified pentakis (dimethylamido) tantalum, for example a tantalum nitride barrier layer by atomic layer deposition.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: April 28, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Ling Chen, Vincent W. Ku, Hua Chung, Christophe Marcadal, Seshadri Ganguli, Jenny Lin, Dien-Yeh Wu, Alan Ouye, Mei Chang