Patents Assigned to Applied Materials
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Patent number: 6197694Abstract: A method is described for cleaning a silicon surface of a semiconductor wafer in a vacuum chamber while radiantly heating said silicon surface to maintain it within a first temperature range in the presence of hydrogen gas; then quickly cooling the wafer down to a second temperature range by reducing the radiant heat; and then forming a layer of either polysilicon or oxide over the cleaned surface within this second temperature range without removing the cleaned wafer from the chamber. By cleaning the wafer and then depositing polysilicon or growing oxide over the cleaned silicon surface in the same vacuum chamber, formation of oxides and other contaminants on the cleaned silicon surface between the cleaning step and the deposition or growth step is inhibited, resulting in a higher quality polysilicon or oxide layer formed over the cleaned silicon surface.Type: GrantFiled: July 31, 1996Date of Patent: March 6, 2001Assignee: Applied Materials, Inc.Inventor: Israel Beinglass
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Patent number: 6199157Abstract: A system, method and medium for configuring an item such as a machine having multiple optional components is provided. This is accomplished using “options,” which correspond to the optional components of the machine, and are selected by a user according to those optional components that the user desires to have as part of the machine. Each option is envisioned to be created to contain the necessary properties (such as attributes and constraints) to appropriately configure the corresponding optional component within the machine. Embodiments of the present invention envision that the options can be arranged in a hierarchical option tree to help allow a user to better visualize the structure of the machine in making decisions concerning configuration.Type: GrantFiled: March 30, 1998Date of Patent: March 6, 2001Assignee: Applied Materials, Inc.Inventors: Dan Bar Dov, Oded Ben-Haim, Roy Lauer, Amotz Maimon, Michael Palatnik
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Patent number: 6198976Abstract: A substrate center-finding method and apparatus, for determining the center of a substrate being passed through a substrate handling chamber of a substrate processing system, includes any number of sensors arranged in any configuration and permits the substrate to pass through any trajectory that triggers the sensors. The locations of the sensors are calibrated by homing in on the sensors using a point, the reference point, near the tip of an arm assembly on a substrate handler. The substrate handler has an encoder for sensing the pivot angles of links in the arm assembly, whereby the coordinates of the reference point can be calculated from the angles and lengths of the links. When the substrate triggers a sensor, the location of the reference point is again calculated, and the coordinates of the trigger point on the edge of the substrate is determined relative to the reference point.Type: GrantFiled: March 4, 1998Date of Patent: March 6, 2001Assignee: Applied Materials, Inc.Inventors: Satish Sundar, Peter F. Ebbing
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Patent number: 6197167Abstract: The invention provides a method for depositing a metal film on a substrate, comprising generating a high density plasma in a chamber, sputtering metal particles from a target to the substrate, and applying a modulated radio frequency (RF) bias to the substrate during deposition. Another aspect of the invention provides an apparatus for depositing a metal film on a substrate comprising a high density plasma physical vapor deposition (HDP PVD) chamber and a controller to modulate a RF bias power applied to a substrate in the chamber.Type: GrantFiled: October 12, 1999Date of Patent: March 6, 2001Assignee: Applied Materials, Inc.Inventor: Yoichiro Tanaka
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Patent number: 6197117Abstract: An apparatus and method for monitoring the level of a semiconductor processing chamber susceptor and the inclination of a wafer residing within a pocket of the susceptor. In one embodiment, a light beam transmitter is positioned to direct a light beam, such as a laser beam, onto the top surface of a wafer that has been positioned within a susceptor pocket. The light beam forms a target spot of a particular size and shape on the surface of the wafer. A camera is positioned to observe the target spot. A change in the angular orientation of the wafer or susceptor will result in a change in the size and shape of the target spot. The camera is configured to detect changes in the target spot size and shape. A logic circuit is provided at the output of the camera to correlate the observed shape and size of the target spot to a value indicative of the levelness of the susceptor and/or the inclination of a wafer located within the pocket of the susceptor.Type: GrantFiled: July 23, 1997Date of Patent: March 6, 2001Assignee: Applied Materials, Inc.Inventors: Shih-Hung Li, Curtis Vass
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Patent number: 6196532Abstract: The present invention generally provides a workpiece handling device and, more particularly, a vacuum operated chuck for securing a substrate to a substrate handling device. In one embodiment, the invention provides a chuck having three vacuum chuck rings projecting from a chuck base and having no resilient materials such as o-rings or the like exposed to the operating environment within which the wafer is being handled. In another embodiment, the present invention provides a substrate handling chuck having removable vacuum chuck rings for permitting interchangeable chuck ring elements for a particular application.Type: GrantFiled: August 27, 1999Date of Patent: March 6, 2001Assignee: Applied Materials, Inc.Inventor: Robert Otwell
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Patent number: 6198616Abstract: A method and apparatus for retaining a substrate, such as a semiconductor wafer, upon an electrostatic chuck within a semiconductor wafer processing system. Specifically, the invention contains high voltage, DC power supply that is capable of both sourcing and sinking current at any polarity of output voltage level. This power supply is coupled to at least one electrode of an electrostatic chuck. Consequently, the power supply can be used to dynamically control the chucking voltage in response to any indicia of optimal chucking including leakage current, wafer-to-chuck potential, backside gas leakage rate, and the like.Type: GrantFiled: April 3, 1998Date of Patent: March 6, 2001Assignee: Applied Materials, Inc.Inventors: Mahmoud Dahimene, Richard R. Mett, Siamak Salimian
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Patent number: 6192829Abstract: The present invention provides exemplary antenna coil assemblies and substrate processing chambers using such assemblies. In one embodiment, an antenna coil assembly (100) for a substrate processing chamber includes an antenna coil (102) disposed in a frame (104). The frame includes a plurality of spaced apart tabs (120) around a periphery of the frame, with the coil coupled to the frame at the tabbed locations. At least one notch (122) is provided between each pair of adjacent tabs. The notches are adapted to facilitate thermal expansion and contraction of the frame at the notched locations to reduce stresses on the frame and coil connections.Type: GrantFiled: September 17, 1999Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Michael P. Karazim, Tetsuya Ishikawa, Rudolf Gujer, Thomas Kring, Pavel Staryuk, Abhi Desai, Tom Cho, Michael Douglas
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Patent number: 6194325Abstract: A plasma etch process is described for the etching of oxide with a high selectivity to nitride, including nitride formed on uneven surfaces of a substrate, e.g., on sidewalls of steps on an integrated circuit structure. The addition of one or more hydrogen-containing gases, preferably one or more hydrofluorocarbon gases, to one or more fluorine-substituted hydrocarbon etch gases and a scavenger for fluorine, in a plasma etch process for etching oxide in preference to nitride, results in a high selectivity to nitride which is preserved regardless of the topography of the nitride portions of the substrate surface. In a preferred embodiment, one or more oxygen-bearing gases are also added to reduce the overall rate of polymer deposition on the chamber surfaces and on the surfaces to be etched, which can otherwise reduce the etch rate and cause excessive polymer deposition on the chamber surfaces. The fluorine scavenger is preferably an electrically grounded silicon electrode associated with the plasma.Type: GrantFiled: December 4, 1995Date of Patent: February 27, 2001Assignee: Applied Materials Inc.Inventors: Chan Lon Yang, Jeffrey Marks, Nicolas Bright, Kenneth S. Collins, David Groechel, Peter Keswick
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Patent number: 6194628Abstract: An apparatus for preventing particulate matter and residue build-up within a vacuum exhaust line of a semiconductor processing device. The apparatus uses RF energy to form excite the constituents of particulate matter exhausted from a semiconductor processing chamber into a plasma state such that the constituents react to form gaseous products that may be pumped through the vacuum line. The apparatus may include a collection chamber structured and arranged to collect particulate matter flowing through the apparatus and inhibiting egress of the particulate matter from the apparatus. The apparatus may further include an electrostatic collector to enhance particle collection in the collection chamber and to further inhibit egress of the particulate matter.Type: GrantFiled: September 25, 1995Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Ben Pang, David Cheung, William N. Taylor, Jr., Sebastien Raoux, Mark Fodor
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Patent number: 6193855Abstract: The present invention provides a method and apparatus for achieving conformal step coverage of one or more materials on a substrate using sputtered ionized material. A plasma is struck and maintained in a processing region by coupling energy into one or more gases. A target disposed in the processing region provides a source of material to be sputtered and then ionized in the plasma environment. During deposition of material onto the substrate, the plasma density is modulated by varying the energy supplied to the plasma. During a period of plasma decay, a bias to a substrate support member is increased to a relatively higher power to periodically enhance the attraction of positively charged particles to the substrate during the afterglow period of the plasma. In one embodiment, a bias to the target is also modulated.Type: GrantFiled: October 19, 1999Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Praburam Gopalraja, John Forster
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Patent number: 6192898Abstract: The present invention provides a method and apparatus for cleaning deposits in a chemical vapor deposition (“CVD”) chamber equipped for generating a plasma A gas supplying line is connected to the CVD chamber to deliver a cleaning gas that reacts with the deposits formed therein. When all of the deposits have been reacted and the chamber is clean, the pressure in the chamber will change, either increasing or decreasing. A pressure detector located beyond an adjustable valve in the exhaust line allows the reaction end point to be determined, while allowing the adjustable valve to maintain a constant pressure in the chamber itself.Type: GrantFiled: March 13, 1999Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Terukazu Aitani, Takaaki Yamamoto
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Patent number: 6194038Abstract: A method and apparatus for depositing a conformal dielectric layer employing a dep-etch technique features selectively reducing the flow of deposition gases into a process chamber where a substrate having a stepped surface to be covered by the conformal dielectric layer is disposed. By selectively reducing the flow of deposition gases into the process chamber, the concentration of a sputtering gas, from which a plasma is formed, in the process chamber is increased without increasing the pressure therein. It is preferred that the flow of deposition gases be periodically terminated so as to provide a sputtering gas concentration approaching 100%. In this fashion, the etch rate of a conformal dielectric layer having adequate gap-filling characteristics may be greatly increased, while allowing an increase in the deposition rate of the same.Type: GrantFiled: March 20, 1998Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventor: Kent Rossman
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Patent number: 6193802Abstract: An apparatus for minimizing deposition in an exhaust line of a substrate processing chamber. The apparatus includes first and second electrodes having opposing surfaces that define a fluid conduit between them. The fluid conduit includes an inlet, an outlet and a collection chamber between the inlet and the outlet. The apparatus is connected at its inlet to receive the exhaust of the substrate processing chamber. The collection chamber is structured and arranged to collect particulate matter flowing through the fluid conduit and to inhibit egress of the particulate matter from the collection chamber. A plasma generation system supplies power to the electrodes to form a plasma from etchant gases within the fluid conduit. Constituents from the plasma react with the particulate matter collected in the collection chamber to form gaseous products that may be pumped out of the fluid conduit.Type: GrantFiled: October 30, 1996Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Ben Pang, David Cheung, William N. Taylor, Jr., Sebastien Raoux, Mark Fodor
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Patent number: 6192601Abstract: The present invention provides method and apparatus for reducing particulate contamination during the processing of a substrate. In one embodiment, the step of preheating a substrate in a preheater to a desired temperature. The preheated substrate is transferred from the preheater to a buffer region having a pressure therein that is between about two (2) Torr and about seven hundred and sixty (760) Torr. The preheated substrate is transferred from the buffer region to a reaction chamber. Thermophoretic forces help repel particles away from the substrate surface during substrate transfer.Type: GrantFiled: May 30, 2000Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Steve G. Ghanayem, Madhavi Chandrachood
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Patent number: 6193813Abstract: A method of processing a substrate, such as a semiconductor wafer, in a vacuum processing chamber includes the steps of depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases by flowing SiH4 into the chamber. Preferably, WSix is deposited on a semiconductor wafer using a mixture comprising WF6, dichlorosilane and a noble gas, and the chamber is subsequently purged of residual WF6 and dichlorosilane by flowing SiH4 into the chamber. A further method of processing a substrate in a vacuum processing chamber includes the step of conditioning the chamber by flowing SiH4 into the chamber prior to depositing a material on the surface of the substrate. Semiconductor wafers processed according to the inventive method are characterized by more uniform sheet resistance values and reduced film stress.Type: GrantFiled: September 28, 1998Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Meng Chu Tseng, Mei Chang, Ramanujapuram A. Srinivas, Klaus-Dieter Rinnen, Moshe Eizenberg, Susan Telford
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Patent number: 6192827Abstract: In a substrate vacuum processing chamber, a second inner slit passage door apparatus and method to supplement the normal slit valve and its door at the outside of the chamber. The inner slit passage door, blocks the slit passage at or adjacent the substrate processing location in a vacuum processing chamber to prevent process byproducts from depositing on the inner surfaces of the slit passage beyond the slit passage door and improves the uniformity of plasma in the processing chamber by eliminating a large cavity adjacent to the substrate processing location into which the plasma would otherwise expand.Type: GrantFiled: July 3, 1998Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Michael D. Welch, Homgqing Shan, Paul E. Luscher, Evans Y. Lee, James D. Carducci, Siamak Salimian
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Patent number: 6193811Abstract: Methods for baking-out and for cooling a vacuum chamber are provided. In a first aspect, an inert gas which conducts heat from the vacuum chamber's bake-out lamps to the shield and from the shield to the other parts within the vacuum chamber is introduced to the chamber during chamber bake-out. The inert gas preferably comprises argon, helium or nitrogen and preferably raises the chamber pressure to about 500 Torr during chamber bake-out. A semiconductor processing apparatus also is provided having a controller programmed to perform the inventive bake-out method. In a second aspect, a process chamber is provided having at least one source of a cooling gas. The cooling gas is input to the chamber and is allowed to thermally communicate with the chamber body and components. The cooling gas may reside in the chamber for a period of time or may be continuously flowed through the chamber. Once the chamber reaches a target temperature the cooling gas is evacuated.Type: GrantFiled: March 3, 1999Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Arvind Sundarrajan, Dinesh Saigal, Peijun Ding, James van Gogh
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Patent number: 6193836Abstract: The invention is embodied by a plasma reactor for processing a workpiece, including a reactor enclosure defining a processing chamber, a semiconductor ceiling window, a base within the chamber for supporting the workpiece during processing thereof, the semiconductor ceiling including a gas inlet system for admitting a plasma precursor gas into the chamber through the ceiling, and apparatus for coupling plasma source power into the chamber.Type: GrantFiled: January 10, 2000Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventors: Jon Mohn, Mei Chang, Raymond Hung, Kenneth S. Collins, Ru-Liang Lee
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Patent number: 6194718Abstract: A method for reducing aliasing effects in scanning beam microscopy, comprises generating a plurality of successive images of the same object, wherein each image is shifted in the vertical direction with respect to the preceding one by a sub-pixel distance and then averaging all the images together.Type: GrantFiled: September 23, 1998Date of Patent: February 27, 2001Assignee: Applied Materials, Inc.Inventor: Noam Dotan