Patents Assigned to Applied Materials
-
Patent number: 6207222Abstract: The present invention generally provides a metallization process for forming a highly integrated interconnect. More particularly, the present invention provides a dual damascene interconnect module that incorporates a barrier layer deposited on all exposed surface of a dielectric layer which contains a dual damascene via and wire definition. A conductive metal is deposited on the barrier layer using two or more deposition methods to fill the via and wire definition prior to planarization. The invention provides the advantages of having copper wires with lower resistivity (greater conductivity) and greater electromigration resistance than aluminum, a barrier layer between the copper wire and the surrounding dielectric material, void-free, sub-half micron selective CVD Al via plugs, and a reduced number of process steps to achieve such integration.Type: GrantFiled: August 24, 1999Date of Patent: March 27, 2001Assignee: Applied Materials, Inc.Inventors: Liang-Yuh Chen, Rong Tao, Ted Guo, Roderick Craig Mosely
-
Patent number: 6206760Abstract: The present invention discloses a method for preventing particle contamination in a polishing machine that utilizes slurry composition for the removal of material from the surface of a substrate. The novel method is particularly suited for use in a chemical mechanical polishing apparatus in which a slurry composition is used. The method includes the step of providing a plurality of cleaning devices each having a bendable, shapable conduit and a spray nozzle for dispensing a cleaning solvent on the spindle and the conditioner arm utilized in the CMP apparatus. The present invention further discloses an apparatus for use in carrying out a method for preventing particle contamination in a CMP apparatus by using bendable, shapable conduits for dispensing a cleaning solvent such as deionized water onto the chamber components for removing slurry deposits that may have splattered thereon and therefore, eliminating sources for particle contamination.Type: GrantFiled: June 29, 1999Date of Patent: March 27, 2001Assignees: Taiwan Semiconductor Manufacturing Company, Ltd., Applied Materials, Inc.Inventors: Yu-Chia Chang, Jain-Li Wu, Chung-I Cheng, Chih-Chiang Yang, Pei Wei Yeh, Yung-Tai Tseng
-
Patent number: 6207027Abstract: The present invention provides a method of reducing the overhead time associated with a high density ion metal plasma process. The method provides flowing a gas at a first flow rate and exhausting the chamber at a constant rate so that the rate at which gases are exhausted from the chamber at a steady state equals the flow rate of gases into the chamber. Another method provides flowing a gas at a first rate and then at a second flow rate which is about equal to the rate at which the gas is exhausted from the chamber at a steady state.Type: GrantFiled: May 7, 1997Date of Patent: March 27, 2001Assignee: Applied Materials, Inc.Inventor: Kenny King-tai Ngan
-
Patent number: 6206967Abstract: A multiple step chemical vapor deposition process for depositing a tungsten film on a substrate. A first step of the deposition process includes a nucleation step in which a process gas including a tungsten-containing source, a group III or V hydride and a reduction agent are flowed into a deposition zone of a substrate processing chamber while the deposition zone is maintained at or below a first pressure level. During this first deposition stage, other process variables are maintained at conditions suitable to deposit a first layer of the tungsten film over the substrate. Next, during a second deposition stage after the first stage, the flow of the group III or V hydride into the deposition zone is stopped, and afterwards, the pressure in the deposition zone is increased to a second pressure above the first pressure level and other process parameters are maintained at conditions suitable for depositing a second layer of the tungsten film on the substrate.Type: GrantFiled: June 14, 2000Date of Patent: March 27, 2001Assignee: Applied Materials, Inc.Inventors: Alfred Mak, Kevin Lai, Cissy Leung, Dennis Sauvage
-
Patent number: 6207558Abstract: The present invention provides an effective barrier layer for improved via fill in high aspect ratio sub-micron apertures at low temperature, particularly at the contact level on a substrate. In one aspect of the invention, a feature is filled by first depositing a barrier layer onto a substrate having high aspect ratio contacts or vias formed thereon. The barrier layer is preferably comprised of Ta, TaNx, W, WNx, or combinations thereof. A CVD conformal metal layer is then deposited over the barrier layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal layer is deposited onto the previously formed CVD conformal metal layer at a temperature below that of the melting point temperature of the metal to allow flow of the CVD conformal layer and the PVD metal layer into the vias.Type: GrantFiled: October 21, 1999Date of Patent: March 27, 2001Assignee: Applied Materials, Inc.Inventors: Shri Singhvi, Suraj Rengarajan, Peijun Ding, Gongda Yao
-
Patent number: 6208751Abstract: A cluster tool for testing substrates and locating defects on the substrates utilizing a plurality of tools coupled via an automation platform. The cluster tool includes an interface receiving storage device(s) having, each, more than one substrate contained therein. An inspection tool capable of inspecting the substrates and delivering defect map indicative of suspected locations on each of the substrates. The automation platform is coupled to the interface to the inspection tool, and to a review tool, and is capable of transferring substrates between the tools.Type: GrantFiled: March 24, 1998Date of Patent: March 27, 2001Assignee: Applied Materials, Inc.Inventor: Gilad Almogy
-
Patent number: 6204174Abstract: A method and apparatus to control the deposition rate of a refractory metal film in a semiconductor fabrication process by controlling a quantity of ethylene present. The method includes placing a substrate in a deposition zone, of a semiconductor process chamber, flowing, into the deposition zone, a process gas including a refractory metal source, an inert carrier gas, and a hydrocarbon. Typically, the refractory metal source is tungsten hexafluoride, WF6, and the inert gas is argon, Ar. The ethylene may be premixed with either the argon or the tungsten hexafluoride to form a homogenous mixture. However, an in situ mixing apparatus may also be employed.Type: GrantFiled: November 25, 1997Date of Patent: March 20, 2001Assignee: Applied Materials, Inc.Inventors: Alexander D. Glew, Andrew D. Johnson, Ravi Rajagopalan, Steve Ghanayem
-
Patent number: 6202656Abstract: A fluid delivery system for delivering a process fluid to a vacuum processing system includes a secondary containment line surrounding a process fluid line. A purge gas flows through the secondary containment line and around the process fluid line in order to flow away any leaked process fluid. Alternatively, a heated fluid flows through the secondary containment line forming a heat trace around the process fluid line to heat the process fluid line and the process fluid by means of convection, which provides for precise uniformity of temperature throughout the length of the secondary containment line. The heated fluid loses heat to the ambient environment creating a temperature gradient through which the process fluid flows. The secondary containment line may have a heating element along its length for adding heat to the heated fluid to change the temperature gradient.Type: GrantFiled: March 3, 1998Date of Patent: March 20, 2001Assignee: Applied Materials, Inc.Inventor: John V. Schmitt
-
Patent number: 6204203Abstract: A method of forming a metal oxide dielectric film. According to the present invention an amorphous metal oxide dielectric film is deposited over a substrate utilizing a metal organic precursor. The substrate is then heated in an inert ambient to convert the amorphous metal oxide dielectric to a polycrystalline metal oxide dielectric. The polycrystalline metal dielectric is then heated in a oxygen containing ambients.Type: GrantFiled: October 14, 1998Date of Patent: March 20, 2001Assignee: Applied Materials, Inc.Inventors: Pravin K. Narwankar, Turgut Sahin, Gregory F. Redinbo, Patricia M. Liu, Huyen T. Tran
-
Patent number: 6204168Abstract: A damascene structure, and a method of fabricating same, containing relatively low dielectric constant materials (e.g., k less than 3.8). A silicon-based, photosensitive material, such as plasma polymerized methylsilane (PPMS), is used to form both single and dual damascene structures containing low k materials. During the manufacturing process that forms the damascene structures, the silicon-based photosensitive material is used as both a hard mask and/or an etch stop.Type: GrantFiled: February 2, 1998Date of Patent: March 20, 2001Assignee: Applied Materials, Inc.Inventors: Mehul B. Naik, Tim Weidman, Dian Sugiarto, Allen Zhao
-
Patent number: 6202658Abstract: An inventive edge cleaning device is provided for cleaning the edge a thin disc such as a semiconductor wafer. The inventive edge cleaning device has a sonic nozzle positioned so as to direct a liquid jet at the edge surface of the thin disc. Preferably the sonic nozzle is radially spaced from the thin disc's edge so that scrubbing, spin rinsing or spin cleaning may be simultaneously performed on the major surfaces of the thin disc as the thin disc edge is cleaned by the sonic nozzle. The liquid jet may include de-ionized water, NH4OH, KOH, TMAH, HF, citric acid, a surfactant, or other similar cleaning solutions, and the nozzle may remain stationary as the thin disc rotates or the nozzle may scan the circumference of the thin disc to clean the entire edge of the thin disc.Type: GrantFiled: November 11, 1998Date of Patent: March 20, 2001Assignee: Applied Materials, Inc.Inventors: Boris Fishkin, Jianshe Tang, Brian J. Brown
-
Patent number: 6201998Abstract: An apparatus, method and medium is provided for increasing the efficiency with which wafers are transferred among different processing chambers in a wafer processing facility. A multi-slot cooling chamber allows multiple wafers to be cooled while other wafers are subjected to processing steps in other chambers. Each wafer in the processing sequence is assigned a priority level depending on its processing stage, and this priority level is used to sequence the movement of wafers between chambers. A look-ahead feature prevents low-priority wafer transfers from occurring if such transfers would occur just prior to the scheduling of a high-priority wafer transfer.Type: GrantFiled: July 30, 1999Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventors: Zhihong J. Lin, Chongyang Wang
-
Patent number: 6200388Abstract: A semiconductor wafer support for use in a thermal processing chamber includes a shelf for receiving a semiconductor wafer. The wafer support is formed of a silicon carbide substrate having a polysilicon layer disposed on the substrate, and a silicon nitride layer disposed on the polysilicon layer. A method of forming the multi-layered semiconductor wafer support is also disclosed.Type: GrantFiled: February 11, 1998Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventor: Dean C. Jennings
-
Patent number: 6201999Abstract: A method and apparatus for producing schedules for a wafer in a multichamber semiconductor wafer processing tool comprising the steps of providing a trace defining a series of chambers that are visited by a wafer as the wafer is processed by the tool; initializing a sequence generator with a value of a variable defining initial wafer positioning within the tool; generating all successor variables for the initial variable value to produce a series of values of the variable that represent a partial schedule; backtracking through the series of variables to produce further partial schedules; and stopping the backtracking when all possible variable combinations are produced that represent all possible valid schedules for the trace. All the possible schedules are analyzed to determine a schedule that produces the highest throughput of all the schedules.Type: GrantFiled: June 9, 1997Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventor: Dusan Jevtic
-
Patent number: 6199927Abstract: The amount of particulate contamination produced due to rubbing between a semiconductor substrate and the robotic substrate handling blade has been greatly reduced by the use of specialized materials either as the principal material of construction for the semiconductor substrate handling blade, or as a coating upon the surface of the substrate handling blade. In particular, the specialized material must exhibit the desired stiffness at temperatures in excess of about 450° C.; the specialized material must also have an abrasion resistant surface which does not produce particulates when rubbed against the semiconductor substrate. The abrasion resistant surface needs to be very smooth, having a surface finish of less than 1.0 micro inch, and preferably less than 0.2 micro inch. In addition, the surface must be essentially void-free. In the most preferred embodiments, the upper, top surface of the substrate handling blade is constructed from a dielectric material being smooth, non-porous, and wear-resistant.Type: GrantFiled: January 21, 1999Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventors: Behzad Shamlou, Wen Chiang Tu, Xuyen Pham, Yu Chang, Daniel O. Clark, Shun Wu
-
Patent number: 6200199Abstract: A conditioner head for conditioning the polishing surface of a polishing pad. The conditioner head includes a drive element carried for rotation about a longitudinal axis and a disk backing element. The disk backing element carries an abrasive disk and holds the lower surface of the disk in engagement with the polishing pad. The conditioner head further includes a driven element coupling the disk backing element to the drive element to transmit torque and rotation therebetween. The driven element is longitudinally movable between retracted and extended positions. An annular diaphragm spans a gap between the drive element and the driven element and is coupled to the drive element and to the driven element to rotate therewith as a unit.Type: GrantFiled: March 31, 1998Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventors: Jayakumar Gurusamy, Lawrence M. Rosenberg
-
Patent number: 6200911Abstract: A method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps on a semiconductor substrate are used to fill the gaps in a void-free manner. Differential heating characteristics of a substrate in a high-density plasma chemical vapor deposition (HDP-CVD) system helps to prevent the gaps from being pinched off before they are filled. The power distribution between coils forming the plasma varies the angular dependence of the sputter etch component of the plasma, and thus may be used to modify the gap profile, independently or in conjunction with differential heating. A heat source may be applied to the backside of a substrate during the concurrent deposition/etch process to further enhance the profile modification characteristics of differential heating.Type: GrantFiled: April 21, 1998Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventors: Pravin Narwankar, Sameer Desai, Walter Zygmunt, Turgut Sahin, Laxman Murugesh
-
Patent number: 6200433Abstract: The present invention generally provides a copper metallization method for depositing a conformal barrier layer and seed layer in a plasma chamber. The barrier layer and seed layer are preferably deposited in a plasma chamber having an inductive coil and a target comprising the material to be sputtered. One or more plasma gases having high molar masses relative to the target material are then introduced into the chamber to form a plasma. Preferably, the plasma gases are selected from xenon, krypton or a combination thereof.Type: GrantFiled: November 1, 1999Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventors: Peijun Ding, Rong Tao, Barry Chin, Dan Carl
-
Patent number: 6200883Abstract: In ion implantation processes for forming junctions in semiconductor devices, a proportion of ions implant into the semiconductor material beyond the desired junction depth due to channelling along axes and planes of symmetry in the crystal. A method is provided in which ions are implanted at a series of different energies starting with a lower energy than that required for the desired junction depth. The initial amorphising of the surface regions of the semiconductor during the lower energy implantation reduces the channelling probability when the ions are subsequently implanted at the full energy resulting in a more sharply defined junction.Type: GrantFiled: June 16, 1997Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventors: Mitchell C. Taylor, Babak Adibi, Majeed Ali Foad
-
Patent number: 6201240Abstract: Disclosed is a system and method for enhancing edge, topography, and materials in SEM images. The enhancements are achieved by collecting secondary electrons at narrow energy bands. This allows construction of various “primary” images having specific features enhanced. Further enhancement is achieved by various manipulations and combinations of the “primary” images to obtain a final enhanced image. Yet further enhancements are achieved by assigning color to various “primary” images before constructing the final image.Type: GrantFiled: November 4, 1998Date of Patent: March 13, 2001Assignee: Applied Materials, Inc.Inventors: Noam Dotan, Sergio Serulnik, Dubi Shachal