Abstract: A technique for recovering from a hang in a virtualized accelerated processing device (“APD”) is provided. In the virtualization scheme, different virtual machines are assigned different “time-slices” in which to use the APD. When a time-slice expires, the APD stops operations for a current VM and starts operations for another VM. To stop operations on the APD, a virtualization scheduler sends a request to idle the APD. The APD responds by completing work and idling. If one or more portions of the APD do not complete this idling process before a timeout expires, then a hang occurs. In response to the hang, the virtualization scheduler informs the hypervisor that a hang has occurred. The hypervisor performs a function level reset on the APD and informs the VM that the hang has occurred. The VM responds by stopping command issue to the APD and re-initializing the APD for the function.

Abstract: A display system includes a display device having a plurality of individually-controllable illumination regions and a rendering device. The rendering device is to render a frame for display at the display device during a frame period, to determine a motion estimate representation for each region of a plurality of regions of the frame, each region of the frame corresponding to an illumination region of the display device, and to set, for each illumination region, an illumination configuration to be applied by the display device for the illumination region during at least one of the frame period or a subsequent frame period based on the motion estimate representation for the corresponding region of the frame.

Abstract: A texture decompression method is described. The method comprises receiving a compressed texture block, determining a partition of pixels used for the compressed texture block, wherein the partition includes one or more disjoint subsets into which data in the compressed texture block is to be unpacked, unpacking data for each subset based on the determined partition, and decompressing each of the one or more disjoint subsets to form an approximation of an original texture block.

Abstract: A display system includes a display device and a rendering device having a plurality of individually-controllable illumination regions. The rendering device is to render a frame for display at the display device during a frame period, to determine a gaze position of a user relative to the display device for the frame period, and to set, for each illumination region, an illumination configuration to be applied by the display device for the illumination region during at least one of the frame period or a subsequent frame period based on a classification of the illumination region that is representative of a location of the gaze position relative to the illumination region.

Abstract: Platform power management includes boosting performance in a platform power boost mode or restricting performance to keep a power or temperature under a desired threshold in a platform power cap mode. Platform power management exploits the mutually exclusive nature of activities and the associated headroom created in a temperature and/or power budget of a server platform to boost performance of a particular component while also keeping temperature and/or power below a threshold or budget.

Abstract: Systems, apparatuses, and methods for performing computation-efficient encoding of video or image frames are disclosed. An encoder partitions a video or image frame into a plurality of sub-frame blocks. For each sub-frame block, the encoder selects a subset of the original pixel values based on one or more criteria. In a first mode, the encoder selects the corners of the sub-frame block. Then, the encoder generates encoding vectors to represent the pixels in between pairs of the selected subset of pixel values. The encoder includes the original pixel values of the selected subset in the encoded block that represents the original sub-frame block. The encoder also includes the encoding vectors in the encoded block, wherein the encoding vectors are calculated based on the color parameter differences between each pair of the selected subset of pixel values. The encoder also includes metadata specifying the encoding mode in the encoded block.

Abstract: An interconnect controller includes a data link layer controller coupled to a transaction layer, wherein the data link layer controller selectively receives data packets from and sends data packets to the transaction layer, and a physical layer controller coupled to the data link layer controller and to a communication link. The physical layer controller selectively operates at a first predetermined link speed. The physical layer controller has an enhanced speed mode, wherein in response to performing a link initialization, the interconnect controller queries a data processing platform to determine whether the enhanced speed mode is permitted, performs at least one setup operation to select an enhanced speed, wherein the enhanced speed is greater than the first predetermined link speed, and subsequently operates the communication link using the enhanced speed.

Abstract: A method for dynamic scaling of content luminance and backlight level includes determining, using one or more processors of a display system, an ambient light level of a local environment proximate the display system. Based on the ambient light level being brighter than a first ambient light threshold, it is determined that the display system is in a normal room or a bright environment. A minimum viewable threshold representing a minimum pixel luminance value perceivable by a user in the ambient light level of the local environment is determined. The method further includes generating a modified display image by shifting the pixel luminance values of one or more pixels of an input image such that a darkest pixel value of the modified display image is equal to or greater than the minimum viewable threshold before transmitting the modified display image for display.

Abstract: A technique for compressing an original image is disclosed. According to the technique, an original image is obtained and a delta-encoded image is generated based on the original image. Next, a segregated image is generated based on the delta-encoded image and then the segregated image is compressed to produce a compressed image. The segregated image is generated because the segregated image may be compressed more efficiently than the original image and the delta image.

Abstract: A processing device for executing a machine learning neural network operation includes memory and a processor. The processor is configured to receive input data at a layer of the machine learning neural network operation, receive a plurality of sorted filters to be applied to the input data, apply the plurality of sorted filters to the input data to produce a plurality of different feature maps, compress the plurality of different feature maps according to a similarity of the feature maps relative to each other and store the plurality of different feature maps in the memory.

Abstract: A processing device for executing a machine learning neural network operation includes memory and a processor. The processor is configured to receive input data at a layer of the machine learning neural network operation, receive a plurality of sorted filters to be applied to the input data, apply the plurality of sorted filters to the input data to produce a plurality of different feature maps, compress the plurality of different feature maps according to a sparsity of the feature maps and store the plurality of different feature maps in the memory.

Abstract: A method and apparatus for physical layer bypass data transmission between physical coding sub-layers (PCS) includes encoding the data for transmission over a serial low-speed link. The data is transmitted from a first PCS via a serial connection over a serializer/deserializer (SERDES) transmission bypass path The data is received by a second PCS via a SERDES receive bypass path.

Abstract: Power management in a computing device. A driver is registered with an operating system (OS) executing on the computing device to receive information about a position of a user interface control. If the user interface control is moved, the driver receives a notification of the user interface control position and determines a power management intervention based on the position. The driver transmits the power management intervention to power control circuitry which sets a power setting of the computing device based on the intervention.

Abstract: A method and system for allocating memory to a memory operation executed by a processor in a computer arrangement having a plurality of processors. The method includes receiving a memory operation from a processor that receives a memory operation from a processor that references an address in a shared memory, mapping the received memory operation to at least one of a plurality of virtual memory pools to produce a mapping result, and providing the mapping result to the processor.

Abstract: A display system includes a rendering device and a display device. The rendering device is to render a sequence of frames for display at a frame rate and to set an illumination configuration to be applied by the display device during a frame period for each frame of the sequence of frames based on the frame rate. The illumination configuration controls at least one of an illumination level and a duration for an illumination strobe, and at least one of an illumination level for an illumination fill preceding the illumination strobe in the frame period and an illumination level for an illumination fill following the illumination strobe in the frame period. The display device is to receive a representation of the illumination configuration from the rendering device and apply the illumination configuration during a frame period for each frame of the sequence of frames to display the frame.

Abstract: Systems, apparatuses, and methods for performing parallel histogram calculation with application to palette table derivation are disclosed. An encoder calculates a first histogram for a first portion of pixel component value bits of a block of pixels. Then, the encoder selects a first number of the highest pixel count bins from the first histogram. Also, the encoder calculates a second histogram for a second portion of pixel component value bits of the block. The encoder selects a second number of the highest pixel count bins from the second histogram. A third histogram is calculated from the concatenation of bits assigned to the first and second number of bins, and the highest pixel count bins are selected from the third histogram. A palette table is derived based on these highest pixel count bins selected from the third histogram, and the block of pixels is encoded using the palette table.

Abstract: A method and apparatus obtains a source image having a plurality of source color gamut pixels in a source color gamut. The method and apparatus converts the plurality of source color gamut pixels to a plurality of corresponding target color gamut pixels using non-linear interpolation of a plurality of output pixel values from a reduced 3-D look-up table (LUT) for a target color gamut. The method and apparatus provides, for display, the plurality of target color gamut pixels (e.g., one or more pixels) on a target color gamut display.

Abstract: Systems, apparatuses, and methods for implementing a single-stream foveal display transport are disclosed. A system includes a transmitter sending an image over a display transport as a sequence of equi-sized rectangles to a receiver coupled to a display. The receiver then scales up the rectangles with different scale factors to cover display areas of different sizes. The pixel density within a rectangular region is uniform and scaling factors can take on integer or non-integer values. The rectilinear grid arrangement of the image results in simplified scaling operations for the display. In another scenario, the image is transmitted as a set of horizontal bands of equal size. Within each band, the same horizontal amount of transmitted pixels are redistributed across multiple rectangular regions of varied scales. The display stream includes embedded information and the horizontal and/or vertical distribution and scaling of rectangular regions, which can be adjusted for each transmitted image.

Abstract: An oscillator circuit includes a first oscillator, a second oscillator, and a calibration circuit to calibrate the first and second oscillators. The first oscillator is supplied with a first supply voltage, and the second oscillator is supplied with a second supply voltage. The calibration includes setting a frequency control of the second oscillator at a target frequency. Then, a voltage control of the second supply voltage is adjusted incrementally until a first control value is identified at which a second oscillator output frequency matches the target frequency. Then, a voltage control of the first supply voltage is set to the first control value. Then, the voltage control for the first supply voltage is adjusted incrementally until a second control value is identified at which a first oscillator output frequency is as close to the second oscillator output frequency as is achievable, but does not exceed it.

Abstract: A processor uses the same virtual address space for heterogeneous processing units of the processor. The processor employs different sets of page tables for different types of processing units, such as a CPU and a GPU, wherein a memory management unit uses each set of page tables to translate virtual addresses of the virtual address space to corresponding physical addresses of memory modules associated with the processor. As data is migrated between memory modules, the physical addresses in the page tables can be updated to reflect the physical location of the data for each processing unit.