Patents Assigned to ATI Technologies ULC
  • Patent number: 9720486
    Abstract: A device and method of operating a synchronous frequency processing environment served by a common power source and common clock source. The method includes operating the processing environment to have a first power consumption. The method further includes determining a first synchronous frequency processing domain within the processing environment where it is desired to implement a first clock frequency alteration in a clock signal for the first synchronous frequency processing domain. The first clock frequency alteration generates an associated first alteration in a power consumption from the first synchronous frequency processing domain. The method further includes determining a second clock frequency alteration to a clock signal for a second synchronous frequency processing domain of the processing environment. The second clock frequency alteration is determined so as to reduce a change in the first power consumption caused by the first alteration in power consumption.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: August 1, 2017
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Angel E. Socarras, Fei Guo
  • Publication number: 20170206630
    Abstract: Methods are provided for creating objects in a way that permits an API client to explicitly participate in memory management for an object created using the API. Methods for managing data object memory include requesting memory requirements for an object using an API and expressly allocating a memory location for the object based on the memory requirements. Methods are also provided for cloning objects such that a state of the object remains unchanged from the original object to the cloned object or can be explicitly specified.
    Type: Application
    Filed: April 3, 2017
    Publication date: July 20, 2017
    Applicants: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Guennadi Riguer, Brian K. Bennett
  • Publication number: 20170195683
    Abstract: A texture compression method is described. The method comprises splitting an original texture having a plurality of pixels into original blocks of pixels. Then, for each of the original blocks of pixels, a partition is identified that has one or more disjoint subsets of pixels whose union is the original block of pixels. The original block of pixels is further subdivided into one or more subsets according to the identified partition. Finally, each subset is independently compressed to form a compressed texture block.
    Type: Application
    Filed: August 15, 2016
    Publication date: July 6, 2017
    Applicants: ATI Technologies ULC, Advanced Micro Devices, Inc.
    Inventors: Konstantine Iourcha, Andrew S.C. Pomianowski
  • Patent number: 9696784
    Abstract: A system, method and a computer program product for processing media content on a media player having direct access to hardware are provided in exemplary embodiments. When the media player is initialized, an operating system is placed into a stand-by mode that decreases power consumption on an electronic device. Instead of the operating system, a hardware pipeline processes media content. A hardware pipeline is dedicated to process a media content based on the media content type. The media content is processed using the dedicated hardware pipeline to reduce the power consumption during processing.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: July 4, 2017
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Greg Sadowski, Gabor Sines
  • Publication number: 20170185451
    Abstract: Methods, devices, and systems for data driven scheduling of a plurality of computing cores of a processor. A plurality of threads may be executed on the plurality of computing cores, according to a default schedule. The plurality of threads may be analyzed, based on the execution, to determine correlations among the plurality of threads. A data driven schedule may be generated based on the correlations. The plurality of threads may be executed on the plurality of computing cores according to the data driven schedule.
    Type: Application
    Filed: December 28, 2015
    Publication date: June 29, 2017
    Applicants: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Jimshed Mirza, YunPeng Zhu
  • Patent number: 9652019
    Abstract: A system and method for efficient management of operating modes within an integrated circuit (IC) for optimal power and performance targets. A semiconductor chip includes processing units each of which operates with respective operating parameters. Temperature sensors are included to measure a temperature of the one or more processing units during operation. A power manager determines a calculated power value independent of thermal conditions and current draw. The power manager reads each of a first thermal design power (TDP) value for the processing units and a second TDP value for a platform housing the semiconductor chip. The power manager determines a ratio of the first TDP value to the second TDP value. Additionally, the power manager determines another ratio of the first TDP value to the calculated power value. Using the measured temperature, the ratios and the calculated power value, the power manager determines a manner to adjust the operating parameters.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: May 16, 2017
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Praveen K. Dongara, Aniruddha Dasgupta, Adam Clark
  • Patent number: 9648357
    Abstract: A method and device for ranking video feeds provide a user with the best feed depending on what the user wishes to see. The method includes obtaining one or more video feeds and ranking the video feeds. The ranking is based, at least in part, upon input from a viewer indicating an object of interest. The ranking can consider things such as video stream resolution and signal strength.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: May 9, 2017
    Assignee: ATI Technologies ULC
    Inventors: Jitesh Arora, Gagandeep Singh Chabbewal, Randall A. Brown, Jamin Islam
  • Patent number: 9628740
    Abstract: An upstream video processor may perform video processing upon video data to created processed video data. The video processing may include at least one of color correction, contrast correction, gamma correction, sharpness enhancement, and edge enhancement. Metadata indicative of the performed video processing may also be generated. The processed video data and metadata may be passed to a downstream video processor, the latter for use in determining what further video processing, if any, to apply. An intermediate video processor may receive video data and metadata indicating video processing performed thereupon by an upstream video processor. Based on the received metadata, additional video processing may be performed, and new metadata indicating the additional video processing may be generated.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: April 18, 2017
    Assignee: ATI Technologies ULC
    Inventor: David Glen
  • Patent number: 9627281
    Abstract: A method of manufacturing is provided that includes applying a thermal interface tape to a side of a semiconductor wafer that includes at least one semiconductor chip. The thermal interface material tape is positioned on the at least one semiconductor chip. The at least one semiconductor chip is singulated from the semiconductor wafer with at least a portion of the thermal interface tape still attached to the semiconductor chip.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: April 18, 2017
    Assignees: Advanced Micro Device, Inc., ATI Technologies ULC
    Inventors: Seth Prejean, Dales Kent, Ronnie Brandon, Gamal Refai-Ahmed, Michael Z. Su, Michael Bienek, Joseph Siegel, Bryan Black
  • Patent number: 9612884
    Abstract: Methods are provided for creating objects in a way that permits an API client to explicitly participate in memory management for an object created using the API. Methods for managing data object memory include requesting memory requirements for an object using an API and expressly allocating a memory location for the object based on the memory requirements. Methods are also provided for cloning objects such that a state of the object remains unchanged from the original object to the cloned object or can be explicitly specified.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: April 4, 2017
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Guennadi Riguer, Brian K. Bennett
  • Patent number: 9606936
    Abstract: Methods, systems, and computer readable media generalize control registers in the context of memory address translations for I/O devices. A method includes maintaining a table including a plurality of concurrently available control register base pointers each associated with a corresponding input/output (I/O) device, associating each control register base pointer with a first translation from a guest virtual address (GVA) to a guest physical address (GPA) and a second translation from the GPA to a system physical address (SPA), and operating the first and second translations concurrently for the plurality of I/O devices.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: March 28, 2017
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Andy Kegel, Mark Hummel, Tony Asaro, Philip Ng
  • Patent number: 9609358
    Abstract: A method and apparatus are described for performing video encoding mode decisions in a video transcoding system. A down-scaled frame may be received that includes at least one macroblock. The down-scaled frame may be associated with a full-scale frame having a plurality of macroblocks that have been downsampled. A weighting factor and a distance measure factor may be determined for each of the macroblocks in the full-scale frame. Predicted blocks may be generated based on the weighting and distance measure factors.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: March 28, 2017
    Assignee: ATI Technologies ULC
    Inventor: Jiao Wang
  • Patent number: 9607935
    Abstract: Various semiconductor chip packages with undermounted passive devices and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip to a first side of a carrier substrate where the carrier substrate includes a second side opposite the first side. At least one passive device is coupled to the second side of the carrier substrate. The at least one passive device includes at least one first terminal electrically coupled to the semiconductor chip and at least one second terminal adapted to couple to a printed circuit board.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: March 28, 2017
    Assignee: ATI Technologies ULC
    Inventors: Liane Martinez, Neil McLellan, Silqun Leung, Gabriel Wong
  • Patent number: 9596481
    Abstract: Methods and apparatus for facilitating processing a reference frame to produce an output frame. Motion vector data for a block of reference frame pels estimates the displacement of the reference frame pels from corresponding pels in a prior input frame. Comparison metrics are produced for a pel of the reference frame with respect to that pel and a plurality of neighboring reference frame pels A first comparison metric is based on a comparison with corresponding pels of a prior output frame that corresponds to the prior input frame as previously processed. A second comparison metric is based on a comparison with corresponding pels of a motion compensated prior output frame derived from applying motion vector data to the pels of the prior output frame. A pel of the output frame that corresponds to the reference frame pel is determined using the first and second comparison metrics.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: March 14, 2017
    Assignee: ATI Technologies ULC
    Inventors: Sahar Alipour Kashi, Boris Ivanovic, Allen J. Porter
  • Patent number: 9594536
    Abstract: The present disclosure relates to a method and apparatus for electronic device communication. A method includes translating monitor control commands to an internet protocol (IP) format to produce IP formatted monitor control commands, and communicating the IP formatted monitor control commands to an IP port dedicated for communicating IP formatted monitor control commands.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: March 14, 2017
    Assignee: ATI Technologies ULC
    Inventors: Keith Shu Key Lee, Syed Athar Hussain
  • Publication number: 20170069258
    Abstract: A virtualized DisplayPort (DP) configuration data (DPCD) for multi-stream transport (MST) logical DP end points and non-DP end points allows DPCD configuration for links within a DisplayPort topology which are not configurable using DPCD. A virtualized DPCD may configure a link to an internal display of a MST sink device or a non-DP display to receive data using a dynamic refresh rate (DRR), display stream compression (DSC), panel self-refresh (PSR) and other DPCD configurable features.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 9, 2017
    Applicant: ATI Technologies ULC
    Inventor: Syed Athar Hussain
  • Patent number: 9588734
    Abstract: A translation layer includes a plurality of first buffers and a controller to assert one or more ready signals corresponding to one or more of the plurality of first buffers in response to the one or more of the plurality of first buffers being less than full. The one or more of the plurality of first buffers receives data or control information from one or more corresponding components in response to the ready signal being asserted concurrently with one or more valid signals asserted by the one or more corresponding components.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: March 7, 2017
    Assignee: ATI Technologies ULC
    Inventor: Kostantinos D. Christidis
  • Patent number: 9588902
    Abstract: A method for translating a virtual memory address into a physical memory address includes parsing the virtual memory address into a page directory entry offset, a page table entry offset, and an access offset. The page directory entry offset is combined with a virtual memory base address to locate a page directory entry in a page directory block, wherein the page directory entry includes a native page table size field and a page table block base address. The page table entry offset and the page table block base address are combined to locate a page table entry, wherein the page table entry includes a physical memory page base address and a size of the physical memory page is indicated by the native page table size field. The access offset and the physical memory page base address are combined to determine the physical memory address.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: March 7, 2017
    Assignees: Advanced Micro Devices, Inc., ATI Technologies, ULC
    Inventors: Elene Terry, Dhirendra Partap Singh Rana
  • Patent number: 9582846
    Abstract: A graphics processing architecture in one example performs vertex manipulation operations and pixel manipulation operations by transmitting vertex data to a general purpose register block, and performing vertex operations on the vertex data by a processor unless the general purpose register block does not have enough available space therein to store incoming vertex data; and continues pixel calculation operations that are to be or are currently being performed by the processor based on instructions maintained in an instruction store until enough registers within the general purpose register block become available.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: February 28, 2017
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Stephen L. Morein, Laurent Lefebvre, Andrew E. Gruber, Andi Skende
  • Patent number: 9583072
    Abstract: A method, a device, and a non-transitory computer readable medium for performing dithering on an L bit long input data are presented. An M bit long random data is generated, wherein M is a number of least significant bits of the input data. An M bit long frame counter value is added to the random data. The input data is rounded up to L-M most significant bits when the M least significant bits of the input data is greater than the sum of the frame counter value and the random data. The input data is truncated to the L-M most significant bits when the M least significant bits of the input data is less than or equal to the sum of the frame counter value and the random data.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: February 28, 2017
    Assignee: ATI Technologies ULC
    Inventor: Minghua Zhu