Abstract: A method and apparatus for enhancing an input image to produce a contrast enhanced output image is disclosed. The method involves producing a contrast value for each pixel in the input image, the contrast value being proportional to an intensity gradient between each respective pixel and at least one pixel adjacent the respective pixel. The method also involves selecting pixels in the input image having respective contrast values that meet a first criterion, thereby forming a selected plurality of pixels and producing a frequency distribution of intensity values of the selected plurality of pixels. The method further involves selecting at least one range of intensity values in the frequency distribution that meet a second criterion, thereby producing a selected range of intensity values for enhancement.

Abstract: A video processing device comprises a display interface coupleable to a display device and a display controller configured to transmit a video signal via an output node of the display interface. The video signal comprises an active segment comprising video information and an inactive segment comprising synchronization information. The video processing device further comprises a display detector configured to determine whether the display device is coupled to the display interface based on a comparison of a first voltage at the output node during transmission of the inactive segment to a second voltage.

Abstract: In various embodiments, dedicated mask pins are eliminated by sending a data mask on address lines of the interface. A memory controller receives a request for a memory write operation from a memory client and determines the granularity of the write data from a write data mask sent by the client. Granularity, as used herein, indicates a quantity of write data to which each bit of the received write data mask applies. In an embodiment, the memory controller generates a particular write command and a particular write data mask based on the granularity of the write data. The write command generated is typically the most efficient of several write commands available, but embodiments are not so limited. The write command is transmitted on command lines of the interface, and the write data mask is transmitted on address lines of the interface.

Abstract: An apparatus and method for providing display information generates, independently from an operating system, different screen subsections of a screen image using independent gamut remapping configurations to generate an output image in a target gamut space of a display. The method and apparatus also provides the generated output image for display or may display the generated output image.

Abstract: Methods and apparatus provide for indicating multi-power rail status of integrated circuits by taking into account a clock signal provided by, for example, core logic, in addition to considering voltage levels of multiple power rails. In one example, the apparatus includes multi-power rail status indicating logic that provides a multi-power rail status signal. The multi-power rail status signal is synchronized for assertion with a clock signal of the integrated circuit, such as the core logic of the integrated circuit, in response to an assertion of an asynchronous multi-power rail voltage stability signal. The asynchronous multi-power rail voltage stability signal indicates a state of a plurality of voltage signals from a plurality of power rails supplied to the integrated circuit.

Abstract: A content player includes a pausable mass storage device player that can be used to record and play content. The pausable mass storage device can become paused in response to an assertion of a pause signal. Once paused, the content player remains paused until the pause signal is deasserted. The content player also includes an event detector that is coupled to the pausable mass storage device player. The content player detects a non-viewer initiated event, (e.g., an automatic event such as the receipt of an email with embedded enhanced content), and to assert the pause signal in response thereto. The content player receives content, detects an event, and in response to detecting the event, pauses the content to a presentation device; and spools the content onto the mass storage device.

Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.

Abstract: A method and apparatus for processing video utilize individually collected image enhancement statistic information from differing processor cores for a same frame or multi-view that are then either shared between the processor cores or used by a third processor core to combine the statistical information that has been individually collected to generate global image-enhancement control information. The global image enhancement control information is based on a global analysis of both left and right eye views for example using the independently generated statistic information for a pair of frames. Respective image output information is produced by each of the plurality of processor cores based on the global image enhancement control information, for display on one or more displays.

Abstract: The embodiments protect an IC against Design-For-Test (DFT) or other test mode attack. Secrets in ROM or PROM are secured. One embodiment for securing information on an IC includes receiving a ROM read command, writing data from a plurality of ROM address locations to an encryption logic in response to receiving the ROM read command, and writing an encryption logic output of the encryption logic to a test control logic, the encryption logic output representing the data from the plurality of ROM address locations. Writing the data from the plurality of ROM address locations to the encryption logic may also include writing the data from the plurality of ROM address locations to a multiple input shift register (MISR) in response to the ROM read command, and writing an MISR output to the test control logic, the MISR output representing the data from the plurality of ROM address locations.

Abstract: A semiconductor chip device includes a first semiconductor chip adapted to be stacked with a second semiconductor chip wherein the second semiconductor chip includes a side and first and second conductor structures projecting from the side. The first semiconductor chip includes a first edge, a first conductor pad, a first conductor pillar positioned on but laterally offset from the first conductor pad toward the first edge and that has a first lateral dimension and is adapted to couple to one of the first and second conductor structures, a second conductor pad positioned nearer the first edge than the first conductor pad, and a second conductor pillar positioned on but laterally offset from the second conductor pad and that has a second lateral dimension larger than the first lateral dimension and is adapted to couple to the other of the first and second conductor structures.

Abstract: A mipmap generator generates pairs of mipmaps that are each of a lower resolution that its respective source image. A single-pass, gradient-based motion vector generator generates an image motion vector map having values that represent the motion trajectories for pixels in the first and second source images. An image interpolator generates an interpolated image based on the source images and the image motion vector map. A motion detector generates a motion factor map based on a pair of mipmaps from those generated by the mipmap generator that represents a detected degree of motion between the first and second source images. The blending module generates a blended, upconverted new image using the motion factor map, the interpolated image and one of the first and second motion maps.

Abstract: A method and apparatus for reducing motion judder in a 3D input source are disclosed. The 3D input source is separated into left and right images. Motion vectors for the left and right images are calculated. Frame rate conversion is performed on the left and right images, to produce motion compensated left and right images. The left and right images and the motion compensated left and right images are reordered for display. Alternatively, the motion estimation and motion compensation can be performed on the 3D input source, and the input image and the motion compensated image can then be separated into respective left and right images. The method and apparatus can be adapted to perform 2D to 3D conversion by extracting a 2D input source into left and right 3D images and performing motion estimation and motion compensation.

Abstract: Wafer sort data can be converted to binary data, whereby each integrated circuit of the wafer is assigned a value of one or zero, depending on whether test data indicates the integrated circuit complies with a specification. In addition, each integrated circuit is assigned position data to indicate its position on the wafer. A frequency transform, such as a multidimensional discrete Fourier transform (DFT), is applied to the binary wafer sort data and position data to determine a spatial frequency spectrum that indicates error patterns for the wafer. The spatial frequency spectrum can be analyzed to determine the characteristics of the wafer formation process that resulted in the errors, and the wafer formation process can be modified to reduce or eliminate the errors.

Abstract: A method of automated video device testing, and source and sink video devices are disclosed. A test signal may be provided by way of a video link from a video source to a video sink, over a video link extending therebetween. The method includes receiving on the video link a request from the video sink to provide the test signal; identifying based on the request, a requested test signal; providing the requested test signal from the video source to the video sink over the video link. In another embodiment, a video sink may be queried over a video link to determine a metric describing at least a portion of know video signal, as received and determined at the video sink to verify integrity of the video signal at the video sink.

Abstract: Various semiconductor chips and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in an insulating layer applied to a side of a semiconductor chip. The first opening does not extend through to the side. A second opening is formed in the insulating layer that exposes a portion of the side.

Abstract: A method and apparatus adaptively creates a dropped frame rate converted frame from a plurality of source frames using at least one alternate support frame in lieu of neighboring source frame, in response to corrupted picture identification information. Stated another way, a frame rate converter, in response to corrupted picture indication information, replaces at least one corrupted source frame with a temporally modified frame created from at least one alternate source frame. The corrupted picture identification information indicates that a source frame, or segment thereof, includes at least one corrupted or dropped source frame (or segment thereof). Accordingly, although a source frame has been dropped or is corrupted, the frame rate converter does not base its output on a repeated frame or a corrupted frame output by a decoder and instead utilizes other non-neighboring source images as though they were neighboring frames, instead of using a repeated frame or corrupted frame.

Abstract: Circuitry for better integrating multiview-based 3D display technology with the human visual system includes logic that identifies an object of interest from a plurality of objects in a multiview-based 3D scene displayed on one or more displays and provides focus adjustment control data for eyewear to view the 3D scene based on perceived distance data corresponding to the identified at least one object of interest and the identified at least one object of interest. In one example, the circuitry includes logic that determines the perceived distance data corresponding to the at least one object of interest based on inter-object distance data indicating a horizontal offset between the at least one object of interest in a first scene view and the same at least one object of interest in a second scene view and display distance data indicating the distance between one or more display screens and a viewing position. Related methods are also set forth.

Abstract: A method and system are provided for navigating and selecting objects within a 3D video image by computing a depth coordinate based upon two-dimensional (2D) image information from left and right views of such objects. In accordance with preferred embodiments, commonly available computer navigation devices and input devices can be used to achieve such navigation and object selection.

Abstract: A method and a device for disabling a lower version of a computer bus and interconnection protocol (e.g., Peripheral Component Interconnect Express (PCIe) 2.0 or higher) for interoperability with a receiver compliant to a lower version of the protocol are disclosed. The device detects a presence of a receiver, and starts link training. During the link training, the number of link training failures or the elapsed time is counted. The device transmits a training sequence including symbols set in accordance with a higher version of the protocol that the device supports on each lane that the receiver is detected as long as the number of link training failures or the elapsed time is below a predetermined threshold. If the number of link training failures or the elapsed time reaches a predetermined threshold, the device transmits a training sequence including symbols set in accordance with a lower version of the protocol.

Abstract: An averaged impedance calibration is obtained by utilizing two separately controlled resistive loads arranged in parallel and choosing two adjacent control codes to configure switch arrays to set the resistance of each of the separate resistive loads. The resistance of the resistive loads is averaged to provide greater accuracy. The two adjacent control codes are close to the target impedance value and typically one is slightly higher and one is slightly lower than the target impedance value.