Abstract: A wide gamut RGB digital display, such as an LCD display, digital television, printer, or any other suitable display, includes wide color gamut configuration message control logic that is operative to indicate, to an image source provider, wide gamut RGB indication information and wide color gamut format definition information that indicates that wide gamut RGB color data is to be received by the wide gamut RGB digital display. The wide gamut configuration message control logic is also operatively responsive to wide gamut confirmation information that is received from the image source provider. The wide gamut RGB digital display also includes logic that is operative to display received wide gamut RGB color data that was received in response to the wide gamut RGB indication information and the wide color gamut format definition information.

Abstract: Systems and methods and computer program products are disclosed to determine the source data rate even in cases where the sink device is not directly coupled to the source device. A method includes, forming a logical channel from a source device to a sink device where the logical channel is configured to carry the source data stream and one or more rate parameters. The rate parameters relate a data rate of the source data stream to a data rate of the logical channel. Another method includes, detecting a logical channel in a received data stream where the logical channel includes the source data stream, recovering one or more rate parameters from the received data stream, determining a data rate of the logical channel, and determining the data rate of the source data stream based on the data rate of the logical channel and the one or more rate parameters.

Abstract: Methods and apparatus for matching voltages between two or more circuits within an integrated circuit is disclosed. The apparatus includes a comparator circuit, comparing supply voltages to first and second circuits. The comparator outputs a variable error voltage based on the comparison, the error voltage related to the difference in voltages. The error voltage is supplied to a variable current control circuit that variably sinks one of the supply voltages to a common potential in order to increase the IR drop in the circuit supplying voltage to one of the first and second circuits, thereby affording voltage adjustment in order to match the first and second circuits. A corresponding method is also disclosed.

Abstract: A method and apparatus configures an integrated circuit by determining a multi-bit configuration value on a single node. The multi-bit configuration value is determined by using at least a voltage level at the single node and also by detecting a time to reach a voltage threshold level at the single node, based on a voltage ramp generation circuit. The method and apparatus also includes configuring an operation mode of a circuit in the integrated circuit based on the determined multi-bit configuration value from the single node. Multi-bit configuration values may be obtained on multiple single nodes in an integrated circuit. In one example, a voltage level is employed in addition to a time to reach a voltage threshold level whereas in another example a current level on a single node is utilized in combination with detection of a time to reach a voltage threshold level.

Abstract: A method of manufacturing is provided that includes providing a semiconductor chip with an insulating layer. The insulating layer includes a trench. A second semiconductor chip is stacked on the first semiconductor chip to leave a gap. A polymeric filler is placed in the gap wherein a portion of the polymeric filler is drawn into the trench.

Abstract: A device having a voltage mode driver with tunable amplitude and resistance that supports a predetermined output resistance and output amplitude is described herein. The voltage mode driver includes multiple configurable drivers. The voltage mode driver is controlled by a control module. Resistance tuning is controlled by the number of active configurable drivers and amplitude tuning is controlled by setting the high or low drive state of each active configurable driver. The slew rate of the device is controlled by delaying the setting of the high or low drive state of an active configurable driver by a predetermined interval.

Abstract: In an printed circuit board on which an integrated circuit die is mounted, an array of plated through holes (PTHs) are formed which include conductive power and ground PTH structures which are connected to provide power and ground reference voltages to the integrated circuit die, and isolated current sensing PTH structures which are formed within sensing proximity to the conductive power and ground PTH structures for sensing current switching activity in the conductive power and ground PTH structures by inductively converting dynamic current changes in the conductive power and ground PTH structures into a measurable voltage signal.

Abstract: A device and method for providing computer operation diagnostics. The method includes coupling a mobile device (such as a mobile smartphone) to the computer via a diagnostic port. The smartphone has a diagnostic program (application) thereon that is initiated so as to be able to communicate with a diagnostic module within the computer to request and receive information from the computer.

Abstract: A method and device are provided for retrieving system data needed for boot up and/or wake-up. A bus hub is provided that retrieves needed data prior to such data being requested by the processor. The bus hub then stores the data. When a request is received for the data from the processor, the bus hub responds by sending the stored data.

Abstract: An apparatus and method is provided for improving initialization and synchronization of display devices to audio data. Current implementations to retain synchronization between a transmitter and a display use “Keep Alive” silent audio data stream in the format of the latest data stream on an interface between the transmitter and the display even when no data is available. Implementing the above solution in a system where the silent audio data stream is transmitted over a wireless link is bandwidth and power inefficient. The techniques provide an apparatus and method to efficiently generate and transmit silent audio data stream for maintaining synchronization.

Abstract: One of a video source device and a video sink device may: (a) deactivate a video processing function at the one device and send a command for causing the other of the video source device and the video sink device to activate the video processing function; (b) activate the video processing function at the one device and send a command for causing the other device to deactivate the video processing function; and (c) based on user input indicating whether (a) or (b) resulted in a preferred video image, effect (a) or (b). The one device may receive an indication of video processing functions of which the other device is capable, such that (a), (b) and (c) may be performed for each indicated video processing function of which the one device is also capable. A user interface including at least one selectable control for indicating whether a video image resulting from (a) or (b) is preferred may be displayed.

Abstract: A method includes detecting one of an application access or a file type access, and configuring, in response to detecting the application or file type access, automatically without user interaction, a display system in an image quality configuration for the application or the file type where the image quality configuration is based on providing best image quality with respect to the application or the file type. Configuring the display system in an image quality configuration, may involve determining that a profile associated with the application or associated with the file type is stored in memory, and configuring the display system according to the profile. The method may adjust at least one anti-aliasing parameter or at least one anisotropic filter parameter. The method may monitor an operating system to obtain an indication that an application has been accessed or that a file type has been accessed.

Abstract: A system and method for calibrating bias in a data transmission system including a calibrated bias having impedance calibration for accommodating parameter variations in the data transmission system. A current mirror receives and balances bias currents between the calibrated bias and an output driver from the data transmission system. A digital compensation logic circuit is connected to the calibrated bias to adjust the calibrated bias for variations in parameters causing a current tail effect. A calibration logic circuit adjusts calibration due to variations in operational parameters, such that the tail current variations are minimized.

Abstract: Provided herein is a method for synchronizing audio and video clock signals in a system. The method includes comparing, within a comparison module, a system video signal with the determined mathematical relationship to produce an adjustment signal. A system video reference signal is updated with the adjustment signal to produce an updated intermediate signal.

Abstract: A power adjustment circuit includes memory controller logic that is couplable to system memory or other memory if desired. The memory control logic is operative to provide a variable memory clock signal to the system memory and to place the system memory in a self refresh mode wherein the self refresh mode does not require a memory clock signal. Thereafter, the memory clock control logic adjusts the frequency of the memory clock signal to a lower (or higher) frequency clock signal, and in response to the frequency of the memory clock signal becoming stable, the memory clock control logic restores the memory to a normal mode using the lower adjusted frequency memory clock signal. As such, a dynamic memory clock switching mechanism is employed for quickly varying the frequency of memory modules for discrete graphics processors, graphics processors integrated on a chip, or any other processors such that the memory clock can be reduced to a lower frequency in real time to save power.

Abstract: Control symbols taking the form {k1-k2-k2-k1} are inserted in a serial stream including m bit data words. k1 and k2 are each predefined m bit control words differing from the m bit data words. The Hamming distance between k1 and k2 is at least 2. Such control symbols may be robustly detected in the presence of a one bit error in the symbol, or a data word immediately preceding or following the symbol. The m bit words may be 8B/10B encoded data, or defined control words. The control symbols may be used for data delineation, stream synchronizaiton, transmitter/receiver synchronization or for other control signalling.

Abstract: In a CPU, the CPU having multiple CPU cores, each core having a first machine specific register, a second machine specific register, and microcode which when executed causes a write notification to be issued to the physical address contained in the second machine specific register; receiving in the first machine specific register of a CPU core, a physical page table/page directory base address, receiving in the second machine specific register of the CPU core, a physical address pointing to a location controlled by the IOMMUv2, determining that a control register of the CPU core has been updated, and responsive to the determination that the control register has been updated, executing microcode in the CPU core that causes a write notification to be issued to the physical address contained in the second machine specific register, wherein the physical address is able to receive writes that affect IOMMUv2 page table invalidations.

Abstract: A method of manufacturing is provided that includes providing a semiconductor chip device that has a circuit board and a first semiconductor chip coupled thereto. A lid is placed on the circuit board. The lid includes an opening and an internal cavity. A liquid thermal interface material is placed in the internal cavity for thermal contact with the first semiconductor chip and the circuit board.

Abstract: A method apparatus for automated display video programming guide information includes filtering programming information using filtering rules to determine viewing events of interest to a user. The method and apparatus further includes displaying on a first screen portion, the viewing events in a chronological order based on a display time for each of the viewing events. The method and apparatus further includes displaying a selector in the first screen portion such that the selector is operative to select one of the viewing events and displaying on a second screen portion, event information relating to a selected one of the plurality viewing events when the selector is proximate to one of the viewing events. The method and apparatus further includes resolving a scheduling conflict between a first viewing event and second viewing event to generate a list of program guide information.

Abstract: An integrated circuit is capable of controlling a communication signal by using power ramp controlled communication buffer logic to generate an outgoing communication signal based on a detected voltage on a voltage source. The voltage source is necessary to supply power for power ramp controlled communication buffer logic. The voltage on the voltage source may be detected using power ramp sensor logic. The outgoing communication signal is based on a core logic output signal if the detected voltage is greater than or equal to a predetermined voltage level. If, the detected voltage is less than the predetermined voltage level, the outgoing communication signal is predetermined to be one of: a tristate outgoing communication signal, a logic one outgoing communication signal and a logic zero outgoing communication signal. Power ramp controlled communication buffer logic may also generate a core logic input signal based on an incoming communication signal in response to the detected voltage.